diff options
| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-10-14 02:21:17 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-10-15 22:32:25 +0900 |
| commit | c7372d61fd38c32c410bcab86dd39494ebe1fb06 (patch) | |
| tree | 62a780fb7395b03877376525b2ff508a1258f496 /arch | |
| parent | d37d31849c6ad3c985e5fda69b8c92f147363424 (diff) | |
ARM: uniphier: adjust ifdefs for new UniPhier DWC3 CONFIG
Now USB 3.0 feature is enabled/disabled by CONFIG_USB_DWC3_UNIPHIER.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/mach-uniphier/clk/clk-pro4.c | 6 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/clk/clk-pro5.c | 6 | ||||
| -rw-r--r-- | arch/arm/mach-uniphier/clk/clk-pxs2.c | 6 |
3 files changed, 9 insertions, 9 deletions
diff --git a/arch/arm/mach-uniphier/clk/clk-pro4.c b/arch/arm/mach-uniphier/clk/clk-pro4.c index 19be4f3145..8a978d20ff 100644 --- a/arch/arm/mach-uniphier/clk/clk-pro4.c +++ b/arch/arm/mach-uniphier/clk/clk-pro4.c @@ -17,7 +17,7 @@ void uniphier_pro4_clk_init(void) /* deassert reset */ tmp = readl(SC_RSTCTRL); -#ifdef CONFIG_USB_XHCI_UNIPHIER +#ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_USB3C0 | SC_RSTCTRL_NRST_GIO; #endif @@ -30,7 +30,7 @@ void uniphier_pro4_clk_init(void) writel(tmp, SC_RSTCTRL); readl(SC_RSTCTRL); /* dummy read */ -#ifdef CONFIG_USB_XHCI_UNIPHIER +#ifdef CONFIG_USB_DWC3_UNIPHIER tmp = readl(SC_RSTCTRL2); tmp |= SC_RSTCTRL2_NRST_USB3B1 | SC_RSTCTRL2_NRST_USB3C1; writel(tmp, SC_RSTCTRL2); @@ -39,7 +39,7 @@ void uniphier_pro4_clk_init(void) /* provide clocks */ tmp = readl(SC_CLKCTRL); -#ifdef CONFIG_USB_XHCI_UNIPHIER +#ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | SC_CLKCTRL_CEN_GIO; #endif diff --git a/arch/arm/mach-uniphier/clk/clk-pro5.c b/arch/arm/mach-uniphier/clk/clk-pro5.c index 823bb06373..dd86cadf5b 100644 --- a/arch/arm/mach-uniphier/clk/clk-pro5.c +++ b/arch/arm/mach-uniphier/clk/clk-pro5.c @@ -15,7 +15,7 @@ void uniphier_pro5_clk_init(void) /* deassert reset */ tmp = readl(SC_RSTCTRL); -#ifdef CONFIG_USB_XHCI_UNIPHIER +#ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_GIO; #endif #ifdef CONFIG_NAND_DENALI @@ -24,7 +24,7 @@ void uniphier_pro5_clk_init(void) writel(tmp, SC_RSTCTRL); readl(SC_RSTCTRL); /* dummy read */ -#ifdef CONFIG_USB_XHCI_UNIPHIER +#ifdef CONFIG_USB_DWC3_UNIPHIER tmp = readl(SC_RSTCTRL2); tmp |= SC_RSTCTRL2_NRST_USB3B1; writel(tmp, SC_RSTCTRL2); @@ -33,7 +33,7 @@ void uniphier_pro5_clk_init(void) /* provide clocks */ tmp = readl(SC_CLKCTRL); -#ifdef CONFIG_USB_XHCI_UNIPHIER +#ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | SC_CLKCTRL_CEN_GIO; #endif diff --git a/arch/arm/mach-uniphier/clk/clk-pxs2.c b/arch/arm/mach-uniphier/clk/clk-pxs2.c index 0d9240519c..9775127650 100644 --- a/arch/arm/mach-uniphier/clk/clk-pxs2.c +++ b/arch/arm/mach-uniphier/clk/clk-pxs2.c @@ -16,7 +16,7 @@ void uniphier_pxs2_clk_init(void) /* deassert reset */ tmp = readl(SC_RSTCTRL); -#ifdef CONFIG_USB_XHCI_UNIPHIER +#ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_GIO; #endif #ifdef CONFIG_UNIPHIER_ETH @@ -28,7 +28,7 @@ void uniphier_pxs2_clk_init(void) writel(tmp, SC_RSTCTRL); readl(SC_RSTCTRL); /* dummy read */ -#ifdef CONFIG_USB_XHCI_UNIPHIER +#ifdef CONFIG_USB_DWC3_UNIPHIER tmp = readl(SC_RSTCTRL2); tmp |= SC_RSTCTRL2_NRST_USB3B1; writel(tmp, SC_RSTCTRL2); @@ -41,7 +41,7 @@ void uniphier_pxs2_clk_init(void) /* provide clocks */ tmp = readl(SC_CLKCTRL); -#ifdef CONFIG_USB_XHCI_UNIPHIER +#ifdef CONFIG_USB_DWC3_UNIPHIER tmp |= BIT(20) | BIT(19) | SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 | SC_CLKCTRL_CEN_GIO; #endif |