summaryrefslogtreecommitdiff
path: root/arch/arm/include/asm/arch-omap4
diff options
context:
space:
mode:
authorLokesh Vutla <lokeshvutla@ti.com>2013-05-30 03:19:38 +0000
committerTom Rini <trini@ti.com>2013-06-10 08:43:10 -0400
commit97405d843ece2a53e67b801e02ee42005d26e172 (patch)
tree13c4b866c44ebbbb7033f7490921fcb6dffa6004 /arch/arm/include/asm/arch-omap4
parent7f36c88f64ee1affd4db78b2c2f4a616abceb84c (diff)
ARM: DRA7xx: clocks: Update PLL values
Update PLL values. SYS_CLKSEL value for 20MHz is changed to 2. In other platforms SYS_CLKSEL value 2 represents reserved. But in sys_clk array ind 1 is used for 13Mhz. Since other platforms are not using 13Mhz, reusing index 1 for 20MHz. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com>
Diffstat (limited to 'arch/arm/include/asm/arch-omap4')
-rw-r--r--arch/arm/include/asm/arch-omap4/clock.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-omap4/clock.h b/arch/arm/include/asm/arch-omap4/clock.h
index d7b61c298a..d14d8fb8af 100644
--- a/arch/arm/include/asm/arch-omap4/clock.h
+++ b/arch/arm/include/asm/arch-omap4/clock.h
@@ -76,7 +76,7 @@
#define CM_CLKSEL_DCC_EN_MASK (1 << 22)
/* CM_SYS_CLKSEL */
-#define CM_SYS_CLKSEL_SYS_CLKSEL_MASK 7
+#define CM_SYS_CLKSEL_SYS_CLKSEL_MASK 7
/* CM_CLKSEL_CORE */
#define CLKSEL_CORE_SHIFT 0