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authorPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>2017-09-29 19:28:01 +0200
committerPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>2017-10-01 00:33:35 +0200
commit482cf22333dbfb7c706d6a7ec1ffbfa5409cc6a3 (patch)
treebdc510d8ea59ff9e976e6384857ec2ecfb841693 /arch/arm/dts
parent0b5e7aab0ef62fea852d03df76e577c217d0b8bf (diff)
rockchip: rk3399-puma: add boot-on regulator to override BIOS_DISABLE
The (Qseven) BIOS_DISABLE signal on the RK3399-Q7 (Puma) keeps the eMMC and SPI in reset initially and we need to write a GPIO to turn them on before continuing the boot-up. This adds the DTS entries for the additional regulator and makes pinctrl and gpio3 available during SPL. It also adds a hook to the spl_board_init() to ensure that the regulator gets probed and enabled. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/dts')
-rw-r--r--arch/arm/dts/rk3399-puma.dtsi30
1 files changed, 26 insertions, 4 deletions
diff --git a/arch/arm/dts/rk3399-puma.dtsi b/arch/arm/dts/rk3399-puma.dtsi
index f95c68e9f6..65ab380139 100644
--- a/arch/arm/dts/rk3399-puma.dtsi
+++ b/arch/arm/dts/rk3399-puma.dtsi
@@ -101,6 +101,24 @@
regulator-max-microvolt = <3300000>;
};
+ /*
+ * The Qseven BIOS_DISABLE signal on the RK3399-Q7 keeps the on-module
+ * eMMC and SPI flash powered-down initially (in fact it keeps the
+ * reset signal asserted). Even though it is an enable signal, we
+ * model this as a regulator.
+ */
+ bios_enable: bios_enable {
+ compatible = "regulator-fixed";
+ u-boot,dm-pre-reloc;
+ regulator-name = "bios_enable";
+ enable-active-low;
+ gpio = <&gpio3 29 GPIO_ACTIVE_HIGH>;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ };
+
vccadc_ref: vccadc-ref {
compatible = "regulator-fixed";
regulator-name = "vcc1v8_sys";
@@ -459,7 +477,7 @@
};
&pcie_phy {
- status = "okay";
+ status = "okay";
};
&pmu_io_domains {
@@ -486,7 +504,7 @@
};
&sdmmc {
- u-boot,dm-pre-reloc;
+ u-boot,dm-pre-reloc;
clock-frequency = <150000000>;
clock-freq-min-max = <100000 150000000>;
supports-sd;
@@ -533,10 +551,15 @@
status = "okay";
};
+&gpio3 {
+ u-boot,dm-pre-reloc;
+};
+
&pinctrl {
/* Pins that are not explicitely used by any devices */
pinctrl-names = "default";
pinctrl-0 = <&puma_pin_hog>;
+
hog {
puma_pin_hog: puma_pin_hog {
rockchip,pins =
@@ -576,7 +599,7 @@
i2c8 {
i2c8_xfer_a: i2c8-xfer {
rockchip,pins = <1 21 RK_FUNC_1 &pcfg_pull_up>,
- <1 20 RK_FUNC_1 &pcfg_pull_up>;
+ <1 20 RK_FUNC_1 &pcfg_pull_up>;
};
};
};
@@ -652,4 +675,3 @@
&spi5 {
status = "okay";
};
-