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authorMichal Simek <michal.simek@xilinx.com>2015-07-22 11:36:32 +0200
committerMichal Simek <michal.simek@xilinx.com>2015-07-28 11:56:26 +0200
commit5c45b166783493615f884affa7ef505bbd4d7f34 (patch)
tree93c8f83bdfe0dfc9581806d5d92f1a62ebc94291 /arch/arm/dts/zynq-zc770-xm013.dts
parent91f9f17262ab38f8ec5b018424a0311093e3b8fb (diff)
ARM: zynq: DT: Update zc770 dtses
Platform DTSes are missing content needed for platform to be able to use OF binding and DM. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/dts/zynq-zc770-xm013.dts')
-rw-r--r--arch/arm/dts/zynq-zc770-xm013.dts62
1 files changed, 59 insertions, 3 deletions
diff --git a/arch/arm/dts/zynq-zc770-xm013.dts b/arch/arm/dts/zynq-zc770-xm013.dts
index c61c7e7592..436a8cd1b9 100644
--- a/arch/arm/dts/zynq-zc770-xm013.dts
+++ b/arch/arm/dts/zynq-zc770-xm013.dts
@@ -9,15 +9,71 @@
#include "zynq-7000.dtsi"
/ {
- model = "Zynq ZC770 XM013 Board";
compatible = "xlnx,zynq-zc770-xm013", "xlnx,zynq-7000";
+ model = "Xilinx Zynq";
aliases {
+ ethernet0 = &gem1;
+ i2c0 = &i2c1;
serial0 = &uart0;
+ spi0 = &spi0;
};
- memory {
+ chosen {
+ bootargs = "console=ttyPS0,115200 root=/dev/ram rw earlyprintk";
+ linux,stdout-path = &uart0;
+ stdout-path = &uart0;
+ };
+
+ memory@0 {
device_type = "memory";
- reg = <0 0x40000000>;
+ reg = <0x0 0x40000000>;
+ };
+};
+
+&spi0 {
+ status = "okay";
+ num-cs = <4>;
+ is-decoded-cs = <0>;
+ eeprom: at25@0 {
+ at25,byte-len = <8192>;
+ at25,addr-mode = <2>;
+ at25,page-size = <32>;
+
+ compatible = "atmel,at25";
+ reg = <2>;
+ spi-max-frequency = <1000000>;
+ };
+};
+
+&can1 {
+ status = "okay";
+};
+
+&gem1 {
+ status = "okay";
+ phy-mode = "rgmii-id";
+ phy-handle = <&ethernet_phy>;
+
+ ethernet_phy: ethernet-phy@7 {
+ reg = <7>;
};
};
+
+&i2c1 {
+ status = "okay";
+ clock-frequency = <400000>;
+
+ si570: clock-generator@55 {
+ #clock-cells = <0>;
+ compatible = "silabs,si570";
+ temperature-stability = <50>;
+ reg = <0x55>;
+ factory-fout = <156250000>;
+ clock-frequency = <148500000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};