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authorMasahiro Yamada <yamada.masahiro@socionext.com>2017-10-17 21:19:42 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2017-10-23 01:02:05 +0900
commit9ac0e7b37a5d9c01079f1a2d595fe67cef4ce154 (patch)
tree018fe8b360dc1ffadf80be6fb002cdb766b39c31 /arch/arm/dts/uniphier-pxs2.dtsi
parentd0df9588e80057fe6a06fef412ef74f76ee66804 (diff)
ARM: uniphier: split u-boot,dm-pre-reloc out to uniphier-v7-u-boot.dtsi
UniPhier 32-bit SoCs use CONFIG_SPL_OF_CONTROL. So, many nodes must be marked as dm-pre-reloc to prevent fdtgrep from stripping them off. Sprinkling U-Boot-specific properties all over the place is painful because DT files are synced with Linux from time to time. Split u-boot,dm-pre-reloc out to uniphier-v7-u-boot.dtsi, which is appended to UniPhier V7 DTS before the build. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
Diffstat (limited to 'arch/arm/dts/uniphier-pxs2.dtsi')
-rw-r--r--arch/arm/dts/uniphier-pxs2.dtsi4
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi
index ac84d15560..dcb251597f 100644
--- a/arch/arm/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/dts/uniphier-pxs2.dtsi
@@ -120,7 +120,6 @@
#size-cells = <1>;
ranges;
interrupt-parent = <&intc>;
- u-boot,dm-pre-reloc;
l2: l2-cache@500c0000 {
compatible = "socionext,uniphier-system-cache";
@@ -297,7 +296,6 @@
compatible = "socionext,uniphier-pxs2-sdctrl",
"simple-mfd", "syscon";
reg = <0x59810000 0x400>;
- u-boot,dm-pre-reloc;
sd_clk: clock {
compatible = "socionext,uniphier-pxs2-sd-clock";
@@ -365,11 +363,9 @@
compatible = "socionext,uniphier-pxs2-soc-glue",
"simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
- u-boot,dm-pre-reloc;
pinctrl: pinctrl {
compatible = "socionext,uniphier-pxs2-pinctrl";
- u-boot,dm-pre-reloc;
};
};