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path: root/drivers/clk/tegra
AgeCommit message (Expand)Author
2018-07-25clk: tegra: Fix PLL_U post divider and initial rate on Tegra30Lucas Stach
2017-12-20clk: tegra: Fix cclk_lp divisor registerMichał Mirosław
2015-10-20Merge tag 'tegra-for-4.4-clk' of git://git.kernel.org/pub/scm/linux/kernel/gi...Michael Turquette
2015-10-20clk: tegra: Modify tegra_audio_clk_init to accept more pllsRhyland Klein
2015-10-20clk: tegra: Update struct tegra_clk_pll_params kerneldocThierry Reding
2015-10-20clk: tegra: Fix comments for structure definitionsRhyland Klein
2015-10-20clk: tegra: dfll: Monitor code is DEBUG_FS onlyThierry Reding
2015-10-12clk: tegra: delete unneeded of_node_putJulia Lawall
2015-09-16clk: tegra: dfll: Properly protect OPP listThierry Reding
2015-09-15clk: tegra: Unlock top rates for Tegra124 DFLL clockMikko Perttunen
2015-08-25clk: tegra: Fix some static checker problemsStephen Boyd
2015-08-25Merge tag 'tegra-for-4.3-clk' of git://git.kernel.org/pub/scm/linux/kernel/gi...Stephen Boyd
2015-08-24clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw)Stephen Boyd
2015-08-24clk: tegra: Convert to clk_hw based provider APIsStephen Boyd
2015-07-28Merge branch 'cleanup-clk-h-includes' into clk-nextStephen Boyd
2015-07-27clk: change clk_ops' ->determine_rate() prototypeBoris Brezillon
2015-07-20clk: tegra: Properly include clk.hStephen Boyd
2015-07-16clk: tegra: Add the DFLL as a possible parent of the cclk_g clockTuomas Tynkkynen
2015-07-16clk: tegra: Save/restore CCLKG_BURST_POLICY on suspendTuomas Tynkkynen
2015-07-16clk: tegra: Add Tegra124 DFLL clocksource platform driverTuomas Tynkkynen
2015-07-16clk: tegra: Add DFLL DVCO reset control for Tegra124Paul Walmsley
2015-07-16clk: tegra: Introduce ability for SoC-specific reset control callbacksMikko Perttunen
2015-07-16clk: tegra: Add functions for parsing CVB tablesTuomas Tynkkynen
2015-07-16clk: tegra: Add closed loop support for the DFLLTuomas Tynkkynen
2015-07-16clk: tegra: Add library for the DFLL clock source (open-loop mode)Tuomas Tynkkynen
2015-05-13clk: tegra: Fix hda2codec_2x clock name for Tegra30Marcel Ziswiler
2015-05-13clk: tegra: EMC clock driver depends on EMC driverThierry Reding
2015-05-13clk: tegra: Have EMC clock implement determine_rate()Tomeu Vizoso
2015-05-13clk: tegra: Set the EMC clock as the parent of the MC clockTomeu Vizoso
2015-05-13clk: tegra: Add EMC clock driverMikko Perttunen
2015-05-13clk: tegra: Remove old Tegra124 EMC clockMikko Perttunen
2015-04-10clk: tegra: Use the proper parent for plld_dsiThierry Reding
2015-04-10clk: tegra: Use generic tegra_osc_clk_init() on Tegra114Thierry Reding
2015-04-10clk: tegra: Model oscillator as clockThierry Reding
2015-04-10clk: tegra: Add peripheral registers for bank YThierry Reding
2015-04-10clk: tegra: Register the proper number of resetsThierry Reding
2015-04-10clk: tegra: Remove needless initializationsThierry Reding
2015-04-10clk: tegra: Use consistent indentationThierry Reding
2015-04-10clk: tegra: Various whitespace cleanupsThierry Reding
2015-04-10clk: tegra: Enable HDA to HDMI clocks on Tegra124Dylan Reid
2015-04-10clk: tegra: Fix a bunch of sparse warningsThierry Reding
2015-04-10clk: tegra: Fix typo tabel -> tableThierry Reding
2015-02-18clk: Replace explicit clk assignment with __clk_hw_set_clkJavier Martinez Canillas
2015-02-02clk: tegra: Define PLLD_DSI and remove dsia(b)_muxMark Zhang
2015-02-02clk: tegra: Add support for the Tegra132 CAR IP blockPaul Walmsley
2015-02-02clk: tegra: make tegra_clocks_apply_init_table() arch_initcallPeter De Schrijver
2015-02-02clk: tegra: Fix order of arguments in WARNTomeu Vizoso
2015-02-02clk: tegra124: Add init data for dsi lp clocksSean Paul
2015-02-02clk: tegra: SDMMC controllers are on APBAndrew Bresticker
2014-11-26clk: tegra: Implement memory-controller clockThierry Reding
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