ASoC: rk3308_codec: fix the incorrect dapm controls

For more clarity, this patch rename channel to group,
and, we can use the amixer or tinymix to change
the gains for ADCs (MIC/ALC/AGC) and DACs.

Change-Id: If362319fee7e926d235e8c0ffce5415027add96d
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>

2 files changed, 278 insertions, 187 deletions

diff --git a/sound/soc/codecs/rk3308_codec.c b/sound/soc/codecs/rk3308_codec.c
index adf8a7ccd5e1..941314b42df9 100644
--- a/sound/soc/codecs/rk3308_codec.c
+++ b/sound/soc/codecs/rk3308_codec.c
@@ -77,254 +77,319 @@ struct rk3308_codec_priv {
 #endif
 };
 
-static const DECLARE_TLV_DB_SCALE(rk3308_codec_alc_agc_ch_gain_tlv,
+static const DECLARE_TLV_DB_SCALE(rk3308_codec_alc_agc_grp_gain_tlv,
 				  -1800, 150, 2850);
-static const DECLARE_TLV_DB_SCALE(rk3308_codec_alc_agc_ch_max_gain_tlv,
+static const DECLARE_TLV_DB_SCALE(rk3308_codec_alc_agc_grp_max_gain_tlv,
 				  -1350, 600, 2850);
-static const DECLARE_TLV_DB_SCALE(rk3308_codec_alc_agc_ch_min_gain_tlv,
+static const DECLARE_TLV_DB_SCALE(rk3308_codec_alc_agc_grp_min_gain_tlv,
 				  -1800, 600, 2400);
 static const DECLARE_TLV_DB_SCALE(rk3308_codec_adc_mic_gain_tlv,
 				  0, 600, 3000);
 static const DECLARE_TLV_DB_SCALE(rk3308_codec_adc_alc_gain_tlv,
 				  -1800, 150, 2850);
-static const DECLARE_TLV_DB_SCALE(rk3308_codec_dac_gain_tlv,
-				  0, 150, 600);
+static const DECLARE_TLV_DB_SCALE(rk3308_codec_dac_lineout_gain_tlv,
+				  -600, 150, 0);
 static const DECLARE_TLV_DB_SCALE(rk3308_codec_dac_hpout_gain_tlv,
 				  -3900, 150, 600);
 static const DECLARE_TLV_DB_SCALE(rk3308_codec_dac_hpmix_gain_tlv,
 				  -600, 600, 0);
 
 static const struct snd_kcontrol_new rk3308_codec_dapm_controls[] = {
-	/* ALC AGC Channel*/
-	SOC_DOUBLE_R_RANGE_TLV("ALC AGC Channel 0 Volume",
-			       RK3308_ALC_L_DIG_CON03(0),
-			       RK3308_ALC_R_DIG_CON03(0),
-			       RK3308_AGC_PGA_GAIN_SFT,
-			       RK3308_AGC_PGA_GAIN_NDB_18,
-			       RK3308_AGC_PGA_GAIN_PDB_28_5,
-			       0, rk3308_codec_alc_agc_ch_gain_tlv),
-	SOC_DOUBLE_R_RANGE_TLV("ALC AGC Channel 1 Volume",
-			       RK3308_ALC_L_DIG_CON03(1),
-			       RK3308_ALC_R_DIG_CON03(1),
-			       RK3308_AGC_PGA_GAIN_SFT,
-			       RK3308_AGC_PGA_GAIN_NDB_18,
-			       RK3308_AGC_PGA_GAIN_PDB_28_5,
-			       0, rk3308_codec_alc_agc_ch_gain_tlv),
-	SOC_DOUBLE_R_RANGE_TLV("ALC AGC Channel 2 Volume",
-			       RK3308_ALC_L_DIG_CON03(2),
-			       RK3308_ALC_R_DIG_CON03(2),
-			       RK3308_AGC_PGA_GAIN_SFT,
-			       RK3308_AGC_PGA_GAIN_NDB_18,
-			       RK3308_AGC_PGA_GAIN_PDB_28_5,
-			       0, rk3308_codec_alc_agc_ch_gain_tlv),
-	SOC_DOUBLE_R_RANGE_TLV("ALC AGC Channel 3 Volume",
-			       RK3308_ALC_L_DIG_CON03(3),
-			       RK3308_ALC_R_DIG_CON03(3),
-			       RK3308_AGC_PGA_GAIN_SFT,
-			       RK3308_AGC_PGA_GAIN_NDB_18,
-			       RK3308_AGC_PGA_GAIN_PDB_28_5,
-			       0, rk3308_codec_alc_agc_ch_gain_tlv),
+	/* ALC AGC Group */
+	SOC_SINGLE_RANGE_TLV("ALC AGC Group 0 Left Volume",
+			     RK3308_ALC_L_DIG_CON03(0),
+			     RK3308_AGC_PGA_GAIN_SFT,
+			     RK3308_AGC_PGA_GAIN_MIN,
+			     RK3308_AGC_PGA_GAIN_MAX,
+			     0, rk3308_codec_alc_agc_grp_gain_tlv),
+	SOC_SINGLE_RANGE_TLV("ALC AGC Group 0 Right Volume",
+			     RK3308_ALC_R_DIG_CON03(0),
+			     RK3308_AGC_PGA_GAIN_SFT,
+			     RK3308_AGC_PGA_GAIN_MIN,
+			     RK3308_AGC_PGA_GAIN_MAX,
+			     0, rk3308_codec_alc_agc_grp_gain_tlv),
+
+	SOC_SINGLE_RANGE_TLV("ALC AGC Group 1 Left Volume",
+			     RK3308_ALC_L_DIG_CON03(1),
+			     RK3308_AGC_PGA_GAIN_SFT,
+			     RK3308_AGC_PGA_GAIN_MIN,
+			     RK3308_AGC_PGA_GAIN_MAX,
+			     0, rk3308_codec_alc_agc_grp_gain_tlv),
+	SOC_SINGLE_RANGE_TLV("ALC AGC Group 1 Right Volume",
+			     RK3308_ALC_R_DIG_CON03(1),
+			     RK3308_AGC_PGA_GAIN_SFT,
+			     RK3308_AGC_PGA_GAIN_MIN,
+			     RK3308_AGC_PGA_GAIN_MAX,
+			     0, rk3308_codec_alc_agc_grp_gain_tlv),
+
+	SOC_SINGLE_RANGE_TLV("ALC AGC Group 2 Left Volume",
+			     RK3308_ALC_L_DIG_CON03(2),
+			     RK3308_AGC_PGA_GAIN_SFT,
+			     RK3308_AGC_PGA_GAIN_MIN,
+			     RK3308_AGC_PGA_GAIN_MAX,
+			     0, rk3308_codec_alc_agc_grp_gain_tlv),
+	SOC_SINGLE_RANGE_TLV("ALC AGC Group 2 Right Volume",
+			     RK3308_ALC_R_DIG_CON03(2),
+			     RK3308_AGC_PGA_GAIN_SFT,
+			     RK3308_AGC_PGA_GAIN_MIN,
+			     RK3308_AGC_PGA_GAIN_MAX,
+			     0, rk3308_codec_alc_agc_grp_gain_tlv),
+
+	SOC_SINGLE_RANGE_TLV("ALC AGC Group 3 Left Volume",
+			     RK3308_ALC_L_DIG_CON03(3),
+			     RK3308_AGC_PGA_GAIN_SFT,
+			     RK3308_AGC_PGA_GAIN_MIN,
+			     RK3308_AGC_PGA_GAIN_MAX,
+			     0, rk3308_codec_alc_agc_grp_gain_tlv),
+	SOC_SINGLE_RANGE_TLV("ALC AGC Group 3 Right Volume",
+			     RK3308_ALC_R_DIG_CON03(3),
+			     RK3308_AGC_PGA_GAIN_SFT,
+			     RK3308_AGC_PGA_GAIN_MIN,
+			     RK3308_AGC_PGA_GAIN_MAX,
+			     0, rk3308_codec_alc_agc_grp_gain_tlv),
 
 	/* ALC AGC MAX */
-	SOC_DOUBLE_R_RANGE_TLV("ALC AGC Channel 0 Max Volume",
-			       RK3308_ALC_L_DIG_CON09(0),
-			       RK3308_ALC_R_DIG_CON09(0),
-			       RK3308_AGC_MAX_GAIN_PGA_SFT,
-			       RK3308_AGC_MAX_GAIN_PGA_NDB_13_5,
-			       RK3308_AGC_MAX_GAIN_PGA_PDB_28_5,
-			       0, rk3308_codec_alc_agc_ch_max_gain_tlv),
-	SOC_DOUBLE_R_RANGE_TLV("ALC AGC Channel 1 Max Volume",
-			       RK3308_ALC_L_DIG_CON09(1),
-			       RK3308_ALC_R_DIG_CON09(1),
-			       RK3308_AGC_MAX_GAIN_PGA_SFT,
-			       RK3308_AGC_MAX_GAIN_PGA_NDB_13_5,
-			       RK3308_AGC_MAX_GAIN_PGA_PDB_28_5,
-			       0, rk3308_codec_alc_agc_ch_max_gain_tlv),
-	SOC_DOUBLE_R_RANGE_TLV("ALC AGC Channel 2 Max Volume",
-			       RK3308_ALC_L_DIG_CON09(2),
-			       RK3308_ALC_R_DIG_CON09(2),
-			       RK3308_AGC_MAX_GAIN_PGA_SFT,
-			       RK3308_AGC_MAX_GAIN_PGA_NDB_13_5,
-			       RK3308_AGC_MAX_GAIN_PGA_PDB_28_5,
-			     0, rk3308_codec_alc_agc_ch_max_gain_tlv),
-	SOC_DOUBLE_R_RANGE_TLV("ALC AGC Channel 3 Max Volume",
-			       RK3308_ALC_L_DIG_CON09(3),
-			       RK3308_ALC_R_DIG_CON09(3),
-			       RK3308_AGC_MAX_GAIN_PGA_SFT,
-			       RK3308_AGC_MAX_GAIN_PGA_NDB_13_5,
-			       RK3308_AGC_MAX_GAIN_PGA_PDB_28_5,
-			       0, rk3308_codec_alc_agc_ch_max_gain_tlv),
+	SOC_SINGLE_RANGE_TLV("ALC AGC Group 0 Left Max Volume",
+			     RK3308_ALC_L_DIG_CON09(0),
+			     RK3308_AGC_MAX_GAIN_PGA_SFT,
+			     RK3308_AGC_MAX_GAIN_PGA_MIN,
+			     RK3308_AGC_MAX_GAIN_PGA_MAX,
+			     0, rk3308_codec_alc_agc_grp_max_gain_tlv),
+	SOC_SINGLE_RANGE_TLV("ALC AGC Group 0 Right Max Volume",
+			     RK3308_ALC_R_DIG_CON09(0),
+			     RK3308_AGC_MAX_GAIN_PGA_SFT,
+			     RK3308_AGC_MAX_GAIN_PGA_MIN,
+			     RK3308_AGC_MAX_GAIN_PGA_MAX,
+			     0, rk3308_codec_alc_agc_grp_max_gain_tlv),
+
+	SOC_SINGLE_RANGE_TLV("ALC AGC Group 1 Left Max Volume",
+			     RK3308_ALC_L_DIG_CON09(1),
+			     RK3308_AGC_MAX_GAIN_PGA_SFT,
+			     RK3308_AGC_MAX_GAIN_PGA_MIN,
+			     RK3308_AGC_MAX_GAIN_PGA_MAX,
+			     0, rk3308_codec_alc_agc_grp_max_gain_tlv),
+	SOC_SINGLE_RANGE_TLV("ALC AGC Group 1 Right Max Volume",
+			     RK3308_ALC_R_DIG_CON09(1),
+			     RK3308_AGC_MAX_GAIN_PGA_SFT,
+			     RK3308_AGC_MAX_GAIN_PGA_MIN,
+			     RK3308_AGC_MAX_GAIN_PGA_MAX,
+			     0, rk3308_codec_alc_agc_grp_max_gain_tlv),
+
+	SOC_SINGLE_RANGE_TLV("ALC AGC Group 2 Left Max Volume",
+			     RK3308_ALC_L_DIG_CON09(2),
+			     RK3308_AGC_MAX_GAIN_PGA_SFT,
+			     RK3308_AGC_MAX_GAIN_PGA_MIN,
+			     RK3308_AGC_MAX_GAIN_PGA_MAX,
+			     0, rk3308_codec_alc_agc_grp_max_gain_tlv),
+	SOC_SINGLE_RANGE_TLV("ALC AGC Group 2 Right Max Volume",
+			     RK3308_ALC_R_DIG_CON09(2),
+			     RK3308_AGC_MAX_GAIN_PGA_SFT,
+			     RK3308_AGC_MAX_GAIN_PGA_MIN,
+			     RK3308_AGC_MAX_GAIN_PGA_MAX,
+			     0, rk3308_codec_alc_agc_grp_max_gain_tlv),
+
+	SOC_SINGLE_RANGE_TLV("ALC AGC Group 3 Left Max Volume",
+			     RK3308_ALC_L_DIG_CON09(3),
+			     RK3308_AGC_MAX_GAIN_PGA_SFT,
+			     RK3308_AGC_MAX_GAIN_PGA_MIN,
+			     RK3308_AGC_MAX_GAIN_PGA_MAX,
+			     0, rk3308_codec_alc_agc_grp_max_gain_tlv),
+	SOC_SINGLE_RANGE_TLV("ALC AGC Group 3 Right Max Volume",
+			     RK3308_ALC_R_DIG_CON09(3),
+			     RK3308_AGC_MAX_GAIN_PGA_SFT,
+			     RK3308_AGC_MAX_GAIN_PGA_MIN,
+			     RK3308_AGC_MAX_GAIN_PGA_MAX,
+			     0, rk3308_codec_alc_agc_grp_max_gain_tlv),
 
 	/* ALC AGC MIN */
-	SOC_DOUBLE_R_RANGE_TLV("ALC AGC Channel 0 Min Volume",
-			       RK3308_ALC_L_DIG_CON09(0),
-			       RK3308_ALC_R_DIG_CON09(0),
-			       RK3308_AGC_MIN_GAIN_PGA_SFT,
-			       RK3308_AGC_MIN_GAIN_PGA_NDB_18,
-			       RK3308_AGC_MIN_GAIN_PGA_PDB_24,
-			       0, rk3308_codec_alc_agc_ch_min_gain_tlv),
-	SOC_DOUBLE_R_RANGE_TLV("ALC AGC Channel 1 Min Volume",
-			       RK3308_ALC_L_DIG_CON09(1),
-			       RK3308_ALC_R_DIG_CON09(1),
-			       RK3308_AGC_MIN_GAIN_PGA_SFT,
-			       RK3308_AGC_MIN_GAIN_PGA_NDB_18,
-			       RK3308_AGC_MIN_GAIN_PGA_PDB_24,
-			       0, rk3308_codec_alc_agc_ch_min_gain_tlv),
-	SOC_DOUBLE_R_RANGE_TLV("ALC AGC Channel 2 Min Volume",
-			       RK3308_ALC_L_DIG_CON09(2),
-			       RK3308_ALC_R_DIG_CON09(2),
-			       RK3308_AGC_MIN_GAIN_PGA_SFT,
-			       RK3308_AGC_MIN_GAIN_PGA_NDB_18,
-			       RK3308_AGC_MIN_GAIN_PGA_PDB_24,
-			       0, rk3308_codec_alc_agc_ch_min_gain_tlv),
-	SOC_DOUBLE_R_RANGE_TLV("ALC AGC Channel 3 Min Volume",
-			       RK3308_ALC_L_DIG_CON09(3),
-			       RK3308_ALC_R_DIG_CON09(3),
-			       RK3308_AGC_MIN_GAIN_PGA_SFT,
-			       RK3308_AGC_MIN_GAIN_PGA_NDB_18,
-			       RK3308_AGC_MIN_GAIN_PGA_PDB_24,
-			       0, rk3308_codec_alc_agc_ch_min_gain_tlv),
+	SOC_SINGLE_RANGE_TLV("ALC AGC Group 0 Left Min Volume",
+			     RK3308_ALC_L_DIG_CON09(0),
+			     RK3308_AGC_MIN_GAIN_PGA_SFT,
+			     RK3308_AGC_MIN_GAIN_PGA_MIN,
+			     RK3308_AGC_MIN_GAIN_PGA_MAX,
+			     0, rk3308_codec_alc_agc_grp_min_gain_tlv),
+	SOC_SINGLE_RANGE_TLV("ALC AGC Group 0 Right Min Volume",
+			     RK3308_ALC_R_DIG_CON09(0),
+			     RK3308_AGC_MIN_GAIN_PGA_SFT,
+			     RK3308_AGC_MIN_GAIN_PGA_MIN,
+			     RK3308_AGC_MIN_GAIN_PGA_MAX,
+			     0, rk3308_codec_alc_agc_grp_min_gain_tlv),
+
+	SOC_SINGLE_RANGE_TLV("ALC AGC Group 1 Left Min Volume",
+			     RK3308_ALC_L_DIG_CON09(1),
+			     RK3308_AGC_MIN_GAIN_PGA_SFT,
+			     RK3308_AGC_MIN_GAIN_PGA_MIN,
+			     RK3308_AGC_MIN_GAIN_PGA_MAX,
+			     0, rk3308_codec_alc_agc_grp_min_gain_tlv),
+	SOC_SINGLE_RANGE_TLV("ALC AGC Group 1 Right Min Volume",
+			     RK3308_ALC_R_DIG_CON09(1),
+			     RK3308_AGC_MIN_GAIN_PGA_SFT,
+			     RK3308_AGC_MIN_GAIN_PGA_MIN,
+			     RK3308_AGC_MIN_GAIN_PGA_MAX,
+			     0, rk3308_codec_alc_agc_grp_min_gain_tlv),
+
+	SOC_SINGLE_RANGE_TLV("ALC AGC Group 2 Left Min Volume",
+			     RK3308_ALC_L_DIG_CON09(2),
+			     RK3308_AGC_MIN_GAIN_PGA_SFT,
+			     RK3308_AGC_MIN_GAIN_PGA_MIN,
+			     RK3308_AGC_MIN_GAIN_PGA_MAX,
+			     0, rk3308_codec_alc_agc_grp_min_gain_tlv),
+	SOC_SINGLE_RANGE_TLV("ALC AGC Group 2 Right Min Volume",
+			     RK3308_ALC_R_DIG_CON09(2),
+			     RK3308_AGC_MIN_GAIN_PGA_SFT,
+			     RK3308_AGC_MIN_GAIN_PGA_MIN,
+			     RK3308_AGC_MIN_GAIN_PGA_MAX,
+			     0, rk3308_codec_alc_agc_grp_min_gain_tlv),
+
+	SOC_SINGLE_RANGE_TLV("ALC AGC Group 3 Left Min Volume",
+			     RK3308_ALC_L_DIG_CON09(3),
+			     RK3308_AGC_MIN_GAIN_PGA_SFT,
+			     RK3308_AGC_MIN_GAIN_PGA_MIN,
+			     RK3308_AGC_MIN_GAIN_PGA_MAX,
+			     0, rk3308_codec_alc_agc_grp_min_gain_tlv),
+	SOC_SINGLE_RANGE_TLV("ALC AGC Group 3 Right Min Volume",
+			     RK3308_ALC_R_DIG_CON09(3),
+			     RK3308_AGC_MIN_GAIN_PGA_SFT,
+			     RK3308_AGC_MIN_GAIN_PGA_MIN,
+			     RK3308_AGC_MIN_GAIN_PGA_MAX,
+			     0, rk3308_codec_alc_agc_grp_min_gain_tlv),
 
 	/* ADC MIC */
-	SOC_SINGLE_RANGE_TLV("ADC MIC Channel 0 Left Volume",
+	SOC_SINGLE_RANGE_TLV("ADC MIC Group 0 Left Volume",
 			     RK3308_ADC_ANA_CON01(0),
 			     RK3308_ADC_CH1_MIC_GAIN_SFT,
-			     RK3308_ADC_CH1_MIC_GAIN_0DB,
-			     RK3308_ADC_CH1_MIC_GAIN_30DB,
+			     RK3308_ADC_CH1_MIC_GAIN_MIN,
+			     RK3308_ADC_CH1_MIC_GAIN_MAX,
 			     0, rk3308_codec_adc_mic_gain_tlv),
-	SOC_SINGLE_RANGE_TLV("ADC MIC Channel 0 Right Volume",
+	SOC_SINGLE_RANGE_TLV("ADC MIC Group 0 Right Volume",
 			     RK3308_ADC_ANA_CON01(0),
 			     RK3308_ADC_CH2_MIC_GAIN_SFT,
-			     RK3308_ADC_CH2_MIC_GAIN_0DB,
-			     RK3308_ADC_CH2_MIC_GAIN_30DB,
+			     RK3308_ADC_CH2_MIC_GAIN_MIN,
+			     RK3308_ADC_CH2_MIC_GAIN_MAX,
 			     0, rk3308_codec_adc_mic_gain_tlv),
-	SOC_SINGLE_RANGE_TLV("ADC MIC Channel 1 Left Volume",
+	SOC_SINGLE_RANGE_TLV("ADC MIC Group 1 Left Volume",
 			     RK3308_ADC_ANA_CON01(1),
 			     RK3308_ADC_CH1_MIC_GAIN_SFT,
-			     RK3308_ADC_CH1_MIC_GAIN_0DB,
-			     RK3308_ADC_CH1_MIC_GAIN_30DB,
+			     RK3308_ADC_CH1_MIC_GAIN_MIN,
+			     RK3308_ADC_CH1_MIC_GAIN_MAX,
 			     0, rk3308_codec_adc_mic_gain_tlv),
-	SOC_SINGLE_RANGE_TLV("ADC MIC Channel 1 Right Volume",
+	SOC_SINGLE_RANGE_TLV("ADC MIC Group 1 Right Volume",
 			     RK3308_ADC_ANA_CON01(1),
 			     RK3308_ADC_CH2_MIC_GAIN_SFT,
-			     RK3308_ADC_CH2_MIC_GAIN_0DB,
-			     RK3308_ADC_CH2_MIC_GAIN_30DB,
+			     RK3308_ADC_CH2_MIC_GAIN_MIN,
+			     RK3308_ADC_CH2_MIC_GAIN_MAX,
 			     0, rk3308_codec_adc_mic_gain_tlv),
-	SOC_SINGLE_RANGE_TLV("ADC MIC Channel 2 Left Volume",
+	SOC_SINGLE_RANGE_TLV("ADC MIC Group 2 Left Volume",
 			     RK3308_ADC_ANA_CON01(2),
 			     RK3308_ADC_CH1_MIC_GAIN_SFT,
-			     RK3308_ADC_CH1_MIC_GAIN_0DB,
-			     RK3308_ADC_CH1_MIC_GAIN_30DB,
+			     RK3308_ADC_CH1_MIC_GAIN_MIN,
+			     RK3308_ADC_CH1_MIC_GAIN_MAX,
 			     0, rk3308_codec_adc_mic_gain_tlv),
-	SOC_SINGLE_RANGE_TLV("ADC MIC Channel 2 Right Volume",
+	SOC_SINGLE_RANGE_TLV("ADC MIC Group 2 Right Volume",
 			     RK3308_ADC_ANA_CON01(2),
 			     RK3308_ADC_CH2_MIC_GAIN_SFT,
-			     RK3308_ADC_CH2_MIC_GAIN_0DB,
-			     RK3308_ADC_CH2_MIC_GAIN_30DB,
+			     RK3308_ADC_CH2_MIC_GAIN_MIN,
+			     RK3308_ADC_CH2_MIC_GAIN_MAX,
 			     0, rk3308_codec_adc_mic_gain_tlv),
-	SOC_SINGLE_RANGE_TLV("ADC MIC Channel 3 Left Volume",
+	SOC_SINGLE_RANGE_TLV("ADC MIC Group 3 Left Volume",
 			     RK3308_ADC_ANA_CON01(3),
 			     RK3308_ADC_CH1_MIC_GAIN_SFT,
-			     RK3308_ADC_CH1_MIC_GAIN_0DB,
-			     RK3308_ADC_CH1_MIC_GAIN_30DB,
+			     RK3308_ADC_CH1_MIC_GAIN_MIN,
+			     RK3308_ADC_CH1_MIC_GAIN_MAX,
 			     0, rk3308_codec_adc_mic_gain_tlv),
-	SOC_SINGLE_RANGE_TLV("ADC MIC Channel 3 Right Volume",
+	SOC_SINGLE_RANGE_TLV("ADC MIC Group 3 Right Volume",
 			     RK3308_ADC_ANA_CON01(3),
 			     RK3308_ADC_CH2_MIC_GAIN_SFT,
-			     RK3308_ADC_CH2_MIC_GAIN_0DB,
-			     RK3308_ADC_CH2_MIC_GAIN_30DB,
+			     RK3308_ADC_CH2_MIC_GAIN_MIN,
+			     RK3308_ADC_CH2_MIC_GAIN_MAX,
 			     0, rk3308_codec_adc_mic_gain_tlv),
 
 	/* ADC ALC */
-	SOC_SINGLE_RANGE_TLV("ADC ALC Channel 0 Left Volume",
+	SOC_SINGLE_RANGE_TLV("ADC ALC Group 0 Left Volume",
 			     RK3308_ADC_ANA_CON03(0),
 			     RK3308_ADC_CH1_ALC_GAIN_SFT,
-			     RK3308_ADC_CH1_ALC_GAIN_NDB_18,
-			     RK3308_ADC_CH1_ALC_GAIN_PDB_28_5,
+			     RK3308_ADC_CH1_ALC_GAIN_MIN,
+			     RK3308_ADC_CH1_ALC_GAIN_MAX,
 			     0, rk3308_codec_adc_alc_gain_tlv),
-	SOC_SINGLE_RANGE_TLV("ADC ALC Channel 0 Right Volume",
+	SOC_SINGLE_RANGE_TLV("ADC ALC Group 0 Right Volume",
 			     RK3308_ADC_ANA_CON04(0),
 			     RK3308_ADC_CH2_ALC_GAIN_SFT,
-			     RK3308_ADC_CH2_ALC_GAIN_NDB_18,
-			     RK3308_ADC_CH2_ALC_GAIN_PDB_28_5,
+			     RK3308_ADC_CH2_ALC_GAIN_MIN,
+			     RK3308_ADC_CH2_ALC_GAIN_MAX,
 			     0, rk3308_codec_adc_alc_gain_tlv),
-	SOC_SINGLE_RANGE_TLV("ADC ALC Channel 1 Left Volume",
+	SOC_SINGLE_RANGE_TLV("ADC ALC Group 1 Left Volume",
 			     RK3308_ADC_ANA_CON03(1),
 			     RK3308_ADC_CH1_ALC_GAIN_SFT,
-			     RK3308_ADC_CH1_ALC_GAIN_NDB_18,
-			     RK3308_ADC_CH1_ALC_GAIN_PDB_28_5,
+			     RK3308_ADC_CH1_ALC_GAIN_MIN,
+			     RK3308_ADC_CH1_ALC_GAIN_MAX,
 			     0, rk3308_codec_adc_alc_gain_tlv),
-	SOC_SINGLE_RANGE_TLV("ADC ALC Channel 1 Right Volume",
+	SOC_SINGLE_RANGE_TLV("ADC ALC Group 1 Right Volume",
 			     RK3308_ADC_ANA_CON04(1),
 			     RK3308_ADC_CH2_ALC_GAIN_SFT,
-			     RK3308_ADC_CH2_ALC_GAIN_NDB_18,
-			     RK3308_ADC_CH2_ALC_GAIN_PDB_28_5,
+			     RK3308_ADC_CH2_ALC_GAIN_MIN,
+			     RK3308_ADC_CH2_ALC_GAIN_MAX,
 			     0, rk3308_codec_adc_alc_gain_tlv),
-	SOC_SINGLE_RANGE_TLV("ADC ALC Channel 2 Left Volume",
+	SOC_SINGLE_RANGE_TLV("ADC ALC Group 2 Left Volume",
 			     RK3308_ADC_ANA_CON03(2),
 			     RK3308_ADC_CH1_ALC_GAIN_SFT,
-			     RK3308_ADC_CH1_ALC_GAIN_NDB_18,
-			     RK3308_ADC_CH1_ALC_GAIN_PDB_28_5,
+			     RK3308_ADC_CH1_ALC_GAIN_MIN,
+			     RK3308_ADC_CH1_ALC_GAIN_MAX,
 			     0, rk3308_codec_adc_alc_gain_tlv),
-	SOC_SINGLE_RANGE_TLV("ADC ALC Channel 2 Right Volume",
+	SOC_SINGLE_RANGE_TLV("ADC ALC Group 2 Right Volume",
 			     RK3308_ADC_ANA_CON04(2),
 			     RK3308_ADC_CH2_ALC_GAIN_SFT,
-			     RK3308_ADC_CH2_ALC_GAIN_NDB_18,
-			     RK3308_ADC_CH2_ALC_GAIN_PDB_28_5,
+			     RK3308_ADC_CH2_ALC_GAIN_MIN,
+			     RK3308_ADC_CH2_ALC_GAIN_MAX,
 			     0, rk3308_codec_adc_alc_gain_tlv),
-	SOC_SINGLE_RANGE_TLV("ADC ALC Channel 3 Left Volume",
+	SOC_SINGLE_RANGE_TLV("ADC ALC Group 3 Left Volume",
 			     RK3308_ADC_ANA_CON03(3),
 			     RK3308_ADC_CH1_ALC_GAIN_SFT,
-			     RK3308_ADC_CH1_ALC_GAIN_NDB_18,
-			     RK3308_ADC_CH1_ALC_GAIN_PDB_28_5,
+			     RK3308_ADC_CH1_ALC_GAIN_MIN,
+			     RK3308_ADC_CH1_ALC_GAIN_MAX,
 			     0, rk3308_codec_adc_alc_gain_tlv),
-	SOC_SINGLE_RANGE_TLV("ADC ALC Channel 3 Right Volume",
+	SOC_SINGLE_RANGE_TLV("ADC ALC Group 3 Right Volume",
 			     RK3308_ADC_ANA_CON04(3),
 			     RK3308_ADC_CH2_ALC_GAIN_SFT,
-			     RK3308_ADC_CH2_ALC_GAIN_NDB_18,
-			     RK3308_ADC_CH2_ALC_GAIN_PDB_28_5,
+			     RK3308_ADC_CH2_ALC_GAIN_MIN,
+			     RK3308_ADC_CH2_ALC_GAIN_MAX,
 			     0, rk3308_codec_adc_alc_gain_tlv),
 
-	/* DAC */
-	SOC_SINGLE_RANGE_TLV("DAC Left Volume",
-			     RK3308_DAC_ANA_CON04,
-			     RK3308_DAC_L_GAIN_SFT,
-			     RK3308_DAC_L_GAIN_NDB_6,
-			     RK3308_DAC_R_GAIN_0DB,
-			     0, rk3308_codec_dac_gain_tlv),
-	SOC_SINGLE_RANGE_TLV("DAC Right Volume",
-			     RK3308_DAC_ANA_CON04,
-			     RK3308_DAC_R_GAIN_SFT,
-			     RK3308_DAC_R_GAIN_NDB_6,
-			     RK3308_DAC_R_GAIN_0DB,
-			     0, rk3308_codec_dac_gain_tlv),
+	/* DAC LINEOUT */
+	SOC_SINGLE_TLV("DAC LINEOUT Left Volume",
+		       RK3308_DAC_ANA_CON04,
+		       RK3308_DAC_L_LINEOUT_GAIN_SFT,
+		       RK3308_DAC_L_LINEOUT_GAIN_MAX,
+		       0, rk3308_codec_dac_lineout_gain_tlv),
+	SOC_SINGLE_TLV("DAC LINEOUT Right Volume",
+		       RK3308_DAC_ANA_CON04,
+		       RK3308_DAC_R_LINEOUT_GAIN_SFT,
+		       RK3308_DAC_R_LINEOUT_GAIN_MAX,
+		       0, rk3308_codec_dac_lineout_gain_tlv),
 
 	/* DAC HPOUT */
-	SOC_SINGLE_RANGE_TLV("DAC HPOUT Left Volume",
-			     RK3308_DAC_ANA_CON05,
-			     RK3308_DAC_L_HPOUT_GAIN_SFT,
-			     RK3308_DAC_L_HPOUT_GAIN_NDB_39,
-			     RK3308_DAC_L_HPOUT_GAIN_PDB_6,
-			     0, rk3308_codec_dac_hpout_gain_tlv),
-	SOC_SINGLE_RANGE_TLV("DAC HPOUT Right Volume",
-			     RK3308_DAC_ANA_CON06,
-			     RK3308_DAC_R_HPOUT_GAIN_SFT,
-			     RK3308_DAC_R_HPOUT_GAIN_NDB_39,
-			     RK3308_DAC_R_HPOUT_GAIN_PDB_6,
-			     0, rk3308_codec_dac_hpout_gain_tlv),
+	SOC_SINGLE_TLV("DAC HPOUT Left Volume",
+		       RK3308_DAC_ANA_CON05,
+		       RK3308_DAC_L_HPOUT_GAIN_SFT,
+		       RK3308_DAC_L_HPOUT_GAIN_MAX,
+		       0, rk3308_codec_dac_hpout_gain_tlv),
+	SOC_SINGLE_TLV("DAC HPOUT Right Volume",
+		       RK3308_DAC_ANA_CON06,
+		       RK3308_DAC_R_HPOUT_GAIN_SFT,
+		       RK3308_DAC_R_HPOUT_GAIN_MAX,
+		       0, rk3308_codec_dac_hpout_gain_tlv),
 
 	/* DAC HPMIX */
 	SOC_SINGLE_RANGE_TLV("DAC HPMIX Left Volume",
-			     RK3308_DAC_ANA_CON05,
+			     RK3308_DAC_ANA_CON12,
 			     RK3308_DAC_L_HPMIX_GAIN_SFT,
-			     RK3308_DAC_L_HPMIX_GAIN_NDB_6,
-			     RK3308_DAC_L_HPMIX_GAIN_0DB,
+			     RK3308_DAC_L_HPMIX_GAIN_MIN,
+			     RK3308_DAC_L_HPMIX_GAIN_MAX,
 			     0, rk3308_codec_dac_hpmix_gain_tlv),
 	SOC_SINGLE_RANGE_TLV("DAC HPMIX Right Volume",
-			     RK3308_DAC_ANA_CON05,
+			     RK3308_DAC_ANA_CON12,
 			     RK3308_DAC_R_HPMIX_GAIN_SFT,
-			     RK3308_DAC_R_HPMIX_GAIN_NDB_6,
-			     RK3308_DAC_R_HPMIX_GAIN_0DB,
+			     RK3308_DAC_R_HPMIX_GAIN_MIN,
+			     RK3308_DAC_R_HPMIX_GAIN_MAX,
 			     0, rk3308_codec_dac_hpmix_gain_tlv),
 };
 
@@ -666,8 +731,10 @@ static int rk3308_codec_dac_enable(struct rk3308_codec_priv *rk3308)
 
 	/* Step 19 */
 	regmap_update_bits(rk3308->regmap, RK3308_DAC_ANA_CON04,
-			   RK3308_DAC_L_GAIN_MSK | RK3308_DAC_R_GAIN_MSK,
-			   RK3308_DAC_L_GAIN_NDB_6 | RK3308_DAC_R_GAIN_NDB_6);
+			   RK3308_DAC_L_LINEOUT_GAIN_MSK |
+			   RK3308_DAC_R_LINEOUT_GAIN_MSK,
+			   RK3308_DAC_L_LINEOUT_GAIN_NDB_6 |
+			   RK3308_DAC_R_LINEOUT_GAIN_NDB_6);
 
 	return 0;
 }
@@ -676,8 +743,10 @@ static int rk3308_codec_dac_disable(struct rk3308_codec_priv *rk3308)
 {
 	/* Step 01 */
 	regmap_update_bits(rk3308->regmap, RK3308_DAC_ANA_CON04,
-			   RK3308_DAC_L_GAIN_MSK | RK3308_DAC_R_GAIN_MSK,
-			   RK3308_DAC_L_GAIN_NDB_6 | RK3308_DAC_R_GAIN_NDB_6);
+			   RK3308_DAC_L_LINEOUT_GAIN_MSK |
+			   RK3308_DAC_R_LINEOUT_GAIN_MSK,
+			   RK3308_DAC_L_LINEOUT_GAIN_NDB_6 |
+			   RK3308_DAC_R_LINEOUT_GAIN_NDB_6);
 
 	/*
 	 * Step 02
diff --git a/sound/soc/codecs/rk3308_codec.h b/sound/soc/codecs/rk3308_codec.h
index fe16fe33322c..95b1a7e5c79a 100644
--- a/sound/soc/codecs/rk3308_codec.h
+++ b/sound/soc/codecs/rk3308_codec.h
@@ -106,7 +106,7 @@
 /* ADC DIGITAL REGISTERS */
 
 /*
- * The ADC chanel are 0 ~ 3, that control:
+ * The ADC group are 0 ~ 3, that control:
  *
  * CH0: left_0(ADC1) and right_0(ADC2)
  * CH1: left_1(ADC3) and right_1(ADC4)
@@ -156,7 +156,7 @@
 
 /* ADC ANALOG REGISTERS */
 /*
- * The ADC chanel are 0 ~ 3, that control:
+ * The ADC group are 0 ~ 3, that control:
  *
  * CH0: left_0(ADC1) and right_0(ADC2)
  * CH1: left_1(ADC3) and right_1(ADC4)
@@ -391,6 +391,8 @@
  */
 #define RK3308_AGC_PGA_ZERO_CRO_EN		(0x1 << 5)
 #define RK3308_AGC_PGA_ZERO_CRO_DIS		(0x0 << 5)
+#define RK3308_AGC_PGA_GAIN_MAX			0x1f
+#define RK3308_AGC_PGA_GAIN_MIN			0
 #define RK3308_AGC_PGA_GAIN_SFT			0
 #define RK3308_AGC_PGA_GAIN_MSK			(0x1f << RK3308_AGC_PGA_GAIN_SFT)
 #define RK3308_AGC_PGA_GAIN_PDB_28_5		(0x1f << RK3308_AGC_PGA_GAIN_SFT)
@@ -474,6 +476,8 @@
 #define RK3308_AGC_FUNC_SEL_MSK			(0x1 << 6)
 #define RK3308_AGC_FUNC_SEL_EN			(0x1 << 6)
 #define RK3308_AGC_FUNC_SEL_DIS			(0x0 << 6)
+#define RK3308_AGC_MAX_GAIN_PGA_MAX		0x7
+#define RK3308_AGC_MAX_GAIN_PGA_MIN		0
 #define RK3308_AGC_MAX_GAIN_PGA_SFT		3
 #define RK3308_AGC_MAX_GAIN_PGA_MSK		(0x7 << RK3308_AGC_MAX_GAIN_PGA_SFT)
 #define RK3308_AGC_MAX_GAIN_PGA_PDB_28_5	(0x7 << RK3308_AGC_MAX_GAIN_PGA_SFT)
@@ -484,6 +488,8 @@
 #define RK3308_AGC_MAX_GAIN_PGA_NDB_1_5		(0x2 << RK3308_AGC_MAX_GAIN_PGA_SFT)
 #define RK3308_AGC_MAX_GAIN_PGA_NDB_7_5		(0x1 << RK3308_AGC_MAX_GAIN_PGA_SFT)
 #define RK3308_AGC_MAX_GAIN_PGA_NDB_13_5	(0x0 << RK3308_AGC_MAX_GAIN_PGA_SFT)
+#define RK3308_AGC_MIN_GAIN_PGA_MAX		0x7
+#define RK3308_AGC_MIN_GAIN_PGA_MIN		0
 #define RK3308_AGC_MIN_GAIN_PGA_SFT		0
 #define RK3308_AGC_MIN_GAIN_PGA_MSK		(0x7 << RK3308_AGC_MIN_GAIN_PGA_SFT)
 #define RK3308_AGC_MIN_GAIN_PGA_PDB_24		(0x7 << RK3308_AGC_MIN_GAIN_PGA_SFT)
@@ -588,12 +594,16 @@
 #define RK3308_ADC_CH1_BUF_REF_DIS		(0x0 << 0)
 
 /* RK3308_ADC_ANA_CON01 - REG: 0x0344 */
+#define RK3308_ADC_CH2_MIC_GAIN_MAX		0x3
+#define RK3308_ADC_CH2_MIC_GAIN_MIN		0
 #define RK3308_ADC_CH2_MIC_GAIN_SFT		4
 #define RK3308_ADC_CH2_MIC_GAIN_MSK		(0x3 << RK3308_ADC_CH2_MIC_GAIN_SFT)
 #define RK3308_ADC_CH2_MIC_GAIN_30DB		(0x3 << RK3308_ADC_CH2_MIC_GAIN_SFT)
 #define RK3308_ADC_CH2_MIC_GAIN_20DB		(0x2 << RK3308_ADC_CH2_MIC_GAIN_SFT)
 #define RK3308_ADC_CH2_MIC_GAIN_6DB		(0x1 << RK3308_ADC_CH2_MIC_GAIN_SFT)
 #define RK3308_ADC_CH2_MIC_GAIN_0DB		(0x0 << RK3308_ADC_CH2_MIC_GAIN_SFT)
+#define RK3308_ADC_CH1_MIC_GAIN_MAX		0x3
+#define RK3308_ADC_CH1_MIC_GAIN_MIN		0
 #define RK3308_ADC_CH1_MIC_GAIN_SFT		0
 #define RK3308_ADC_CH1_MIC_GAIN_MSK		(0x3 << RK3308_ADC_CH1_MIC_GAIN_SFT)
 #define RK3308_ADC_CH1_MIC_GAIN_30DB		(0x3 << RK3308_ADC_CH1_MIC_GAIN_SFT)
@@ -619,6 +629,8 @@
 #define RK3308_ADC_CH1_ALC_DIS			(0x0 << 0)
 
 /* RK3308_ADC_ANA_CON03 - REG: 0x034c */
+#define RK3308_ADC_CH1_ALC_GAIN_MAX		0x1f
+#define RK3308_ADC_CH1_ALC_GAIN_MIN		0
 #define RK3308_ADC_CH1_ALC_GAIN_SFT		0
 #define RK3308_ADC_CH1_ALC_GAIN_MSK		(0x1f << RK3308_ADC_CH1_ALC_GAIN_SFT)
 #define RK3308_ADC_CH1_ALC_GAIN_PDB_28_5	(0x1f << RK3308_ADC_CH1_ALC_GAIN_SFT)
@@ -655,6 +667,8 @@
 #define RK3308_ADC_CH1_ALC_GAIN_NDB_18		(0x00 << RK3308_ADC_CH1_ALC_GAIN_SFT)
 
 /* RK3308_ADC_ANA_CON04 - REG: 0x0350 */
+#define RK3308_ADC_CH2_ALC_GAIN_MAX		0x1f
+#define RK3308_ADC_CH2_ALC_GAIN_MIN		0
 #define RK3308_ADC_CH2_ALC_GAIN_SFT		0
 #define RK3308_ADC_CH2_ALC_GAIN_MSK		(0x1f << RK3308_ADC_CH2_ALC_GAIN_SFT)
 #define RK3308_ADC_CH2_ALC_GAIN_PDB_28_5	(0x1f << RK3308_ADC_CH2_ALC_GAIN_SFT)
@@ -829,28 +843,31 @@
 #define RK3308_DAC_L_HPOUT_MUTE			(0x0 << 0)
 
 /* RK3308_DAC_ANA_CON04 - REG: 0x0450 */
-#define RK3308_DAC_R_GAIN_SFT			6
-#define RK3308_DAC_R_GAIN_MSK			(0x3 << RK3308_DAC_R_GAIN_SFT)
-#define RK3308_DAC_R_GAIN_0DB			(0x3 << RK3308_DAC_R_GAIN_SFT)
-#define RK3308_DAC_R_GAIN_NDB_1_5		(0x2 << RK3308_DAC_R_GAIN_SFT)
-#define RK3308_DAC_R_GAIN_NDB_3			(0x1 << RK3308_DAC_R_GAIN_SFT)
-#define RK3308_DAC_R_GAIN_NDB_6			(0x0 << RK3308_DAC_R_GAIN_SFT)
+#define RK3308_DAC_R_LINEOUT_GAIN_MAX		0x3
+#define RK3308_DAC_R_LINEOUT_GAIN_SFT		6
+#define RK3308_DAC_R_LINEOUT_GAIN_MSK		(0x3 << RK3308_DAC_R_LINEOUT_GAIN_SFT)
+#define RK3308_DAC_R_LINEOUT_GAIN_0DB		(0x3 << RK3308_DAC_R_LINEOUT_GAIN_SFT)
+#define RK3308_DAC_R_LINEOUT_GAIN_NDB_1_5	(0x2 << RK3308_DAC_R_LINEOUT_GAIN_SFT)
+#define RK3308_DAC_R_LINEOUT_GAIN_NDB_3		(0x1 << RK3308_DAC_R_LINEOUT_GAIN_SFT)
+#define RK3308_DAC_R_LINEOUT_GAIN_NDB_6		(0x0 << RK3308_DAC_R_LINEOUT_GAIN_SFT)
 #define RK3308_DAC_R_LINEOUT_UNMUTE		(0x1 << 5)
 #define RK3308_DAC_R_LINEOUT_MUTE		(0x0 << 5)
 #define RK3308_DAC_R_LINEOUT_EN			(0x1 << 4)
 #define RK3308_DAC_R_LINEOUT_DIS		(0x0 << 4)
-#define RK3308_DAC_L_GAIN_SFT			2
-#define RK3308_DAC_L_GAIN_MSK			(0x3 << RK3308_DAC_L_GAIN_SFT)
-#define RK3308_DAC_L_GAIN_0DB			(0x3 << RK3308_DAC_L_GAIN_SFT)
-#define RK3308_DAC_L_GAIN_NDB_1_5		(0x2 << RK3308_DAC_L_GAIN_SFT)
-#define RK3308_DAC_L_GAIN_NDB_3			(0x1 << RK3308_DAC_L_GAIN_SFT)
-#define RK3308_DAC_L_GAIN_NDB_6			(0x0 << RK3308_DAC_L_GAIN_SFT)
+#define RK3308_DAC_L_LINEOUT_GAIN_MAX		0x3
+#define RK3308_DAC_L_LINEOUT_GAIN_SFT		2
+#define RK3308_DAC_L_LINEOUT_GAIN_MSK		(0x3 << RK3308_DAC_L_LINEOUT_GAIN_SFT)
+#define RK3308_DAC_L_LINEOUT_GAIN_0DB		(0x3 << RK3308_DAC_L_LINEOUT_GAIN_SFT)
+#define RK3308_DAC_L_LINEOUT_GAIN_NDB_1_5	(0x2 << RK3308_DAC_L_LINEOUT_GAIN_SFT)
+#define RK3308_DAC_L_LINEOUT_GAIN_NDB_3		(0x1 << RK3308_DAC_L_LINEOUT_GAIN_SFT)
+#define RK3308_DAC_L_LINEOUT_GAIN_NDB_6		(0x0 << RK3308_DAC_L_LINEOUT_GAIN_SFT)
 #define RK3308_DAC_L_LINEOUT_UNMUTE		(0x1 << 1)
 #define RK3308_DAC_L_LINEOUT_MUTE		(0x0 << 1)
 #define RK3308_DAC_L_LINEOUT_EN			(0x1 << 0)
 #define RK3308_DAC_L_LINEOUT_DIS		(0x0 << 0)
 
 /* RK3308_DAC_ANA_CON05 - REG: 0x0454, step is 1.5db */
+#define RK3308_DAC_L_HPOUT_GAIN_MAX		0x1e
 #define RK3308_DAC_L_HPOUT_GAIN_SFT		0
 #define RK3308_DAC_L_HPOUT_GAIN_MSK		(0x1f << RK3308_DAC_L_HPOUT_GAIN_SFT)
 #define RK3308_DAC_L_HPOUT_GAIN_PDB_6		(0x1e << RK3308_DAC_L_HPOUT_GAIN_SFT)
@@ -886,6 +903,7 @@
 #define RK3308_DAC_L_HPOUT_GAIN_NDB_39		(0x00 << RK3308_DAC_L_HPOUT_GAIN_SFT)
 
 /* RK3308_DAC_ANA_CON06 - REG: 0x0458, step is 1.5db */
+#define RK3308_DAC_R_HPOUT_GAIN_MAX		0x1e
 #define RK3308_DAC_R_HPOUT_GAIN_SFT		0
 #define RK3308_DAC_R_HPOUT_GAIN_MSK		(0x1f << RK3308_DAC_R_HPOUT_GAIN_SFT)
 #define RK3308_DAC_R_HPOUT_GAIN_PDB_6		(0x1e << RK3308_DAC_R_HPOUT_GAIN_SFT)
@@ -927,6 +945,8 @@
 #define RK3308_DAC_R_HPMIX_LINEIN		(0x2 << RK3308_DAC_R_HPMIX_SEL_SFT)
 #define RK3308_DAC_R_HPMIX_I2S			(0x1 << RK3308_DAC_R_HPMIX_SEL_SFT)
 #define RK3308_DAC_R_HPMIX_NONE			(0x0 << RK3308_DAC_R_HPMIX_SEL_SFT)
+#define RK3308_DAC_R_HPMIX_GAIN_MIN		0x1
+#define RK3308_DAC_R_HPMIX_GAIN_MAX		0x2
 #define RK3308_DAC_R_HPMIX_GAIN_SFT		4
 #define RK3308_DAC_R_HPMIX_GAIN_MSK		(0x3 << RK3308_DAC_R_HPMIX_GAIN_SFT)
 #define RK3308_DAC_R_HPMIX_GAIN_0DB		(0x2 << RK3308_DAC_R_HPMIX_GAIN_SFT)
@@ -937,6 +957,8 @@
 #define RK3308_DAC_L_HPMIX_LINEIN		(0x2 << RK3308_DAC_L_HPMIX_SEL_SFT)
 #define RK3308_DAC_L_HPMIX_I2S			(0x1 << RK3308_DAC_L_HPMIX_SEL_SFT)
 #define RK3308_DAC_L_HPMIX_NONE			(0x0 << RK3308_DAC_L_HPMIX_SEL_SFT)
+#define RK3308_DAC_L_HPMIX_GAIN_MIN		0x1
+#define RK3308_DAC_L_HPMIX_GAIN_MAX		0x2
 #define RK3308_DAC_L_HPMIX_GAIN_SFT		0
 #define RK3308_DAC_L_HPMIX_GAIN_MSK		(0x3 << RK3308_DAC_L_HPMIX_GAIN_SFT)
 #define RK3308_DAC_L_HPMIX_GAIN_0DB		(0x2 << RK3308_DAC_L_HPMIX_GAIN_SFT)