summaryrefslogtreecommitdiff
path: root/arch/arm64/boot/dts/mediatek
diff options
context:
space:
mode:
authorLeilk Liu <leilk.liu@mediatek.com>2015-08-31 21:44:19 +0800
committerMatthias Brugger <matthias.bgg@gmail.com>2015-09-27 15:31:55 +0200
commitb0c936f59c8928dac2b230322dd51cbfae289151 (patch)
treeceb0fdccb9b14d157481fe55bcec5eb6bf3e2cf5 /arch/arm64/boot/dts/mediatek
parent1ee35c05d9c67771d649f687e6f76e61e76eb779 (diff)
arm64: dts: Add spi bus dts
This patch adds MT8173 spi bus controllers into device tree. Signed-off-by: Leilk Liu <leilk.liu@mediatek.com> Reviewed-and-Tested-by: Nicolas Boichat <drinkcat@chromium.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'arch/arm64/boot/dts/mediatek')
-rw-r--r--arch/arm64/boot/dts/mediatek/mt8173-evb.dts18
-rw-r--r--arch/arm64/boot/dts/mediatek/mt8173.dtsi13
2 files changed, 31 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
index 4be66cadbc7c..811cb760ba49 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
+++ b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts
@@ -387,6 +387,24 @@
};
};
+&pio {
+ spi_pins_a: spi0 {
+ pins_spi {
+ pinmux = <MT8173_PIN_69_SPI_CK__FUNC_SPI_CK_0_>,
+ <MT8173_PIN_70_SPI_MI__FUNC_SPI_MI_0_>,
+ <MT8173_PIN_71_SPI_MO__FUNC_SPI_MO_0_>,
+ <MT8173_PIN_72_SPI_CS__FUNC_SPI_CS_0_>;
+ };
+ };
+};
+
+&spi {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi_pins_a>;
+ mediatek,pad-select = <0>;
+ status = "okay";
+};
+
&uart0 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 7f360b744571..4bce1676fbd1 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -365,6 +365,19 @@
status = "disabled";
};
+ spi: spi@1100a000 {
+ compatible = "mediatek,mt8173-spi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0 0x1100a000 0 0x1000>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_LOW>;
+ clocks = <&topckgen CLK_TOP_SYSPLL3_D2>,
+ <&topckgen CLK_TOP_SPI_SEL>,
+ <&pericfg CLK_PERI_SPI0>;
+ clock-names = "parent-clk", "sel-clk", "spi-clk";
+ status = "disabled";
+ };
+
i2c3: i2c@11010000 {
compatible = "mediatek,mt8173-i2c";
reg = <0 0x11010000 0 0x70>,