diff options
| author | William Zhang <william.zhang@broadcom.com> | 2022-08-01 12:44:48 -0700 |
|---|---|---|
| committer | Florian Fainelli <f.fainelli@gmail.com> | 2022-08-15 09:35:53 -0700 |
| commit | e636e56a378d73bc4666d410e5d4450ace61e0ab (patch) | |
| tree | 63e5fe253bcbf9068ea82d685cda2c826dbf6674 /arch/arm/boot | |
| parent | ed93a068f3b3ac22423edfaf8509eaafedf3efc0 (diff) | |
ARM: dts: bcmbca: bcm63178: cosmetic change
Add new line between dts node.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20220801194448.29363-4-william.zhang@broadcom.com
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch/arm/boot')
| -rw-r--r-- | arch/arm/boot/dts/bcm63178.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/bcm63178.dtsi b/arch/arm/boot/dts/bcm63178.dtsi index dba71fa53466..cbd094dde6d0 100644 --- a/arch/arm/boot/dts/bcm63178.dtsi +++ b/arch/arm/boot/dts/bcm63178.dtsi @@ -32,6 +32,7 @@ next-level-cache = <&L2_0>; enable-method = "psci"; }; + CA7_2: cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a7"; @@ -39,6 +40,7 @@ next-level-cache = <&L2_0>; enable-method = "psci"; }; + L2_0: l2-cache0 { compatible = "cache"; }; |