diff options
| author | Douglas Anderson <dianders@chromium.org> | 2019-03-20 13:13:59 -0700 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2019-03-21 13:30:51 +0100 |
| commit | a2b2012eab25aad00a7dd587d1754115491e59eb (patch) | |
| tree | 59287fda34b80c7a6cb3ea8168f3137e395816ef /arch/arm/boot/dts/rk3288.dtsi | |
| parent | a008eae6956ac774a220f96de1af6a731e89ceac (diff) | |
ARM: dts: rockchip: Fix gic/efuse sort ordering for rk3288
It can be seen that 0xffb40000 < 0xffc01000, thus efuse comes first.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rk3288.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/rk3288.dtsi | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index b577f3e41811..743a7d85daf7 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -1379,19 +1379,6 @@ reg = <0x0 0xffaf0080 0x0 0x20>; }; - gic: interrupt-controller@ffc01000 { - compatible = "arm,gic-400"; - interrupt-controller; - #interrupt-cells = <3>; - #address-cells = <0>; - - reg = <0x0 0xffc01000 0x0 0x1000>, - <0x0 0xffc02000 0x0 0x2000>, - <0x0 0xffc04000 0x0 0x2000>, - <0x0 0xffc06000 0x0 0x2000>; - interrupts = <GIC_PPI 9 0xf04>; - }; - efuse: efuse@ffb40000 { compatible = "rockchip,rk3288-efuse"; reg = <0x0 0xffb40000 0x0 0x20>; @@ -1405,6 +1392,19 @@ }; }; + gic: interrupt-controller@ffc01000 { + compatible = "arm,gic-400"; + interrupt-controller; + #interrupt-cells = <3>; + #address-cells = <0>; + + reg = <0x0 0xffc01000 0x0 0x1000>, + <0x0 0xffc02000 0x0 0x2000>, + <0x0 0xffc04000 0x0 0x2000>, + <0x0 0xffc06000 0x0 0x2000>; + interrupts = <GIC_PPI 9 0xf04>; + }; + pinctrl: pinctrl { compatible = "rockchip,rk3288-pinctrl"; rockchip,grf = <&grf>; |