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authorYifeng Zhao <zyf@rock-chips.com>2018-06-13 09:36:49 +0800
committerTao Huang <huangtao@rock-chips.com>2018-06-14 09:31:39 +0800
commita4125a4a8204f9f36d9f513b7f043ef8e2cf27cb (patch)
tree67d4332a610690772cd1c57c5e4cebe824937c3c
parentf199655bebd2f554e199053fc8d67381fb85cbf7 (diff)
drivers: rknand: support rk3308
rk3308 has a new nandc, driver need modify to support. Change-Id: I1b30f5ac106759873cd0a14b6340b49232f5106c Signed-off-by: Yifeng Zhao <zyf@rock-chips.com>
Diffstat
-rw-r--r--drivers/rk_nand/rk_ftl_arm_v7_thumb.S17265
1 files changed, 8828 insertions, 8437 deletions
diff --git a/drivers/rk_nand/rk_ftl_arm_v7_thumb.S b/drivers/rk_nand/rk_ftl_arm_v7_thumb.S
index 77de7f91b411..d5ed56072374 100644
--- a/drivers/rk_nand/rk_ftl_arm_v7_thumb.S
+++ b/drivers/rk_nand/rk_ftl_arm_v7_thumb.S
@@ -5,7 +5,7 @@
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
- * date: 2017-12-13
+ * date: 2018-05-28
*/
.syntax unified
.arch armv7-a
@@ -21,6 +21,39 @@
.eabi_attribute 18, 4
.thumb
.file "rk_ftl_arm_v7.S"
+#APP
+ .macro it, cond
+ .endm
+ .macro itt, cond
+ .endm
+ .macro ite, cond
+ .endm
+ .macro ittt, cond
+ .endm
+ .macro itte, cond
+ .endm
+ .macro itet, cond
+ .endm
+ .macro itee, cond
+ .endm
+ .macro itttt, cond
+ .endm
+ .macro ittte, cond
+ .endm
+ .macro ittet, cond
+ .endm
+ .macro ittee, cond
+ .endm
+ .macro itett, cond
+ .endm
+ .macro itete, cond
+ .endm
+ .macro iteet, cond
+ .endm
+ .macro iteee, cond
+ .endm
+
+ .thumb
.text
.align 1
.global FlashMemCmp8
@@ -824,17 +857,16 @@ FlashDieInfoInit:
.fnend
.size FlashDieInfoInit, .-FlashDieInfoInit
.align 1
- .global FlashSuspend
+ .global ftl_flash_suspend
.thumb
.thumb_func
- .type FlashSuspend, %function
-FlashSuspend:
+ .type ftl_flash_suspend, %function
+ftl_flash_suspend:
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
ldr r3, .L137
- movs r0, #0
ldr r2, [r3, #1828]
ldr r1, [r2]
str r1, [r3, #1832]
@@ -858,7 +890,7 @@ FlashSuspend:
.L137:
.word .LANCHOR0
.fnend
- .size FlashSuspend, .-FlashSuspend
+ .size ftl_flash_suspend, .-ftl_flash_suspend
.global __aeabi_uidiv
.align 1
.global LogAddr2PhyAddr
@@ -896,10 +928,10 @@ LogAddr2PhyAddr:
uxtheq fp, fp
mov r1, r5
bl __aeabi_uidiv
+ ldr r3, [sp, #4]
cmp r10, #1
ubfx r1, r4, #0, #10
uxth r0, r0
- ldr r3, [sp, #4]
smulbb r5, r0, r5
sub r3, r3, r5
uxth r3, r3
@@ -939,11 +971,11 @@ LogAddr2PhyAddr:
.fnend
.size LogAddr2PhyAddr, .-LogAddr2PhyAddr
.align 1
- .global ReadFlashInfo
+ .global ftl_read_flash_info
.thumb
.thumb_func
- .type ReadFlashInfo, %function
-ReadFlashInfo:
+ .type ftl_read_flash_info, %function
+ftl_read_flash_info:
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@@ -954,21 +986,15 @@ ReadFlashInfo:
bl __memzero
ldr r3, .L150
movs r5, #1
- ldr r1, [r3, #1788]
+ ldr r2, [r3, #1788]
+ ldrb r1, [r2, #9] @ zero_extendqisi2
ldr r2, [r3, #4]
addw r3, r3, #1620
- ldrb r0, [r1, #9] @ zero_extendqisi2
- smulbb r2, r0, r2
- ldrb r0, [r3, #272] @ zero_extendqisi2
- strb r0, [r4, #7]
- uxth r2, r2
+ smulbb r2, r1, r2
strh r2, [r4, #4] @ unaligned
- ldrb r0, [r1, #13] @ zero_extendqisi2
- muls r2, r0, r2
- ldrh r0, [r1, #14]
- ldrb r1, [r1, #8] @ zero_extendqisi2
- muls r2, r0, r2
- muls r2, r1, r2
+ ldrb r2, [r3, #272] @ zero_extendqisi2
+ strb r2, [r4, #7]
+ ldr r2, [r3, #276]
str r2, [r4] @ unaligned
ldr r2, [r3, #168]
ldrb r0, [r3, #-4] @ zero_extendqisi2
@@ -998,7 +1024,7 @@ ReadFlashInfo:
.L150:
.word .LANCHOR0
.fnend
- .size ReadFlashInfo, .-ReadFlashInfo
+ .size ftl_read_flash_info, .-ftl_read_flash_info
.align 1
.global FlashScheduleEnSet
.thumb
@@ -1010,8 +1036,8 @@ FlashScheduleEnSet:
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
ldr r3, .L153
- ldr r2, [r3, #1896]
- str r0, [r3, #1896]
+ ldr r2, [r3, #1900]
+ str r0, [r3, #1900]
mov r0, r2
bx lr
.L154:
@@ -1156,43 +1182,38 @@ NandcSetMode:
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- push {r3, r4, r5, lr}
- .save {r3, r4, r5, lr}
- ldr r5, .L180
- ldr r3, [r5, #1828]
- ldr r4, [r3]
- ands r3, r0, #6
+ @ link register save eliminated.
+ ldr r3, .L180
+ ands r1, r0, #6
+ ldr r2, [r3, #1828]
+ ldr r3, [r2]
beq .L174
- orr r4, r4, #24576
- lsls r3, r0, #29
- bfc r4, #15, #1
- mov r0, #0
- orr r4, r4, #196608
+ lsls r1, r0, #29
+ orr r3, r3, #24576
+ movw r1, #16641
+ str r1, [r2, #344]
+ ldr r1, .L180+4
+ bfc r3, #15, #1
+ orr r3, r3, #196608
it mi
- orrmi r4, r4, #32768
- bl rknand_get_clk_rate
- ldr r3, [r5, #1828]
- movw r2, #8322
- str r2, [r3, #344]
- add r2, r2, #1040384
- addw r2, r2, #3969
- str r2, [r3, #304]
- movs r2, #38
- str r2, [r3, #308]
- movs r2, #39
- str r2, [r3, #308]
+ orrmi r3, r3, #32768
+ str r1, [r2, #304]
+ movs r1, #38
+ str r1, [r2, #308]
+ movs r1, #39
+ str r1, [r2, #308]
b .L176
.L174:
- bfi r4, r3, #13, #1
+ bfi r3, r1, #13, #1
.L176:
- ldr r3, [r5, #1828]
+ str r3, [r2]
movs r0, #0
- str r4, [r3]
- pop {r3, r4, r5, pc}
+ bx lr
.L181:
.align 2
.L180:
.word .LANCHOR0
+ .word 1710595
.fnend
.size NandcSetMode, .-NandcSetMode
.align 1
@@ -1289,8 +1310,8 @@ FlashReadStatus:
movs r0, #80
add r3, r5, r4, lsl #8
adds r4, r4, #8
- str r2, [r3, #2056]
lsls r4, r4, #8
+ str r2, [r3, #2056]
bl NandcDelayns
ldr r0, [r5, r4]
pop {r3, r4, r5, pc}
@@ -1319,7 +1340,7 @@ ToshibaSetRRPara:
add r10, r9, #288
mov r6, r1
.L195:
- ldrb r3, [r7, #1901] @ zero_extendqisi2
+ ldrb r3, [r7, #1905] @ zero_extendqisi2
cmp r4, r3
bcs .L202
movs r3, #85
@@ -1328,7 +1349,7 @@ ToshibaSetRRPara:
movs r0, #200
str r3, [r5, #4]
bl NandcDelayns
- ldrb r3, [r7, #1900] @ zero_extendqisi2
+ ldrb r3, [r7, #1904] @ zero_extendqisi2
cmp r3, #34
bne .L196
add r3, r4, r8
@@ -1381,7 +1402,7 @@ SamsungSetRRPara:
mov r7, r3
mov r10, r4
.L206:
- ldrb r3, [r8, #1901] @ zero_extendqisi2
+ ldrb r3, [r8, #1905] @ zero_extendqisi2
cmp r4, r3
bcs .L208
str r9, [r6, #8]
@@ -1420,7 +1441,7 @@ HynixSetRRPara:
mov r9, r2
mov r5, r0
mov r8, r1
- addw r4, r6, #1902
+ addw r4, r6, #1906
ldr r3, [r6, #1788]
ldrb r2, [r3, #19] @ zero_extendqisi2
lsls r3, r0, #3
@@ -1466,8 +1487,8 @@ HynixSetRRPara:
str r3, [sp, #4]
bl NandcDelayns
ldrsb r2, [r4, #1]!
- str r2, [r8, #2048]
ldr r3, [sp, #4]
+ str r2, [r8, #2048]
b .L215
.L217:
add fp, fp, r10
@@ -1476,7 +1497,7 @@ HynixSetRRPara:
add r5, r5, r6
str r3, [fp, #2056]
bl NandcFlashDeCs
- strb r7, [r5, #2756]
+ strb r7, [r5, #2760]
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
@@ -1511,8 +1532,8 @@ FlashSetReadRetryDefault:
ldrb r3, [r2, r4, lsl #3] @ zero_extendqisi2
cmp r3, #173
bne .L222
- ldrb r1, [r5, #1903] @ zero_extendqisi2
- adds r2, r2, #114
+ ldrb r1, [r5, #1907] @ zero_extendqisi2
+ adds r2, r2, #118
movs r3, #0
bl HynixSetRRPara
.L222:
@@ -1575,8 +1596,8 @@ FlashReadStatusEN:
movs r2, #112
str r2, [r3, #2056]
.L233:
- movs r0, #80
lsls r4, r4, #8
+ movs r0, #80
bl NandcDelayns
ldr r0, [r6, r4]
uxtb r0, r0
@@ -1786,7 +1807,7 @@ FlashSetInterfaceMode:
mov lr, #128
mov ip, #1
mov r8, #35
- ldrb r3, [r5, #2760] @ zero_extendqisi2
+ ldrb r3, [r5, #2764] @ zero_extendqisi2
mov r9, #32
mov r10, #5
and r2, r3, #1
@@ -1990,10 +2011,10 @@ SandiskSetRRPara:
movs r2, #0
sub r6, r0, #48
.L304:
- ldrb r3, [r1, #1901] @ zero_extendqisi2
+ ldrb r3, [r1, #1905] @ zero_extendqisi2
cmp r2, r3
bcs .L309
- ldrb r3, [r1, #1900] @ zero_extendqisi2
+ ldrb r3, [r1, #1904] @ zero_extendqisi2
cmp r3, #67
add r3, r2, r4
ite eq
@@ -2043,8 +2064,8 @@ FlashEraseSLc2KBlocks:
str r3, [sp]
add r3, sp, #12
bl LogAddr2PhyAddr
- ldrb r2, [r8, #1616] @ zero_extendqisi2
ldr r3, [sp, #12]
+ ldrb r2, [r8, #1616] @ zero_extendqisi2
cmp r3, r2
bcc .L314
mov r3, #-1
@@ -2060,20 +2081,20 @@ FlashEraseSLc2KBlocks:
mov r0, r4
bl NandcFlashCs
movs r2, #0
- mov r0, r4
ldr r1, [sp, #8]
+ mov r0, r4
bl FlashEraseCmd
mov r0, r4
bl NandcWaitFlashReady
- mov r0, r4
ldr r1, [sp, #8]
+ mov r0, r4
bl FlashReadStatus
- movs r2, #0
ldr r3, [sp, #8]
+ movs r2, #0
sbfx r0, r0, #0, #1
str r0, [r6, r5]
- mov r0, r4
ldr r1, [r8, #4]
+ mov r0, r4
add r1, r1, r3
bl FlashEraseCmd
mov r0, r4
@@ -2176,42 +2197,51 @@ FlashReadDpCmd:
.fnend
.size FlashReadDpCmd, .-FlashReadDpCmd
.align 1
- .global FlashDeInit
+ .global ftl_flash_de_init
.thumb
.thumb_func
- .type FlashDeInit, %function
-FlashDeInit:
+ .type ftl_flash_de_init, %function
+ftl_flash_de_init:
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- push {r4, lr}
- .save {r4, lr}
+ push {r3, r4, r5, lr}
+ .save {r3, r4, r5, lr}
movs r0, #0
- ldr r4, .L339
+ ldr r4, .L340
bl NandcWaitFlashReady
bl FlashSetReadRetryDefault
- ldrb r3, [r4, #2761] @ zero_extendqisi2
- cbz r3, .L332
- ldrb r3, [r4, #2760] @ zero_extendqisi2
+ ldr r3, .L340+4
+ ldr r2, [r4, #2768]
+ cmp r2, r3
+ bne .L332
+ movs r0, #0
+ bl flash_enter_slc_mode
+.L332:
+ ldrb r3, [r4, #2772] @ zero_extendqisi2
+ ldr r5, .L340
+ cbz r3, .L333
+ ldrb r3, [r5, #2764] @ zero_extendqisi2
lsls r3, r3, #31
- bpl .L332
+ bpl .L333
movs r0, #1
bl FlashSetInterfaceMode
movs r0, #1
bl NandcSetMode
movs r3, #0
- strb r3, [r4, #2761]
-.L332:
+ strb r3, [r5, #2772]
+.L333:
ldr r3, [r4, #12]
movs r0, #0
str r0, [r3, #336]
- pop {r4, pc}
-.L340:
+ pop {r3, r4, r5, pc}
+.L341:
.align 2
-.L339:
+.L340:
.word .LANCHOR0
+ .word 1446522928
.fnend
- .size FlashDeInit, .-FlashDeInit
+ .size ftl_flash_de_init, .-ftl_flash_de_init
.align 1
.global NandcRandmzSel
.thumb
@@ -2222,14 +2252,14 @@ NandcRandmzSel:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L342
+ ldr r3, .L343
add r0, r3, r0, lsl #3
ldr r3, [r0, #12]
str r1, [r3, #336]
bx lr
-.L343:
+.L344:
.align 2
-.L342:
+.L343:
.word .LANCHOR0
.fnend
.size NandcRandmzSel, .-NandcRandmzSel
@@ -2248,45 +2278,45 @@ NandcTimeCfg:
mov r4, r0
movs r0, #0
bl rknand_get_clk_rate
- ldr r1, .L354
+ ldr r1, .L355
bl __aeabi_idiv
- ldr r3, .L354+4
+ ldr r3, .L355+4
ldr r3, [r3, #1828]
cmp r0, #250
- ble .L345
+ ble .L346
movw r2, #8354
- b .L352
-.L345:
+ b .L353
+.L346:
cmp r0, #220
- bgt .L353
+ bgt .L354
cmp r0, #185
- ble .L348
+ ble .L349
movw r2, #4226
- b .L352
-.L348:
+ b .L353
+.L349:
cmp r0, #160
- ble .L349
+ ble .L350
movw r2, #4194
- b .L352
-.L349:
+ b .L353
+.L350:
cmp r4, #35
- bhi .L350
+ bhi .L351
movw r2, #4193
- b .L352
-.L350:
+ b .L353
+.L351:
cmp r4, #99
- bls .L351
-.L353:
+ bls .L352
+.L354:
movw r2, #8322
- b .L352
-.L351:
- movw r2, #4225
+ b .L353
.L352:
+ movw r2, #4225
+.L353:
str r2, [r3, #4]
pop {r4, pc}
-.L355:
+.L356:
.align 2
-.L354:
+.L355:
.word 1000000
.word .LANCHOR0
.fnend
@@ -2304,25 +2334,25 @@ FlashTimingCfg:
sub r3, r0, #4192
subs r3, r3, #1
cmp r3, #1
- bls .L357
+ bls .L358
sub r3, r0, #4224
subs r3, r3, #1
cmp r3, #1
- bls .L357
+ bls .L358
movw r3, #8322
cmp r0, r3
- bne .L358
-.L357:
- ldr r3, .L359
+ bne .L359
+.L358:
+ ldr r3, .L360
ldr r3, [r3, #1828]
str r0, [r3, #4]
-.L358:
- ldr r3, .L359+4
+.L359:
+ ldr r3, .L360+4
ldrb r0, [r3, #277] @ zero_extendqisi2
b NandcTimeCfg
-.L360:
+.L361:
.align 2
-.L359:
+.L360:
.word .LANCHOR0
.word .LANCHOR1
.fnend
@@ -2338,32 +2368,39 @@ NandcInit:
@ frame_needed = 0, uses_anonymous_args = 0
push {r3, r4, r5, lr}
.save {r3, r4, r5, lr}
+ movs r1, #0
+ ldr r3, .L364
+ movs r2, #1
movs r5, #0
- ldr r4, .L362
- movs r3, #1
- str r0, [r4, #1828]
- str r0, [r4, #12]
- str r3, [r4, #24]
- movs r3, #2
- str r0, [r4, #20]
- str r3, [r4, #32]
- movs r3, #3
- str r0, [r4, #28]
- str r0, [r4, #36]
- str r5, [r4, #16]
- str r3, [r4, #40]
- ldr r3, [r0]
- and r3, r3, #253952
- ubfx r2, r3, #13, #1
- str r2, [r4, #2764]
- ldr r2, [r0, #352]
- and r3, r3, #245760
- orr r3, r3, #256
- ubfx r2, r2, #16, #4
- str r2, [r4, #2768]
- ldr r2, [r0, #352]
- str r2, [r4, #2772]
- str r3, [r0]
+ str r1, [r3, #16]
+ str r0, [r3, #12]
+ str r2, [r3, #24]
+ movs r2, #2
+ str r0, [r3, #20]
+ str r2, [r3, #32]
+ movs r2, #3
+ str r0, [r3, #28]
+ str r0, [r3, #36]
+ str r0, [r3, #1828]
+ str r2, [r3, #40]
+ ldr r2, [r0]
+ and r2, r2, #253952
+ ubfx r4, r2, #13, #1
+ bfi r2, r1, #13, #1
+ ldr r1, [r0, #352]
+ orr r2, r2, #256
+ str r4, [r3, #2776]
+ movw r4, #2049
+ ubfx r1, r1, #16, #4
+ str r1, [r3, #2780]
+ ldr r1, [r0, #352]
+ cmp r1, r4
+ mov r4, r3
+ str r1, [r3, #2768]
+ itt eq
+ moveq r3, #8
+ streq r3, [r4, #2780]
+ str r2, [r0]
movs r0, #40
ldr r3, [r4, #1828]
str r5, [r3, #336]
@@ -2372,21 +2409,21 @@ NandcInit:
movw r2, #8322
mov r0, #36864
str r2, [r3, #344]
- ldr r2, .L362+4
+ ldr r2, .L364+4
str r2, [r3, #304]
bl ftl_malloc
- str r5, [r4, #2804]
str r5, [r4, #2812]
- str r0, [r4, #2776]
- str r0, [r4, #2780]
- add r0, r0, #32768
+ str r5, [r4, #2820]
str r0, [r4, #2784]
+ str r0, [r4, #2788]
+ add r0, r0, #32768
+ str r0, [r4, #2792]
pop {r3, r4, r5, pc}
-.L363:
+.L365:
.align 2
-.L362:
+.L364:
.word .LANCHOR0
- .word 1579009
+ .word 1710593
.fnend
.size NandcInit, .-NandcInit
.align 1
@@ -2400,7 +2437,7 @@ NandcGetTimeCfg:
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, lr}
.save {r4, r5, lr}
- ldr r4, .L365
+ ldr r4, .L367
ldr r5, [r4, #1828]
ldr r5, [r5, #4]
str r5, [r0]
@@ -2417,9 +2454,9 @@ NandcGetTimeCfg:
orr r2, r2, r1, lsl #16
str r2, [r3]
pop {r4, r5, pc}
-.L366:
+.L368:
.align 2
-.L365:
+.L367:
.word .LANCHOR0
.fnend
.size NandcGetTimeCfg, .-NandcGetTimeCfg
@@ -2433,37 +2470,37 @@ NandcBchSel:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L375
+ ldr r3, .L377
movs r1, #1
ldr r2, [r3, #1828]
- str r0, [r3, #2816]
+ str r0, [r3, #2824]
movs r3, #0
str r1, [r2, #8]
movs r1, #16
cmp r0, r1
bfi r3, r1, #8, #8
bfc r3, #18, #1
- bne .L368
-.L371:
+ bne .L370
+.L373:
bfc r3, #4, #1
- b .L369
-.L368:
+ b .L371
+.L370:
cmp r0, #24
- bne .L370
+ bne .L372
orr r3, r3, #16
- b .L369
-.L370:
+ b .L371
+.L372:
cmp r0, #40
orr r3, r3, #262144
orr r3, r3, #16
- beq .L371
-.L369:
+ beq .L373
+.L371:
orr r3, r3, #1
str r3, [r2, #12]
bx lr
-.L376:
+.L378:
.align 2
-.L375:
+.L377:
.word .LANCHOR0
.fnend
.size NandcBchSel, .-NandcBchSel
@@ -2477,32 +2514,33 @@ FlashBchSel:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L378
+ ldr r3, .L380
strb r0, [r3, #1892]
b NandcBchSel
-.L379:
+.L381:
.align 2
-.L378:
+.L380:
.word .LANCHOR0
.fnend
.size FlashBchSel, .-FlashBchSel
.align 1
- .global FlashResume
+ .global ftl_flash_resume
.thumb
.thumb_func
- .type FlashResume, %function
-FlashResume:
+ .type ftl_flash_resume, %function
+ftl_flash_resume:
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L388
- push {r4, r5, r6, lr}
- .save {r4, r5, r6, lr}
+ push {r3, r4, r5, r6, r7, lr}
+ .save {r3, r4, r5, r6, r7, lr}
movs r5, #0
+ ldr r3, .L390
+ add r7, r3, #1792
ldr r2, [r3, #1828]
- add r6, r3, #1792
- ldr r1, [r3, #1832]
mov r4, r3
+ ldr r1, [r3, #1832]
+ ldr r6, [r3, #1848]
str r1, [r2]
ldr r1, [r3, #1836]
ldr r2, [r3, #1828]
@@ -2511,97 +2549,53 @@ FlashResume:
str r1, [r2, #8]
ldr r1, [r3, #1844]
str r1, [r2, #12]
- ldr r1, [r3, #1848]
- str r1, [r2, #304]
ldr r1, [r3, #1852]
+ str r6, [r2, #304]
str r1, [r2, #308]
ldr r1, [r3, #1856]
str r1, [r2, #336]
ldr r1, [r3, #1860]
str r1, [r2, #344]
-.L382:
- ldrb r3, [r6, r5, lsl #3] @ zero_extendqisi2
+.L384:
+ ldrb r3, [r7, r5, lsl #3] @ zero_extendqisi2
subs r3, r3, #1
uxtb r3, r3
cmp r3, #253
- bhi .L381
+ bhi .L383
uxtb r0, r5
bl FlashReset
-.L381:
+.L383:
adds r5, r5, #1
cmp r5, #4
- bne .L382
- ldrb r3, [r4, #2761] @ zero_extendqisi2
- ldr r5, .L388
- cbz r3, .L383
+ bne .L384
+ ldrb r3, [r4, #2772] @ zero_extendqisi2
+ ldr r5, .L390
+ cbz r3, .L385
movs r0, #1
bl NandcSetMode
- ldrb r0, [r5, #2760] @ zero_extendqisi2
+ ldrb r0, [r5, #2764] @ zero_extendqisi2
bl FlashSetInterfaceMode
- ldrb r0, [r5, #2760] @ zero_extendqisi2
+ ldrb r0, [r5, #2764] @ zero_extendqisi2
bl NandcSetMode
- ldrb r0, [r5, #1849] @ zero_extendqisi2
+ ubfx r0, r6, #8, #8
bl NandcSetDdrPara
-.L383:
+.L385:
ldr r3, [r4, #1788]
ldrb r0, [r3, #20] @ zero_extendqisi2
- bl FlashBchSel
- movs r0, #0
- pop {r4, r5, r6, pc}
-.L389:
+ pop {r3, r4, r5, r6, r7, lr}
+ b FlashBchSel
+.L391:
.align 2
-.L388:
+.L390:
.word .LANCHOR0
.fnend
- .size FlashResume, .-FlashResume
+ .size ftl_flash_resume, .-ftl_flash_resume
.align 1
- .global NandCIrqEnable
+ .global ftl_nandc_get_irq_status
.thumb
.thumb_func
- .type NandCIrqEnable, %function
-NandCIrqEnable:
- .fnstart
- @ args = 0, pretend = 0, frame = 0
- @ frame_needed = 0, uses_anonymous_args = 0
- @ link register save eliminated.
- movs r3, #1
- ldr r2, [r0, #368]
- lsls r3, r3, r1
- orrs r2, r2, r3
- str r2, [r0, #368]
- ldr r2, [r0, #364]
- orrs r3, r3, r2
- str r3, [r0, #364]
- bx lr
- .fnend
- .size NandCIrqEnable, .-NandCIrqEnable
- .align 1
- .global NandCIrqDisable
- .thumb
- .thumb_func
- .type NandCIrqDisable, %function
-NandCIrqDisable:
- .fnstart
- @ args = 0, pretend = 0, frame = 0
- @ frame_needed = 0, uses_anonymous_args = 0
- @ link register save eliminated.
- movs r3, #1
- ldr r2, [r0, #368]
- lsls r3, r3, r1
- orrs r2, r2, r3
- str r2, [r0, #368]
- ldr r2, [r0, #364]
- bic r3, r2, r3
- str r3, [r0, #364]
- bx lr
- .fnend
- .size NandCIrqDisable, .-NandCIrqDisable
- .align 1
- .global rk_nandc_get_irq_status
- .thumb
- .thumb_func
- .type rk_nandc_get_irq_status, %function
-rk_nandc_get_irq_status:
+ .type ftl_nandc_get_irq_status, %function
+ftl_nandc_get_irq_status:
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@@ -2609,7 +2603,7 @@ rk_nandc_get_irq_status:
ldr r0, [r0, #372]
bx lr
.fnend
- .size rk_nandc_get_irq_status, .-rk_nandc_get_irq_status
+ .size ftl_nandc_get_irq_status, .-ftl_nandc_get_irq_status
.align 1
.global rk_nandc_flash_ready
.thumb
@@ -2620,8 +2614,13 @@ rk_nandc_flash_ready:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- movs r1, #1
- b NandCIrqDisable
+ ldr r3, [r0, #368]
+ orr r3, r3, #2
+ str r3, [r0, #368]
+ ldr r3, [r0, #364]
+ bic r3, r3, #2
+ str r3, [r0, #364]
+ bx lr
.fnend
.size rk_nandc_flash_ready, .-rk_nandc_flash_ready
.align 1
@@ -2637,19 +2636,26 @@ NandcIqrWaitFlashReady:
.save {r4, lr}
mov r4, r0
bl rk_nandc_rb_irq_flag_init
- mov r0, r4
- movs r1, #1
- bl NandCIrqEnable
+ ldr r3, [r4, #368]
+ orr r3, r3, #2
+ str r3, [r4, #368]
+ ldr r3, [r4, #364]
+ orr r3, r3, #2
+ str r3, [r4, #364]
ldr r3, [r4]
- mov r0, r4
lsls r3, r3, #22
bmi .L395
+ mov r0, r4
pop {r4, lr}
b wait_for_nand_flash_ready
.L395:
- movs r1, #1
- pop {r4, lr}
- b NandCIrqDisable
+ ldr r3, [r4, #368]
+ orr r3, r3, #2
+ str r3, [r4, #368]
+ ldr r3, [r4, #364]
+ bic r3, r3, #2
+ str r3, [r4, #364]
+ pop {r4, pc}
.fnend
.size NandcIqrWaitFlashReady, .-NandcIqrWaitFlashReady
.align 1
@@ -2664,21 +2670,21 @@ FlashEraseBlocks:
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r9, r0
- ldr r4, .L425
+ ldr r4, .L430
.pad #28
sub sp, sp, #28
mov r10, r1
mov r8, r2
ldrb r5, [r4] @ zero_extendqisi2
- cbz r5, .L410
+ cbz r5, .L414
mov r1, r2
bl FlashEraseSLc2KBlocks
b .L398
-.L410:
+.L414:
mov fp, r4
.L397:
cmp r5, r8
- bcs .L423
+ bcs .L428
movs r3, #36
movs r1, #0
add r2, sp, #16
@@ -2700,7 +2706,7 @@ FlashEraseBlocks:
str r3, [r9, r6]
b .L400
.L399:
- ldrb r3, [fp, #2820] @ zero_extendqisi2
+ ldrb r3, [fp, #2828] @ zero_extendqisi2
cmp r3, #0
add r3, r4, r0, lsl #4
it eq
@@ -2751,24 +2757,25 @@ FlashEraseBlocks:
movne r2, #1
bl FlashWaitReadyEN
mov r0, r6
- mov r2, r7
ldr r1, [sp, #16]
+ mov r2, r7
bl FlashEraseCmd
mov r0, r6
bl NandcFlashDeCs
.L400:
adds r5, r5, #1
b .L397
-.L423:
+.L428:
ldr r0, [r4, #1828]
movs r5, #0
bl NandcIqrWaitFlashReady
- ldr r6, .L425
+ ldr r6, .L430
addw r7, r6, #1660
.L407:
- ldrb r3, [r4, #1616] @ zero_extendqisi2
- cmp r5, r3
- bcs .L424
+ ldrb r2, [r4, #1616] @ zero_extendqisi2
+ ldr r3, .L430
+ cmp r5, r2
+ bcs .L429
uxtb r0, r5
bl FlashWaitCmdDone
cmp r10, #1
@@ -2781,15 +2788,33 @@ FlashEraseBlocks:
.L408:
adds r5, r5, #1
b .L407
-.L424:
+.L429:
+ ldr r2, [r3, #2832]
+ cbnz r2, .L410
+.L412:
movs r0, #0
+ b .L398
+.L410:
+ ldrb r3, [r3, #1792] @ zero_extendqisi2
+ cmp r3, #69
+ bne .L412
+ movs r3, #0
+ movs r2, #36
+ mov r1, r3
+.L411:
+ cmp r3, r8
+ beq .L412
+ mul r0, r2, r3
+ adds r3, r3, #1
+ str r1, [r9, r0]
+ b .L411
.L398:
add sp, sp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L426:
+.L431:
.align 2
-.L425:
+.L430:
.word .LANCHOR0
.fnend
.size FlashEraseBlocks, .-FlashEraseBlocks
@@ -2803,8 +2828,13 @@ rk_nandc_flash_xfer_completed:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- movs r1, #0
- b NandCIrqDisable
+ ldr r3, [r0, #368]
+ orr r3, r3, #1
+ str r3, [r0, #368]
+ ldr r3, [r0, #364]
+ bic r3, r3, #1
+ str r3, [r0, #364]
+ bx lr
.fnend
.size rk_nandc_flash_xfer_completed, .-rk_nandc_flash_xfer_completed
.align 1
@@ -2820,7 +2850,7 @@ NandcSendDumpDataStart:
ldr r2, [r0, #16]
.pad #8
sub sp, sp, #8
- ldr r3, .L429
+ ldr r3, .L434
str r2, [sp, #4]
ldr r2, [sp, #4]
bic r2, r2, #4
@@ -2833,9 +2863,9 @@ NandcSendDumpDataStart:
add sp, sp, #8
@ sp needed
bx lr
-.L430:
+.L435:
.align 2
-.L429:
+.L434:
.word 538969130
.fnend
.size NandcSendDumpDataStart, .-NandcSendDumpDataStart
@@ -2851,12 +2881,12 @@ NandcSendDumpDataDone:
@ link register save eliminated.
.pad #8
sub sp, sp, #8
-.L432:
+.L437:
ldr r3, [r0, #8]
str r3, [sp, #4]
ldr r3, [sp, #4]
lsls r3, r3, #11
- bpl .L432
+ bpl .L437
add sp, sp, #8
@ sp needed
bx lr
@@ -2879,15 +2909,15 @@ NandcXferStart:
mov r7, r1
ldr r2, [sp, #60]
ldr fp, [sp, #56]
- cbnz r2, .L449
+ cbnz r2, .L454
adds r2, fp, #0
it ne
movne r2, #1
- b .L436
-.L449:
+ b .L441
+.L454:
movs r2, #1
-.L436:
- ldr r5, .L454
+.L441:
+ ldr r5, .L459
movs r4, #0
add r0, r5, r0, lsl #3
ldr r6, [r0, #12]
@@ -2905,32 +2935,35 @@ NandcXferStart:
orr r4, r4, #536870912
orr r4, r4, #1024
bfi r4, r3, #4, #1
- ldr r3, [r5, #2768]
+ ldr r3, [r5, #2780]
cmp r3, #3
- bls .L437
+ bls .L442
ldr r3, [r6, #16]
str r3, [sp, #12]
ldr r3, [sp, #12]
bic r3, r3, #4
str r3, [sp, #12]
cmp r2, #0
- beq .L438
- cbnz r7, .L439
-.L447:
- add r8, r8, #1
+ beq .L443
+ cbnz r7, .L444
+.L452:
mov r0, r6
+ add r8, r8, #1
bl rk_nandc_xfer_irq_flag_init
- mov r0, r6
- movs r1, #0
+ ldr r3, [r6, #368]
asr r8, r8, #1
- bl NandCIrqEnable
+ orr r3, r3, #1
+ str r3, [r6, #368]
+ ldr r3, [r6, #364]
bfi r4, r8, #22, #6
+ orr r3, r3, #1
+ str r3, [r6, #364]
cmp fp, #0
- beq .L440
+ beq .L445
mov r0, fp
- b .L441
-.L439:
- ldr r3, [r5, #2816]
+ b .L446
+.L444:
+ ldr r3, [r5, #2824]
mov ip, r5
ldr r0, [sp, #60]
cmp r3, #25
@@ -2942,53 +2975,53 @@ NandcXferStart:
str r3, [sp, #4]
movs r3, #0
mov r1, r3
-.L443:
+.L448:
ldr r2, [sp, #4]
cmp r1, r2
- bcs .L447
+ bcs .L452
ldr r2, [sp, #60]
lsr r10, r3, #2
- cbz r2, .L444
+ cbz r2, .L449
ldrh r2, [r0, #2]
ldrh lr, [r0], #4
orr lr, lr, r2, lsl #16
- ldr r2, [ip, #2784]
+ ldr r2, [ip, #2792]
str lr, [r2, r10, lsl #2]
- b .L445
-.L444:
- ldr r2, [ip, #2784]
+ b .L450
+.L449:
+ ldr r2, [ip, #2792]
mov lr, r2
mov r2, #-1
str r2, [lr, r10, lsl #2]
-.L445:
+.L450:
ldr r2, [sp]
adds r1, r1, #1
add r3, r3, r2
- b .L443
-.L440:
- ldr r0, [r5, #2780]
-.L441:
- ldr r3, [r5, #2784]
+ b .L448
+.L445:
+ ldr r0, [r5, #2788]
+.L446:
+ ldr r3, [r5, #2792]
ubfx r8, r4, #22, #5
mov r2, r7
- str r0, [r5, #2788]
+ str r0, [r5, #2796]
lsl r1, r8, #10
- str r3, [r5, #2792]
+ str r3, [r5, #2800]
bl rknand_dma_map_single
mov r2, r7
lsl r1, r8, #7
clz r7, r7
lsrs r7, r7, #5
- str r0, [r5, #2796]
- ldr r0, [r5, #2792]
+ str r0, [r5, #2804]
+ ldr r0, [r5, #2800]
bl rknand_dma_map_single
movs r3, #1
- str r3, [r5, #2804]
+ str r3, [r5, #2812]
tst fp, #3
- ldr r3, [r5, #2796]
- str r0, [r5, #2800]
+ ldr r3, [r5, #2804]
+ str r0, [r5, #2808]
str r3, [r6, #20]
- ldr r3, [r5, #2800]
+ ldr r3, [r5, #2808]
str r3, [r6, #24]
mov r3, #0
str r3, [sp, #12]
@@ -3014,10 +3047,10 @@ NandcXferStart:
ldr r3, [sp, #12]
orr r3, r3, #1
str r3, [sp, #12]
-.L438:
+.L443:
ldr r3, [sp, #12]
str r3, [r6, #16]
-.L437:
+.L442:
str r9, [r6, #12]
str r4, [r6, #8]
orr r4, r4, #4
@@ -3025,9 +3058,9 @@ NandcXferStart:
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L455:
+.L460:
.align 2
-.L454:
+.L459:
.word .LANCHOR0
.fnend
.size NandcXferStart, .-NandcXferStart
@@ -3043,14 +3076,14 @@ Ftl_log2:
@ link register save eliminated.
movs r1, #0
movs r2, #1
-.L457:
+.L462:
cmp r2, r0
uxth r3, r1
add r1, r1, #1
- bhi .L459
+ bhi .L464
lsls r2, r2, #1
- b .L457
-.L459:
+ b .L462
+.L464:
subs r0, r3, #1
uxth r0, r0
bx lr
@@ -3079,25 +3112,25 @@ FtlSysBlkNumInit:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L463
+ ldr r3, .L468
cmp r0, #23
it ls
movls r0, #24
- ldrh r2, [r3, #2828]
- ldrh r1, [r3, #2838]
- str r0, [r3, #2824]
+ ldrh r2, [r3, #2840]
+ ldrh r1, [r3, #2850]
+ str r0, [r3, #2836]
muls r2, r0, r2
subs r0, r1, r0
- ldr r1, [r3, #2844]
- strh r0, [r3, #2836] @ movhi
+ ldr r1, [r3, #2856]
+ strh r0, [r3, #2848] @ movhi
movs r0, #0
- str r2, [r3, #2832]
+ str r2, [r3, #2844]
subs r2, r1, r2
- str r2, [r3, #2840]
+ str r2, [r3, #2852]
bx lr
-.L464:
+.L469:
.align 2
-.L463:
+.L468:
.word .LANCHOR0
.fnend
.size FtlSysBlkNumInit, .-FtlSysBlkNumInit
@@ -3116,29 +3149,29 @@ FtlConstantsInit:
ldrh r2, [r5, #14]
.pad #20
sub sp, sp, #20
- ldr r4, .L494
+ ldr r4, .L498
ldrh lr, [r0, #8]
str r2, [sp]
- addw r1, r4, #2856
+ addw r1, r4, #2868
ldrh r2, [sp]
ldrh r3, [r0, #10]
ldrh r0, [r0, #12]
- strh r2, [r4, #2838] @ movhi
+ strh r2, [r4, #2850] @ movhi
movs r2, #0
- strh lr, [r4, #2848] @ movhi
- strh r3, [r4, #2850] @ movhi
- strh r0, [r4, #2852] @ movhi
-.L466:
+ strh lr, [r4, #2860] @ movhi
+ strh r3, [r4, #2862] @ movhi
+ strh r0, [r4, #2864] @ movhi
+.L471:
strb r2, [r2, r1]
adds r2, r2, #1
cmp r2, #32
- bne .L466
+ bne .L471
ldrh r1, [r5, #14]
ldrh r2, [r5, #20]
cmp r2, r1, lsr #8
- bcs .L467
+ bcs .L472
uxtb r10, r0
- ldr r9, .L494+4
+ ldr r9, .L498+4
lsl r2, r10, #1
uxtb r2, r2
str r2, [sp, #8]
@@ -3146,9 +3179,9 @@ FtlConstantsInit:
muls r2, r0, r2
str r2, [sp, #4]
movs r2, #0
-.L468:
+.L473:
cmp r2, r0
- bcs .L470
+ bcs .L475
ldr r6, [sp, #4]
rsb ip, r0, r2
uxtb r1, r2
@@ -3158,10 +3191,10 @@ FtlConstantsInit:
str r6, [sp, #12]
movs r6, #0
mov r8, r6
-.L471:
+.L476:
cmp r8, r3
add r6, r6, r0
- bcs .L493
+ bcs .L497
ldr r7, [sp, #12]
add fp, r1, r10
strb r1, [ip, r6]
@@ -3170,176 +3203,182 @@ FtlConstantsInit:
ldr r7, [sp, #8]
add r1, r1, r7
uxtb r1, r1
- b .L471
-.L493:
+ b .L476
+.L497:
adds r2, r2, #1
- b .L468
-.L470:
+ b .L473
+.L475:
lsls r3, r3, #1
- strh r3, [r4, #2850] @ movhi
+ strh r3, [r4, #2862] @ movhi
ldr r3, [sp]
lsrs r7, r3, #1
- strh r7, [r4, #2838] @ movhi
-.L467:
+ strh r7, [r4, #2850] @ movhi
+.L472:
cmp lr, #1
mov r3, #5
- strh r3, [r4, #2888] @ movhi
+ strh r3, [r4, #2900] @ movhi
mov r3, #0
- strh r3, [r4, #2890] @ movhi
+ strh r3, [r4, #2902] @ movhi
it eq
- ldreq r3, .L494
+ ldreq r3, .L498
ldrb r8, [r4] @ zero_extendqisi2
it eq
- strheq lr, [r3, #2888] @ movhi
+ strheq lr, [r3, #2900] @ movhi
mov r3, #4352
- strh r3, [r4, #2892] @ movhi
+ strh r3, [r4, #2904] @ movhi
cmp r8, #0
- beq .L473
- ldr r3, .L494
+ beq .L478
+ ldr r3, .L498
mov r2, #384
- strh r2, [r3, #2892] @ movhi
-.L473:
- ldrh r6, [r4, #2838]
- ldrh r7, [r4, #2850]
+ strh r2, [r3, #2904] @ movhi
+.L478:
+ ldrh r6, [r4, #2850]
+ ldrh r7, [r4, #2862]
smulbb r7, r7, r0
smulbb r0, r6, r0
uxth r7, r7
- strh r7, [r4, #2828] @ movhi
+ strh r7, [r4, #2840] @ movhi
uxth r0, r0
- strh r0, [r4, #2894] @ movhi
+ strh r0, [r4, #2906] @ movhi
bl Ftl_log2
ldrh r9, [r5, #16]
ldrh fp, [r5, #20]
ldrh r1, [r5, #18]
smulbb r3, r7, r9
- strh r9, [r4, #2898] @ movhi
- strh r1, [r4, #2900] @ movhi
- strh fp, [r4, #2904] @ movhi
- strh r3, [r4, #2902] @ movhi
- strh r0, [r4, #2896] @ movhi
- mov r0, fp
+ strh r9, [r4, #2910] @ movhi
+ strh r1, [r4, #2912] @ movhi
str r1, [sp]
+ strh fp, [r4, #2916] @ movhi
+ strh r3, [r4, #2914] @ movhi
+ strh r0, [r4, #2908] @ movhi
+ mov r0, fp
bl Ftl_log2
lsl r3, fp, #9
cmp r6, #1024
+ ldr r1, [sp]
uxth r3, r3
- strh r3, [r4, #2908] @ movhi
+ strh r3, [r4, #2920] @ movhi
it hi
- ldrhi r2, .L494
+ ldrhi r2, .L498
lsr r3, r3, #8
- strh r3, [r4, #2910] @ movhi
+ strh r3, [r4, #2922] @ movhi
ldrh r3, [r5, #26]
- strh r3, [r4, #2912] @ movhi
+ mul r1, r1, fp
+ strh r3, [r4, #2924] @ movhi
mul r3, r6, r7
- str r3, [r4, #2844]
+ str r3, [r4, #2856]
itt hi
uxtbhi r3, r6
- strhhi r3, [r2, #2890] @ movhi
+ strhhi r3, [r2, #2902] @ movhi
mov r10, r0
- ldrh r5, [r4, #2890]
- ldr r1, [sp]
+ ldrh r5, [r4, #2902]
+ strh r0, [r4, #2918] @ movhi
subs r5, r6, r5
- strh r0, [r4, #2906] @ movhi
- ldrh r0, [r4, #2892]
+ ldrh r0, [r4, #2904]
+ ldr r3, .L498
muls r5, r7, r5
- ldr r3, .L494
lsls r0, r0, #3
- mul r1, r1, fp
str r3, [sp]
mul r5, fp, r5
mul r5, r9, r5
asrs r5, r5, #11
- str r5, [r4, #2916]
+ str r5, [r4, #2928]
bl __aeabi_idiv
ldr r3, [sp]
uxth r0, r0
cmp r0, #4
- itet ls
+ itee hi
+ strhhi r0, [r3, #2932] @ movhi
movls r2, #4
- strhhi r0, [r3, #2920] @ movhi
- strhls r2, [r3, #2920] @ movhi
+ strhls r2, [r3, #2932] @ movhi
cmp r8, #0
- beq .L477
+ beq .L482
mov r3, #640
- strh r3, [r4, #2892] @ movhi
-.L477:
- ldrh r3, [r4, #2892]
+ strh r3, [r4, #2904] @ movhi
+.L482:
+ ldrh r3, [r4, #2904]
lsls r6, r6, #6
mov r1, r7
- ldr r5, .L494
+ ldr r5, .L498
asr r3, r3, r10
add r10, r10, #9
asr r6, r6, r10
adds r3, r3, #2
- strh r3, [r4, #2922] @ movhi
+ strh r3, [r4, #2934] @ movhi
uxth r0, r6
- strh r6, [r4, #2924] @ movhi
+ strh r6, [r4, #2936] @ movhi
add r6, r0, #8
mul r3, r7, r0
- ldrh r0, [r4, #2920]
- str r3, [r4, #2928]
+ ldrh r0, [r4, #2932]
+ str r3, [r4, #2940]
bl __aeabi_uidiv
cmp r7, #1
- ldr r7, .L494
uxtah r0, r6, r0
+ ldr r6, .L498
it eq
addeq r0, r0, #4
- str r0, [r5, #2824]
- ldrh r0, [r4, #2824]
+ str r0, [r5, #2836]
+ ldrh r0, [r4, #2836]
bl FtlSysBlkNumInit
- ldr r3, [r4, #2824]
- ldr r5, [r4, #2840]
+ ldr r3, [r4, #2836]
+ ldr r5, [r4, #2852]
mov r0, #2048
- ldrh r6, [r4, #2904]
- str r3, [r4, #2932]
- ldrh r3, [r4, #2898]
+ ldrh r7, [r4, #2916]
+ str r3, [r4, #2944]
+ ldrh r3, [r4, #2910]
lsls r5, r5, #2
- mov r1, r6
+ mov r1, r7
muls r5, r3, r5
- ldrh r3, [r4, #2906]
+ ldrh r3, [r4, #2918]
adds r3, r3, #9
lsrs r5, r5, r3
adds r5, r5, #2
uxth r5, r5
- strh r5, [r4, #2936] @ movhi
+ strh r5, [r4, #2948] @ movhi
bl __aeabi_idiv
- ldrh r2, [r4, #2920]
+ ldrh r2, [r4, #2932]
movs r3, #0
- str r3, [r4, #2940]
+ str r3, [r4, #1896]
adds r3, r2, #3
- strh r3, [r4, #2920] @ movhi
- ldr r3, [r4, #2928]
+ strh r3, [r4, #2932] @ movhi
+ ldr r3, [r4, #2940]
adds r1, r3, #3
- str r1, [r4, #2928]
- ldrb r1, [r4, #76] @ zero_extendqisi2
- strh r0, [r4, #2938] @ movhi
- cbz r1, .L480
+ str r1, [r4, #2940]
+ strh r0, [r4, #2950] @ movhi
+ ldrb r0, [r4, #76] @ zero_extendqisi2
+ cbz r0, .L485
adds r2, r2, #4
adds r3, r3, #5
- strh r2, [r7, #2920] @ movhi
- str r3, [r7, #2928]
-.L480:
- ldrh r2, [r4, #2836]
+ strh r2, [r6, #2932] @ movhi
+ b .L496
+.L485:
+ cmp r1, #7
+ bhi .L486
+ movs r3, #8
+.L496:
+ str r3, [r6, #2940]
+.L486:
+ ldrh r2, [r4, #2848]
movs r3, #0
- strh r3, [r4, #2944] @ movhi
+ strh r3, [r4, #2952] @ movhi
movs r0, #0
lsrs r3, r2, #3
add r3, r3, r2, lsl #1
adds r3, r3, #52
add r5, r3, r5, lsl #2
- cmp r5, r6, lsl #9
+ cmp r5, r7, lsl #9
ittt cc
movcc r2, #1
- ldrcc r3, .L494
- strhcc r2, [r3, #2944] @ movhi
+ ldrcc r3, .L498
+ strhcc r2, [r3, #2952] @ movhi
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L495:
+.L499:
.align 2
-.L494:
+.L498:
.word .LANCHOR0
- .word .LANCHOR0+2856
+ .word .LANCHOR0+2868
.fnend
.size FtlConstantsInit, .-FtlConstantsInit
.align 1
@@ -3352,26 +3391,26 @@ IsBlkInVendorPart:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r2, .L503
- ldrh r3, [r2, #2946]
- cbz r3, .L502
- ldr r3, [r2, #2948]
- ldrh r2, [r2, #2920]
+ ldr r2, .L507
+ ldrh r3, [r2, #2954]
+ cbz r3, .L506
+ ldr r3, [r2, #2956]
+ ldrh r2, [r2, #2932]
add r2, r3, r2, lsl #1
-.L498:
+.L502:
cmp r3, r2
- beq .L502
+ beq .L506
ldrh r1, [r3], #2
cmp r1, r0
- bne .L498
+ bne .L502
movs r0, #1
bx lr
-.L502:
+.L506:
movs r0, #0
bx lr
-.L504:
+.L508:
.align 2
-.L503:
+.L507:
.word .LANCHOR0
.fnend
.size IsBlkInVendorPart, .-IsBlkInVendorPart
@@ -3384,34 +3423,34 @@ FtlCacheMetchLpa:
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r2, .L513
+ ldr r2, .L517
push {r4, r5, r6, lr}
.save {r4, r5, r6, lr}
- ldr r3, [r2, #2952]
- cbz r3, .L512
- ldr r5, [r2, #2956]
+ ldr r3, [r2, #2960]
+ cbz r3, .L516
+ ldr r5, [r2, #2964]
movs r6, #36
movs r2, #0
-.L508:
+.L512:
mla r4, r6, r2, r5
ldr r4, [r4, #16]
cmp r4, r0
- bcc .L507
+ bcc .L511
cmp r4, r1
- bls .L510
-.L507:
+ bls .L514
+.L511:
adds r2, r2, #1
cmp r2, r3
- bne .L508
-.L512:
+ bne .L512
+.L516:
movs r0, #0
pop {r4, r5, r6, pc}
-.L510:
+.L514:
movs r0, #1
pop {r4, r5, r6, pc}
-.L514:
+.L518:
.align 2
-.L513:
+.L517:
.word .LANCHOR0
.fnend
.size FtlCacheMetchLpa, .-FtlCacheMetchLpa
@@ -3425,34 +3464,34 @@ FtlGetCap:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L516
- ldr r0, [r3, #2940]
+ ldr r3, .L520
+ ldr r0, [r3, #1896]
bx lr
-.L517:
+.L521:
.align 2
-.L516:
+.L520:
.word .LANCHOR0
.fnend
.size FtlGetCap, .-FtlGetCap
.align 1
- .global FtlGetCapacity
+ .global ftl_get_density
.thumb
.thumb_func
- .type FtlGetCapacity, %function
-FtlGetCapacity:
+ .type ftl_get_density, %function
+ftl_get_density:
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L519
- ldr r0, [r3, #2940]
+ ldr r3, .L523
+ ldr r0, [r3, #1896]
bx lr
-.L520:
+.L524:
.align 2
-.L519:
+.L523:
.word .LANCHOR0
.fnend
- .size FtlGetCapacity, .-FtlGetCapacity
+ .size ftl_get_density, .-ftl_get_density
.align 1
.global FtlGetLpn
.thumb
@@ -3463,57 +3502,15 @@ FtlGetLpn:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L522
- ldr r0, [r3, #2960]
+ ldr r3, .L526
+ ldr r0, [r3, #2968]
bx lr
-.L523:
+.L527:
.align 2
-.L522:
- .word .LANCHOR0
- .fnend
- .size FtlGetLpn, .-FtlGetLpn
- .align 1
- .global FtlGetCurEraseBlock
- .thumb
- .thumb_func
- .type FtlGetCurEraseBlock, %function
-FtlGetCurEraseBlock:
- .fnstart
- @ args = 0, pretend = 0, frame = 0
- @ frame_needed = 0, uses_anonymous_args = 0
- @ link register save eliminated.
- ldr r3, .L525
- ldrh r2, [r3, #2828]
- ldr r0, [r3, #2964]
- muls r0, r2, r0
- bx lr
.L526:
- .align 2
-.L525:
- .word .LANCHOR0
- .fnend
- .size FtlGetCurEraseBlock, .-FtlGetCurEraseBlock
- .align 1
- .global FtlGetAllBlockNum
- .thumb
- .thumb_func
- .type FtlGetAllBlockNum, %function
-FtlGetAllBlockNum:
- .fnstart
- @ args = 0, pretend = 0, frame = 0
- @ frame_needed = 0, uses_anonymous_args = 0
- @ link register save eliminated.
- ldr r3, .L528
- ldrh r2, [r3, #2838]
- ldrh r0, [r3, #2828]
- muls r0, r2, r0
- bx lr
-.L529:
- .align 2
-.L528:
.word .LANCHOR0
.fnend
- .size FtlGetAllBlockNum, .-FtlGetAllBlockNum
+ .size FtlGetLpn, .-FtlGetLpn
.align 1
.global FtlBbmMapBadBlock
.thumb
@@ -3527,14 +3524,14 @@ FtlBbmMapBadBlock:
.save {r4, r5, r6, r7, lr}
.pad #12
mov r6, r0
- ldr r5, .L531
- ldrh r4, [r5, #2894]
+ ldr r5, .L529
+ ldrh r4, [r5, #2906]
mov r1, r4
bl __aeabi_uidiv
uxth r2, r0
smulbb r3, r2, r4
add r1, r5, r2, lsl #2
- ldr r4, [r1, #2996]
+ ldr r4, [r1, #3000]
movs r1, #1
subs r3, r6, r3
uxth r3, r3
@@ -3543,21 +3540,21 @@ FtlBbmMapBadBlock:
lsls r1, r1, r0
ldr r0, [r4, r7, lsl #2]
orrs r1, r1, r0
- ldr r0, .L531+4
+ ldr r0, .L529+4
str r1, [r4, r7, lsl #2]
str r1, [sp]
mov r1, r6
bl printk
- ldrh r3, [r5, #2974]
+ ldrh r3, [r5, #2978]
movs r0, #0
adds r3, r3, #1
- strh r3, [r5, #2974] @ movhi
+ strh r3, [r5, #2978] @ movhi
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, pc}
-.L532:
+.L530:
.align 2
-.L531:
+.L529:
.word .LANCHOR0
.word .LC2
.fnend
@@ -3575,8 +3572,8 @@ FtlBbmIsBadBlock:
push {r3, r4, r5, r6, r7, lr}
.save {r3, r4, r5, r6, r7, lr}
mov r7, r0
- ldr r5, .L534
- ldrh r6, [r5, #2894]
+ ldr r5, .L532
+ ldrh r6, [r5, #2906]
mov r1, r6
bl __aeabi_uidivmod
mov r0, r7
@@ -3587,14 +3584,14 @@ FtlBbmIsBadBlock:
and r4, r4, #31
uxth r0, r0
add r5, r5, r0, lsl #2
- ldr r3, [r5, #2996]
+ ldr r3, [r5, #3000]
ldr r0, [r3, r2, lsl #2]
lsrs r0, r0, r4
and r0, r0, #1
pop {r3, r4, r5, r6, r7, pc}
-.L535:
+.L533:
.align 2
-.L534:
+.L532:
.word .LANCHOR0
.fnend
.size FtlBbmIsBadBlock, .-FtlBbmIsBadBlock
@@ -3621,18 +3618,18 @@ FtlBbtMemInit:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r0, .L538
+ ldr r0, .L536
movw r3, #65535
movs r1, #255
movs r2, #16
- addw r0, r0, #2980
+ addw r0, r0, #2984
strh r3, [r0, #-12] @ movhi
movs r3, #0
strh r3, [r0, #-6] @ movhi
b memset
-.L539:
+.L537:
.align 2
-.L538:
+.L536:
.word .LANCHOR0
.fnend
.size FtlBbtMemInit, .-FtlBbtMemInit
@@ -3648,28 +3645,28 @@ FtlBbtCalcTotleCnt:
push {r4, r5, r6, lr}
.save {r4, r5, r6, lr}
movs r5, #0
- ldr r4, .L548
- ldrh r6, [r4, #2894]
- ldrh r3, [r4, #2850]
+ ldr r4, .L546
+ ldrh r6, [r4, #2906]
+ ldrh r3, [r4, #2862]
mov r4, r5
muls r6, r3, r6
-.L541:
+.L539:
uxth r0, r5
cmp r0, r6
- bge .L547
+ bge .L545
bl FtlBbmIsBadBlock
- cbz r0, .L542
+ cbz r0, .L540
adds r4, r4, #1
uxth r4, r4
-.L542:
+.L540:
adds r5, r5, #1
- b .L541
-.L547:
+ b .L539
+.L545:
mov r0, r4
pop {r4, r5, r6, pc}
-.L549:
+.L547:
.align 2
-.L548:
+.L546:
.word .LANCHOR0
.fnend
.size FtlBbtCalcTotleCnt, .-FtlBbtCalcTotleCnt
@@ -3685,22 +3682,22 @@ V2P_block:
push {r3, r4, r5, r6, r7, lr}
.save {r3, r4, r5, r6, r7, lr}
mov r4, r1
- ldr r6, .L551
+ ldr r6, .L549
mov r7, r0
- ldrh r5, [r6, #2852]
+ ldrh r5, [r6, #2864]
mov r1, r5
bl __aeabi_uidivmod
mov r0, r7
smlabb r4, r4, r5, r1
mov r1, r5
bl __aeabi_uidiv
- ldrh r3, [r6, #2894]
+ ldrh r3, [r6, #2906]
smlabb r0, r3, r0, r4
uxth r0, r0
pop {r3, r4, r5, r6, r7, pc}
-.L552:
+.L550:
.align 2
-.L551:
+.L549:
.word .LANCHOR0
.fnend
.size V2P_block, .-V2P_block
@@ -3713,12 +3710,12 @@ P2V_plane:
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L554
+ ldr r3, .L552
push {r4, r5, r6, lr}
.save {r4, r5, r6, lr}
mov r6, r0
- ldrh r1, [r3, #2894]
- ldrh r5, [r3, #2852]
+ ldrh r1, [r3, #2906]
+ ldrh r5, [r3, #2864]
bl __aeabi_uidiv
mov r1, r5
smulbb r4, r0, r5
@@ -3727,9 +3724,9 @@ P2V_plane:
add r1, r1, r4
uxth r0, r1
pop {r4, r5, r6, pc}
-.L555:
+.L553:
.align 2
-.L554:
+.L552:
.word .LANCHOR0
.fnend
.size P2V_plane, .-P2V_plane
@@ -3744,17 +3741,17 @@ P2V_block_in_plane:
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
.save {r4, lr}
- ldr r4, .L557
- ldrh r1, [r4, #2894]
+ ldr r4, .L555
+ ldrh r1, [r4, #2906]
bl __aeabi_uidivmod
uxth r0, r1
- ldrh r1, [r4, #2852]
+ ldrh r1, [r4, #2864]
bl __aeabi_uidiv
uxth r0, r0
pop {r4, pc}
-.L558:
+.L556:
.align 2
-.L557:
+.L555:
.word .LANCHOR0
.fnend
.size P2V_block_in_plane, .-P2V_block_in_plane
@@ -3769,14 +3766,14 @@ ftl_cmp_data_ver:
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
cmp r0, r1
- bls .L560
+ bls .L558
subs r0, r0, r1
cmp r0, #-2147483648
ite hi
movhi r0, #0
movls r0, #1
bx lr
-.L560:
+.L558:
subs r0, r1, r0
cmp r0, #-2147483648
ite ls
@@ -3794,22 +3791,22 @@ FtlFreeSysBlkQueueInit:
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L563
+ ldr r3, .L561
mov r1, #2048
push {r4, lr}
.save {r4, lr}
movs r4, #0
- strh r0, [r3, #3028] @ movhi
- addw r0, r3, #3036
- strh r4, [r3, #3030] @ movhi
- strh r4, [r3, #3032] @ movhi
+ strh r0, [r3, #3032] @ movhi
+ add r0, r3, #3040
strh r4, [r3, #3034] @ movhi
+ strh r4, [r3, #3036] @ movhi
+ strh r4, [r3, #3038] @ movhi
bl __memzero
mov r0, r4
pop {r4, pc}
-.L564:
+.L562:
.align 2
-.L563:
+.L561:
.word .LANCHOR0
.fnend
.size FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit
@@ -3823,14 +3820,14 @@ FtlFreeSysBlkQueueEmpty:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L566
- ldrh r0, [r3, #3034]
+ ldr r3, .L564
+ ldrh r0, [r3, #3038]
clz r0, r0
lsrs r0, r0, #5
bx lr
-.L567:
+.L565:
.align 2
-.L566:
+.L564:
.word .LANCHOR0
.fnend
.size FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty
@@ -3844,15 +3841,15 @@ FtlFreeSysBlkQueueFull:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L569
- ldrh r0, [r3, #3034]
+ ldr r3, .L567
+ ldrh r0, [r3, #3038]
sub r3, r0, #1024
rsbs r0, r3, #0
adcs r0, r0, r3
bx lr
-.L570:
+.L568:
.align 2
-.L569:
+.L567:
.word .LANCHOR0
.fnend
.size FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull
@@ -3868,44 +3865,44 @@ FtlFreeSysBlkQueueIn:
push {r3, r4, r5, r6, r7, lr}
.save {r3, r4, r5, r6, r7, lr}
mov r6, r0
- ldr r4, .L580
- ldrh r3, [r4, #3034]
+ ldr r4, .L578
+ ldrh r3, [r4, #3038]
cmp r3, #1024
- beq .L571
- cbz r1, .L573
- ldr r5, .L580+4
- ldr r3, [r5, #740]
- cbnz r3, .L573
+ beq .L569
+ cbz r1, .L571
+ ldr r5, .L578+4
+ ldr r3, [r5, #744]
+ cbnz r3, .L571
bl P2V_block_in_plane
movs r1, #1
lsls r3, r6, #10
mov r2, r1
mov r7, r0
- ldr r0, [r5, #744]
+ ldr r0, [r5, #748]
str r3, [r0, #4]
bl FlashEraseBlocks
- ldr r2, [r5, #748]
+ ldr r2, [r5, #752]
ldrh r3, [r2, r7, lsl #1]
adds r3, r3, #1
strh r3, [r2, r7, lsl #1] @ movhi
- ldr r3, [r5, #752]
+ ldr r3, [r5, #756]
adds r3, r3, #1
- str r3, [r5, #752]
-.L573:
- ldrh r3, [r4, #3034]
+ str r3, [r5, #756]
+.L571:
+ ldrh r3, [r4, #3038]
adds r3, r3, #1
- strh r3, [r4, #3034] @ movhi
- ldrh r3, [r4, #3032]
+ strh r3, [r4, #3038] @ movhi
+ ldrh r3, [r4, #3036]
add r2, r4, r3, lsl #1
adds r3, r3, #1
ubfx r3, r3, #0, #10
- strh r3, [r4, #3032] @ movhi
- strh r6, [r2, #3036] @ movhi
-.L571:
+ strh r3, [r4, #3036] @ movhi
+ strh r6, [r2, #3040] @ movhi
+.L569:
pop {r3, r4, r5, r6, r7, pc}
-.L581:
+.L579:
.align 2
-.L580:
+.L578:
.word .LANCHOR0
.word .LANCHOR2
.fnend
@@ -3919,83 +3916,42 @@ FtlFreeSysBLkSort:
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- push {r4, r5, r6, r7, r8, lr}
- .save {r4, r5, r6, r7, r8, lr}
- movs r4, #0
- ldr r5, .L594
- ldr r6, .L594+4
-.L583:
- ldrh r3, [r5, #3034]
- adds r7, r4, #1
- uxth r4, r4
- ldr r0, .L594
- cmp r3, r4
- bls .L591
- ldrh r3, [r5, #3030]
- add r3, r3, r4
- add r3, r5, r3, lsl #1
- ldrh r0, [r3, #3036]
- bl P2V_block_in_plane
- ldr r2, [r6, #748]
- ldr r3, [r6, #756]
- ldrh r2, [r2, r0, lsl #1]
- str r2, [r3, r4, lsl #2]
- mov r4, r7
- b .L583
-.L591:
- ldr r5, .L594+4
- movs r1, #0
- mov ip, r5
-.L585:
- ldrh r8, [r0, #3034]
- add r3, r8, #-1
- cmp r1, r3
- bge .L592
- adds r4, r1, #1
- ldr r2, [r5, #756]
- mov r3, r1
- uxth r4, r4
- mov lr, r4
-.L586:
- cmp lr, r8
- bcs .L593
- ldr r6, [r2, lr, lsl #2]
- ldr r7, [r2, r3, lsl #2]
- cmp r7, r6
- it hi
- movhi r3, lr
- add lr, lr, #1
- uxth lr, lr
- b .L586
-.L593:
- cmp r1, r3
- beq .L589
- ldr r6, [r2, r1, lsl #2]
- ldr r7, [r2, r3, lsl #2]
- str r6, [r2, r3, lsl #2]
- ldr r2, [ip, #756]
- str r7, [r2, r1, lsl #2]
- ldrh r2, [r0, #3030]
- add r3, r3, r2
- add r2, r2, r1
- adds r3, r3, #4
- adds r2, r2, #4
- add r3, r0, r3, lsl #1
- add r2, r0, r2, lsl #1
- ldrh r7, [r3, #3028]
- ldrh r1, [r2, #3028]
- strh r1, [r3, #3028] @ movhi
- strh r7, [r2, #3028] @ movhi
-.L589:
- mov r1, r4
- b .L585
-.L592:
- pop {r4, r5, r6, r7, r8, pc}
-.L595:
+ ldr r3, .L589
+ movs r0, #0
+ push {r4, r5, r6, lr}
+ .save {r4, r5, r6, lr}
+ mov r6, r0
+ ldrh r4, [r3, #788]
+ ldr r3, .L589+4
+ and r4, r4, #31
+ ldrh r1, [r3, #3034]
+ ldrh r2, [r3, #3036]
+.L581:
+ uxth r5, r0
+ adds r0, r0, #1
+ cmp r5, r4
+ bge .L588
+ add r5, r3, r1, lsl #1
+ adds r1, r1, #1
+ ubfx r1, r1, #0, #10
+ ldrh r6, [r5, #3040]
+ add r5, r3, r2, lsl #1
+ strh r6, [r5, #3040] @ movhi
+ movs r6, #1
+ add r2, r2, r6
+ ubfx r2, r2, #0, #10
+ b .L581
+.L588:
+ cbz r6, .L580
+ strh r1, [r3, #3034] @ movhi
+ strh r2, [r3, #3036] @ movhi
+.L580:
+ pop {r4, r5, r6, pc}
+.L590:
.align 2
-.L594:
- .word .LANCHOR0
+.L589:
.word .LANCHOR2
+ .word .LANCHOR0
.fnend
.size FtlFreeSysBLkSort, .-FtlFreeSysBLkSort
.align 1
@@ -4007,51 +3963,51 @@ remove_from_free_sys_Queue:
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L603
+ ldr r3, .L598
mov r1, r0
push {r4, r5, r6, lr}
.save {r4, r5, r6, lr}
- ldrh r0, [r3, #3034]
- cbz r0, .L597
- ldrh r6, [r3, #3030]
+ ldrh r0, [r3, #3038]
+ cbz r0, .L592
+ ldrh r6, [r3, #3034]
movs r4, #0
-.L598:
+.L593:
cmp r4, r0
- bcs .L602
+ bcs .L597
adds r2, r4, r6
- ldr r5, .L603
+ ldr r5, .L598
ubfx r2, r2, #0, #10
add r2, r3, r2, lsl #1
- ldrh r2, [r2, #3036]
+ ldrh r2, [r2, #3040]
cmp r2, r1
- bne .L599
- ldr r0, .L603+4
+ bne .L594
+ ldr r0, .L598+4
bl printk
- ldrh r3, [r5, #3030]
+ ldrh r3, [r5, #3034]
movs r0, #1
add r4, r4, r3
add r2, r5, r3, lsl #1
ubfx r4, r4, #0, #10
adds r3, r3, #1
- ldrh r2, [r2, #3036]
+ ldrh r2, [r2, #3040]
add r4, r5, r4, lsl #1
ubfx r3, r3, #0, #10
- strh r3, [r5, #3030] @ movhi
- ldrh r3, [r5, #3034]
- strh r2, [r4, #3036] @ movhi
- subs r3, r3, #1
strh r3, [r5, #3034] @ movhi
+ ldrh r3, [r5, #3038]
+ strh r2, [r4, #3040] @ movhi
+ subs r3, r3, #1
+ strh r3, [r5, #3038] @ movhi
pop {r4, r5, r6, pc}
-.L599:
+.L594:
adds r4, r4, #1
- b .L598
-.L602:
- movs r0, #0
+ b .L593
.L597:
+ movs r0, #0
+.L592:
pop {r4, r5, r6, pc}
-.L604:
+.L599:
.align 2
-.L603:
+.L598:
.word .LANCHOR0
.word .LC3
.fnend
@@ -4065,57 +4021,72 @@ FtlFreeSysBlkQueueOut:
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- push {r4, r5, r6, r7, r8, lr}
- .save {r4, r5, r6, r7, r8, lr}
- ldr r5, .L612
- ldrh r2, [r5, #3034]
- cbz r2, .L608
- ldrh r3, [r5, #3030]
- subs r2, r2, #1
- ldr r4, .L612+4
- strh r2, [r5, #3034] @ movhi
- add r1, r5, r3, lsl #1
+ push {r4, r5, r6, r7, r8, r9, r10, lr}
+ .save {r4, r5, r6, r7, r8, r9, r10, lr}
+ ldr r4, .L610
+ ldr r6, .L610+4
+ mov r7, r4
+.L601:
+ ldrh r1, [r4, #3038]
+ cbz r1, .L602
+ ldrh r3, [r4, #3034]
+ subs r1, r1, #1
+ ldr r10, [r6, #744]
+ strh r1, [r4, #3038] @ movhi
+ add r2, r4, r3, lsl #1
adds r3, r3, #1
- ldr r8, [r4, #740]
ubfx r3, r3, #0, #10
- ldrh r6, [r1, #3036]
- strh r3, [r5, #3030] @ movhi
- cmp r8, #0
- bne .L606
- mov r0, r6
+ ldr r8, .L610+4
+ ldrh r5, [r2, #3040]
+ strh r3, [r4, #3034] @ movhi
+ cmp r10, #0
+ bne .L603
+ mov r0, r5
bl P2V_block_in_plane
- lsls r3, r6, #10
- mov r7, r0
- ldr r0, [r4, #744]
+ lsls r3, r5, #10
+ mov r9, r0
+ ldr r0, [r6, #748]
str r3, [r0, #4]
- ldrb r3, [r5, #76] @ zero_extendqisi2
- cbz r3, .L607
- mov r1, r8
+ ldrb r3, [r4, #76] @ zero_extendqisi2
+ cbz r3, .L604
+ mov r1, r10
movs r2, #1
bl FlashEraseBlocks
-.L607:
+.L604:
movs r1, #1
- ldr r0, [r4, #744]
+ ldr r0, [r8, #748]
mov r2, r1
bl FlashEraseBlocks
- ldr r2, [r4, #748]
- ldrh r3, [r2, r7, lsl #1]
+ ldr r2, [r8, #752]
+ ldrh r3, [r2, r9, lsl #1]
adds r3, r3, #1
- strh r3, [r2, r7, lsl #1] @ movhi
- ldr r3, [r4, #752]
+ strh r3, [r2, r9, lsl #1] @ movhi
+ ldr r3, [r8, #756]
adds r3, r3, #1
- str r3, [r4, #752]
- b .L606
-.L608:
- movw r6, #65535
+ str r3, [r8, #756]
+ b .L603
+.L602:
+ ldr r0, .L610+8
+ bl printk
+.L605:
+ b .L605
+.L603:
+ cbnz r5, .L606
+ mov r1, r5
+ ldrh r2, [r7, #3038]
+ ldr r0, .L610+12
+ bl printk
+ b .L601
.L606:
- mov r0, r6
- pop {r4, r5, r6, r7, r8, pc}
-.L613:
+ mov r0, r5
+ pop {r4, r5, r6, r7, r8, r9, r10, pc}
+.L611:
.align 2
-.L612:
+.L610:
.word .LANCHOR0
.word .LANCHOR2
+ .word .LC4
+ .word .LC5
.fnend
.size FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut
.align 1
@@ -4130,113 +4101,113 @@ insert_data_list:
push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.pad #12
- ldr r5, .L630
- ldrh r3, [r5, #2836]
+ ldr r5, .L628
+ ldrh r3, [r5, #2848]
cmp r3, r0
- bls .L616
+ bls .L614
movs r4, #6
- ldr r2, .L630+4
+ ldr r2, .L628+4
movw r3, #65535
muls r4, r0, r4
- ldr lr, [r2, #760]
+ ldr lr, [r2, #808]
mov r7, r2
add r1, lr, r4
strh r3, [r1, #2] @ movhi
strh r3, [lr, r4] @ movhi
- ldr r3, [r2, #764]
+ ldr r3, [r2, #812]
cmp r3, #0
- beq .L629
- ldr r8, [r2, #768]
+ beq .L627
+ ldr r8, [r2, #816]
lsl fp, r0, #1
ldrh r2, [r1, #4]
ldrh r6, [r8, r0, lsl #1]
- cbz r2, .L627
+ cbz r2, .L625
muls r6, r2, r6
- b .L618
-.L627:
+ b .L616
+.L625:
mov r6, #-1
-.L618:
- ldr ip, [r7, #760]
- ldr r2, .L630+8
+.L616:
+ ldr ip, [r7, #808]
+ ldr r2, .L628+8
rsb r9, ip, r3
- ldrh r5, [r5, #2836]
+ ldrh r5, [r5, #2848]
asr r9, r9, #1
str r5, [sp]
mul r2, r2, r9
- ldr r9, [r7, #748]
+ ldr r9, [r7, #752]
add r5, r9, fp
str r5, [sp, #4]
movs r5, #0
uxth r2, r2
-.L625:
+.L623:
adds r5, r5, #1
ldr r7, [sp]
uxth r5, r5
cmp r5, r7
- bhi .L616
+ bhi .L614
cmp r0, r2
- beq .L616
+ beq .L614
ldrh r7, [r3, #4]
lsl r10, r2, #1
ldrh fp, [r8, r2, lsl #1]
- cbz r7, .L628
+ cbz r7, .L626
mul r7, r7, fp
- b .L620
-.L628:
+ b .L618
+.L626:
mov r7, #-1
-.L620:
+.L618:
cmp r7, r6
- bne .L621
+ bne .L619
ldr r7, [sp, #4]
ldrh r10, [r9, r10]
ldrh r7, [r7]
cmp r10, r7
- bcc .L623
- b .L622
+ bcc .L621
+ b .L620
+.L619:
+ bhi .L620
.L621:
- bhi .L622
-.L623:
ldrh r7, [r3]
movw r10, #65535
cmp r7, r10
- bne .L624
+ bne .L622
strh r2, [r1, #2] @ movhi
strh r0, [r3] @ movhi
- ldr r3, .L630+4
- str r1, [r3, #772]
- b .L616
-.L624:
+ ldr r3, .L628+4
+ str r1, [r3, #820]
+ b .L614
+.L622:
movs r3, #6
mov r2, r7
mla r3, r3, r7, ip
- b .L625
-.L622:
+ b .L623
+.L620:
strh r2, [lr, r4] @ movhi
ldrh r2, [r3, #2]
strh r2, [r1, #2] @ movhi
- ldr r2, .L630+4
- ldr r4, [r2, #764]
+ ldr r2, .L628+4
+ ldr r4, [r2, #812]
cmp r3, r4
- bne .L626
+ bne .L624
strh r0, [r3, #2] @ movhi
-.L629:
- str r1, [r2, #764]
- b .L616
-.L626:
+.L627:
+ str r1, [r2, #812]
+ b .L614
+.L624:
ldrh r4, [r3, #2]
- ldr r1, [r2, #760]
+ ldr r1, [r2, #808]
movs r2, #6
muls r2, r4, r2
strh r0, [r1, r2] @ movhi
strh r0, [r3, #2] @ movhi
-.L616:
+.L614:
movs r0, #0
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L631:
+.L629:
.align 2
-.L630:
+.L628:
.word .LANCHOR0
.word .LANCHOR2
.word -1431655765
@@ -4254,14 +4225,14 @@ INSERT_DATA_LIST:
push {r3, lr}
.save {r3, lr}
bl insert_data_list
- ldr r2, .L633
- ldrh r3, [r2, #776]
+ ldr r2, .L631
+ ldrh r3, [r2, #824]
adds r3, r3, #1
- strh r3, [r2, #776] @ movhi
+ strh r3, [r2, #824] @ movhi
pop {r3, pc}
-.L634:
+.L632:
.align 2
-.L633:
+.L631:
.word .LANCHOR2
.fnend
.size INSERT_DATA_LIST, .-INSERT_DATA_LIST
@@ -4278,64 +4249,64 @@ insert_free_list:
.save {r4, r5, r6, r7, r8, r9, r10, lr}
movw r5, #65535
cmp r0, r5
- beq .L636
+ beq .L634
movs r1, #6
- ldr r2, .L643
+ ldr r2, .L641
mul lr, r1, r0
- ldr ip, [r2, #760]
+ ldr ip, [r2, #808]
mov r7, r2
add r6, ip, lr
strh r5, [r6, #2] @ movhi
strh r5, [ip, lr] @ movhi
- ldr r3, [r2, #780]
- cbz r3, .L642
- ldr r8, [r2, #760]
- ldr r9, [r2, #748]
+ ldr r3, [r2, #828]
+ cbz r3, .L640
+ ldr r8, [r2, #808]
+ ldr r9, [r2, #752]
rsb r4, r8, r3
- ldr r2, .L643+4
+ ldr r2, .L641+4
asrs r4, r4, #1
ldrh r10, [r9, r0, lsl #1]
muls r4, r2, r4
uxth r2, r4
-.L640:
+.L638:
ldrh r4, [r9, r2, lsl #1]
cmp r4, r10
- bcs .L638
+ bcs .L636
ldrh r4, [r3]
cmp r4, r5
- bne .L639
+ bne .L637
strh r2, [r6, #2] @ movhi
strh r0, [r3] @ movhi
- b .L636
-.L639:
+ b .L634
+.L637:
mla r3, r1, r4, r8
mov r2, r4
- b .L640
-.L638:
+ b .L638
+.L636:
ldrh r1, [r3, #2]
strh r1, [r6, #2] @ movhi
strh r2, [ip, lr] @ movhi
- ldr r1, [r7, #780]
- ldr r2, .L643
+ ldr r1, [r7, #828]
+ ldr r2, .L641
cmp r3, r1
- bne .L641
+ bne .L639
strh r0, [r3, #2] @ movhi
-.L642:
- str r6, [r2, #780]
- b .L636
-.L641:
+.L640:
+ str r6, [r2, #828]
+ b .L634
+.L639:
ldrh r4, [r3, #2]
- ldr r1, [r2, #760]
+ ldr r1, [r2, #808]
movs r2, #6
muls r2, r4, r2
strh r0, [r1, r2] @ movhi
strh r0, [r3, #2] @ movhi
-.L636:
+.L634:
movs r0, #0
pop {r4, r5, r6, r7, r8, r9, r10, pc}
-.L644:
+.L642:
.align 2
-.L643:
+.L641:
.word .LANCHOR2
.word -1431655765
.fnend
@@ -4352,14 +4323,14 @@ INSERT_FREE_LIST:
push {r3, lr}
.save {r3, lr}
bl insert_free_list
- ldr r2, .L646
- ldrh r3, [r2, #784]
+ ldr r2, .L644
+ ldrh r3, [r2, #832]
adds r3, r3, #1
- strh r3, [r2, #784] @ movhi
+ strh r3, [r2, #832] @ movhi
pop {r3, pc}
-.L647:
+.L645:
.align 2
-.L646:
+.L644:
.word .LANCHOR2
.fnend
.size INSERT_FREE_LIST, .-INSERT_FREE_LIST
@@ -4375,15 +4346,15 @@ List_remove_node:
push {r4, r5, r6, r7, lr}
.save {r4, r5, r6, r7, lr}
movs r4, #6
- ldr r7, .L653
+ ldr r7, .L651
movw r6, #65535
muls r1, r4, r1
ldr r3, [r0]
- ldr r2, [r7, #760]
+ ldr r2, [r7, #808]
adds r5, r2, r1
cmp r5, r3
ldrh r3, [r2, r1]
- bne .L649
+ bne .L647
cmp r3, r6
ittee eq
moveq r3, #0
@@ -4392,33 +4363,33 @@ List_remove_node:
strne r3, [r0]
it ne
strhne r6, [r3, #2] @ movhi
- b .L651
-.L649:
+ b .L649
+.L647:
cmp r3, r6
ldrh r0, [r5, #2]
- bne .L652
+ bne .L650
cmp r0, r3
- beq .L651
+ beq .L649
muls r0, r4, r0
strh r3, [r2, r0] @ movhi
- b .L651
-.L652:
+ b .L649
+.L650:
mla r3, r4, r3, r2
strh r0, [r3, #2] @ movhi
ldrh r6, [r5, #2]
ldrh r0, [r2, r1]
- ldr r3, [r7, #760]
+ ldr r3, [r7, #808]
muls r4, r6, r4
strh r0, [r3, r4] @ movhi
-.L651:
+.L649:
movw r3, #65535
movs r0, #0
strh r3, [r2, r1] @ movhi
strh r3, [r5, #2] @ movhi
pop {r4, r5, r6, r7, pc}
-.L654:
+.L652:
.align 2
-.L653:
+.L651:
.word .LANCHOR2
.fnend
.size List_remove_node, .-List_remove_node
@@ -4434,16 +4405,16 @@ List_pop_index_node:
push {r4, r5, r6, lr}
.save {r4, r5, r6, lr}
ldr r3, [r0]
- cbz r3, .L661
- ldr r2, .L662
+ cbz r3, .L659
+ ldr r2, .L660
movs r6, #6
movw r5, #65535
- ldr r4, [r2, #760]
-.L657:
- cbnz r1, .L658
-.L660:
+ ldr r4, [r2, #808]
+.L655:
+ cbnz r1, .L656
+.L658:
subs r4, r3, r4
- ldr r3, .L662+4
+ ldr r3, .L660+4
asrs r4, r4, #1
muls r4, r3, r4
uxth r4, r4
@@ -4451,20 +4422,20 @@ List_pop_index_node:
bl List_remove_node
mov r0, r4
pop {r4, r5, r6, pc}
-.L658:
+.L656:
ldrh r2, [r3]
cmp r2, r5
- beq .L660
+ beq .L658
subs r1, r1, #1
mla r3, r6, r2, r4
uxth r1, r1
- b .L657
-.L661:
+ b .L655
+.L659:
movw r0, #65535
pop {r4, r5, r6, pc}
-.L663:
+.L661:
.align 2
-.L662:
+.L660:
.word .LANCHOR2
.word -1431655765
.fnend
@@ -4478,36 +4449,36 @@ List_get_gc_head_node:
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r2, .L671
+ ldr r2, .L669
push {r4, lr}
.save {r4, lr}
- ldr r3, [r2, #764]
- cbz r3, .L669
+ ldr r3, [r2, #812]
+ cbz r3, .L667
movs r4, #6
- ldr r1, [r2, #760]
+ ldr r1, [r2, #808]
movw r2, #65535
-.L666:
- cbz r0, .L667
+.L664:
+ cbz r0, .L665
ldrh r3, [r3]
cmp r3, r2
- beq .L669
+ beq .L667
subs r0, r0, #1
mla r3, r4, r3, r1
uxth r0, r0
- b .L666
-.L669:
+ b .L664
+.L667:
movw r0, #65535
pop {r4, pc}
-.L667:
+.L665:
subs r3, r3, r1
- ldr r0, .L671+4
+ ldr r0, .L669+4
asrs r3, r3, #1
muls r0, r3, r0
uxth r0, r0
pop {r4, pc}
-.L672:
+.L670:
.align 2
-.L671:
+.L669:
.word .LANCHOR2
.word -1431655765
.fnend
@@ -4525,58 +4496,64 @@ List_update_data_list:
.save {r3, r4, r5, r6, r7, lr}
mov r5, r0
ldr r4, .L678
- ldrh r3, [r4, #788]
- cmp r3, r0
- beq .L674
ldrh r3, [r4, #836]
cmp r3, r0
- beq .L674
+ beq .L672
ldrh r3, [r4, #884]
cmp r3, r0
- beq .L674
+ beq .L672
+ ldrh r3, [r4, #932]
+ cmp r3, r0
+ beq .L672
movs r3, #6
- ldr r0, [r4, #760]
- ldr r2, [r4, #764]
- muls r3, r5, r3
- adds r1, r0, r3
- cmp r1, r2
- beq .L674
- ldr r6, [r4, #768]
- ldrh r7, [r1, #4]
- ldrh r1, [r1, #2]
- ldrh r2, [r6, r5, lsl #1]
+ ldr r1, [r4, #808]
+ ldr r2, [r4, #812]
+ muls r3, r0, r3
+ adds r0, r1, r3
+ cmp r0, r2
+ beq .L672
+ ldr r6, [r4, #816]
+ ldrh r2, [r0, #4]
+ ldrh r7, [r6, r5, lsl #1]
+ cbz r2, .L676
muls r2, r7, r2
- movw r7, #65535
- it eq
- moveq r2, #-1
- cmp r1, r7
- bne .L676
- ldrh r3, [r0, r3]
- cmp r3, r1
- beq .L674
+ b .L673
.L676:
+ mov r2, #-1
+.L673:
+ ldrh r0, [r0, #2]
+ movw r7, #65535
+ cmp r0, r7
+ bne .L674
+ ldrh r3, [r1, r3]
+ cmp r3, r0
+ beq .L672
+.L674:
movs r3, #6
- muls r1, r3, r1
- ldr r3, .L678+4
- asrs r7, r1, #1
- add r1, r1, r0
- muls r3, r7, r3
- ldrh r1, [r1, #4]
- ldrh r3, [r6, r3, lsl #1]
- muls r3, r1, r3
- it eq
- moveq r3, #-1
+ muls r3, r0, r3
+ ldr r0, .L678+4
+ asrs r7, r3, #1
+ add r3, r3, r1
+ muls r0, r7, r0
+ ldrh r3, [r3, #4]
+ ldrh r0, [r6, r0, lsl #1]
+ cbz r3, .L677
+ muls r3, r0, r3
+ b .L675
+.L677:
+ mov r3, #-1
+.L675:
cmp r2, r3
- bcs .L674
+ bcs .L672
ldr r0, .L678+8
mov r1, r5
bl List_remove_node
- ldrh r3, [r4, #776]
+ ldrh r3, [r4, #824]
mov r0, r5
subs r3, r3, #1
- strh r3, [r4, #776] @ movhi
+ strh r3, [r4, #824] @ movhi
bl INSERT_DATA_LIST
-.L674:
+.L672:
movs r0, #0
pop {r3, r4, r5, r6, r7, pc}
.L679:
@@ -4584,7 +4561,7 @@ List_update_data_list:
.L678:
.word .LANCHOR2
.word -1431655765
- .word .LANCHOR2+764
+ .word .LANCHOR2+812
.fnend
.size List_update_data_list, .-List_update_data_list
.align 1
@@ -4605,7 +4582,7 @@ ftl_map_blk_alloc_new_blk:
.L681:
uxth r5, r3
cmp r5, r1
- bcs .L683
+ bcs .L684
mov r7, r2
adds r3, r3, #1
ldrh r6, [r7]
@@ -4613,8 +4590,20 @@ ftl_map_blk_alloc_new_blk:
cmp r6, #0
bne .L681
bl FtlFreeSysBlkQueueOut
+ movw r2, #65533
+ subs r3, r0, #1
+ mov r1, r0
strh r0, [r7] @ movhi
- cbz r0, .L683
+ uxth r3, r3
+ cmp r3, r2
+ bls .L682
+ ldr r3, .L687
+ ldr r0, .L687+4
+ ldrh r2, [r3, #3038]
+ bl printk
+.L683:
+ b .L683
+.L682:
ldr r3, [r4, #28]
strh r6, [r4, #2] @ movhi
adds r3, r3, #1
@@ -4623,9 +4612,14 @@ ftl_map_blk_alloc_new_blk:
strh r5, [r4] @ movhi
adds r3, r3, #1
strh r3, [r4, #8] @ movhi
-.L683:
+.L684:
movs r0, #0
pop {r3, r4, r5, r6, r7, pc}
+.L688:
+ .align 2
+.L687:
+ .word .LANCHOR0
+ .word .LC6
.fnend
.size ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk
.align 1
@@ -4640,70 +4634,70 @@ select_l2p_ram_region:
push {r4, r5, r6, r7, lr}
.save {r4, r5, r6, r7, lr}
movs r1, #0
- ldr r3, .L701
+ ldr r3, .L703
movs r4, #12
- ldr r7, .L701+4
+ ldr r7, .L703+4
movw r5, #65535
- ldrh r2, [r3, #2938]
- ldr r3, [r7, #932]
-.L688:
+ ldrh r2, [r3, #2950]
+ ldr r3, [r7, #980]
+.L690:
uxth r0, r1
cmp r0, r2
- bcs .L699
+ bcs .L701
adds r1, r1, #1
mla r6, r4, r1, r3
ldrh r6, [r6, #-12]
cmp r6, r5
- bne .L688
- b .L689
-.L699:
+ bne .L690
+ b .L691
+.L701:
movs r1, #0
mov r6, #-2147483648
mov lr, #12
mov r0, r2
-.L691:
+.L693:
uxth r5, r1
cmp r5, r2
- bcs .L700
+ bcs .L702
mla r4, lr, r1, r3
ldr r4, [r4, #4]
cmp r4, #0
- blt .L692
+ blt .L694
cmp r4, r6
itt cc
movcc r6, r4
movcc r0, r5
-.L692:
+.L694:
adds r1, r1, #1
- b .L691
-.L700:
+ b .L693
+.L702:
cmp r0, r2
- bcc .L689
- ldrh r7, [r7, #936]
+ bcc .L691
+ ldrh r7, [r7, #984]
movs r1, #0
mov r4, #-1
mov r0, r2
-.L694:
+.L696:
uxth r5, r1
cmp r5, r2
- bcs .L689
+ bcs .L691
ldr r6, [r3, #4]
cmp r6, r4
- bcs .L695
+ bcs .L697
ldrh lr, [r3]
cmp lr, r7
itt ne
movne r4, r6
movne r0, r5
-.L695:
+.L697:
adds r1, r1, #1
adds r3, r3, #12
- b .L694
-.L689:
+ b .L696
+.L691:
pop {r4, r5, r6, r7, pc}
-.L702:
+.L704:
.align 2
-.L701:
+.L703:
.word .LANCHOR0
.word .LANCHOR2
.fnend
@@ -4717,41 +4711,41 @@ FtlUpdateVaildLpn:
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r1, .L710
+ ldr r1, .L712
push {r4, r5, lr}
.save {r4, r5, lr}
- ldrh r2, [r1, #938]
+ ldrh r2, [r1, #986]
mov r3, r1
cmp r2, #4
- bhi .L704
- cbnz r0, .L704
+ bhi .L706
+ cbnz r0, .L706
adds r2, r2, #1
- strh r2, [r1, #938] @ movhi
+ strh r2, [r1, #986] @ movhi
pop {r4, r5, pc}
-.L704:
- ldr r1, .L710+4
+.L706:
+ ldr r1, .L712+4
movs r2, #0
- strh r2, [r3, #938] @ movhi
+ strh r2, [r3, #986] @ movhi
movw r5, #65535
- str r2, [r3, #940]
- ldrh r1, [r1, #2836]
- ldr r2, [r3, #768]
+ str r2, [r3, #988]
+ ldrh r1, [r1, #2848]
+ ldr r2, [r3, #816]
add r1, r2, r1, lsl #1
-.L705:
+.L707:
cmp r2, r1
- beq .L709
+ beq .L711
ldrh r4, [r2], #2
cmp r4, r5
ittt ne
- ldrne r0, [r3, #940]
+ ldrne r0, [r3, #988]
addne r0, r0, r4
- strne r0, [r3, #940]
- b .L705
-.L709:
- pop {r4, r5, pc}
+ strne r0, [r3, #988]
+ b .L707
.L711:
+ pop {r4, r5, pc}
+.L713:
.align 2
-.L710:
+.L712:
.word .LANCHOR2
.word .LANCHOR0
.fnend
@@ -4767,28 +4761,28 @@ ftl_set_blk_mode:
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
lsrs r3, r0, #5
- ldr r2, .L715
+ ldr r2, .L717
and r0, r0, #31
uxth r3, r3
- cbz r1, .L713
- ldr r1, [r2, #944]
+ cbz r1, .L715
+ ldr r1, [r2, #992]
movs r2, #1
lsls r2, r2, r0
ldr r0, [r1, r3, lsl #2]
orrs r2, r2, r0
str r2, [r1, r3, lsl #2]
bx lr
-.L713:
- ldr r1, [r2, #944]
+.L715:
+ ldr r1, [r2, #992]
movs r2, #1
lsls r2, r2, r0
ldr r0, [r1, r3, lsl #2]
bic r0, r0, r2
str r0, [r1, r3, lsl #2]
bx lr
-.L716:
+.L718:
.align 2
-.L715:
+.L717:
.word .LANCHOR2
.fnend
.size ftl_set_blk_mode, .-ftl_set_blk_mode
@@ -4802,17 +4796,17 @@ ftl_get_blk_mode:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L718
+ ldr r3, .L720
lsrs r1, r0, #5
- ldr r2, [r3, #944]
+ ldr r2, [r3, #992]
and r3, r0, #31
ldr r0, [r2, r1, lsl #2]
lsrs r0, r0, r3
and r0, r0, #1
bx lr
-.L719:
+.L721:
.align 2
-.L718:
+.L720:
.word .LANCHOR2
.fnend
.size ftl_get_blk_mode, .-ftl_get_blk_mode
@@ -4827,16 +4821,16 @@ ftl_sb_update_avl_pages:
@ frame_needed = 0, uses_anonymous_args = 0
movs r3, #0
strh r3, [r0, #4] @ movhi
- ldr r3, .L729
+ ldr r3, .L731
push {r4, r5, r6, r7, lr}
.save {r4, r5, r6, r7, lr}
adds r4, r2, #7
- ldrh r5, [r3, #2828]
+ ldrh r5, [r3, #2840]
movw r7, #65535
add r4, r0, r4, lsl #1
-.L721:
+.L723:
cmp r2, r5
- bcs .L727
+ bcs .L729
ldrh r6, [r4, #2]!
adds r2, r2, #1
cmp r6, r7
@@ -4845,16 +4839,16 @@ ftl_sb_update_avl_pages:
ldrhne r6, [r0, #4]
addne r6, r6, #1
strhne r6, [r0, #4] @ movhi
- b .L721
-.L727:
- ldrh r6, [r3, #2898]
+ b .L723
+.L729:
+ ldrh r6, [r3, #2910]
add r4, r0, #14
movs r2, #0
movw r7, #65535
-.L724:
+.L726:
uxth r3, r2
cmp r3, r5
- bcs .L728
+ bcs .L730
ldrh r3, [r4, #2]!
adds r2, r2, #1
cmp r3, r7
@@ -4865,12 +4859,12 @@ ftl_sb_update_avl_pages:
subne r3, r3, r1
it ne
strhne r3, [r0, #4] @ movhi
- b .L724
-.L728:
- pop {r4, r5, r6, r7, pc}
+ b .L726
.L730:
+ pop {r4, r5, r6, r7, pc}
+.L732:
.align 2
-.L729:
+.L731:
.word .LANCHOR0
.fnend
.size ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages
@@ -4886,62 +4880,62 @@ make_superblock:
push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
movs r3, #0
- ldr r6, .L744
+ ldr r6, .L746
add r7, r0, #16
mov r4, r0
mov r5, r3
- addw r10, r6, #2856
+ addw r10, r6, #2868
movw r9, #65535
- ldrh r8, [r6, #2828]
+ ldrh r8, [r6, #2840]
strh r3, [r0, #4] @ movhi
strb r3, [r0, #7]
-.L732:
+.L734:
uxth r3, r5
cmp r3, r8
- bcs .L743
+ bcs .L745
ldrb r0, [r10, r5] @ zero_extendqisi2
ldrh r1, [r4]
bl V2P_block
strh r9, [r7] @ movhi
mov fp, r0
bl FtlBbmIsBadBlock
- cbnz r0, .L733
+ cbnz r0, .L735
strh fp, [r7] @ movhi
ldrb r3, [r4, #7] @ zero_extendqisi2
adds r3, r3, #1
strb r3, [r4, #7]
-.L733:
+.L735:
adds r5, r5, #1
adds r7, r7, #2
- b .L732
-.L743:
+ b .L734
+.L745:
ldrb r2, [r4, #7] @ zero_extendqisi2
- ldrh r3, [r6, #2898]
+ ldrh r3, [r6, #2910]
smulbb r3, r2, r3
strh r3, [r4, #4] @ movhi
movs r3, #0
strb r3, [r4, #9]
- ldr r3, .L744+4
- ldr r2, [r3, #948]
- cbz r2, .L735
+ ldr r3, [r6, #2832]
+ cbz r3, .L737
+ ldr r3, .L746+4
ldrh r2, [r4]
- ldr r3, [r3, #748]
+ ldr r3, [r3, #752]
ldrh r3, [r3, r2, lsl #1]
cmp r3, #59
itt ls
movls r3, #1
strbls r3, [r4, #9]
-.L735:
+.L737:
ldrb r3, [r6] @ zero_extendqisi2
- cbz r3, .L736
+ cbz r3, .L738
movs r3, #1
strb r3, [r4, #9]
-.L736:
+.L738:
movs r0, #0
pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L745:
+.L747:
.align 2
-.L744:
+.L746:
.word .LANCHOR0
.word .LANCHOR2
.fnend
@@ -4958,43 +4952,43 @@ update_multiplier_value:
push {r3, r4, r5, r6, r7, r8, r9, lr}
.save {r3, r4, r5, r6, r7, r8, r9, lr}
movs r5, #0
- ldr r3, .L755
+ ldr r3, .L757
mov r7, r0
mov r4, r5
- addw r6, r3, #2856
- ldrh r8, [r3, #2828]
- ldrh r9, [r3, #2898]
-.L747:
+ addw r6, r3, #2868
+ ldrh r8, [r3, #2840]
+ ldrh r9, [r3, #2910]
+.L749:
uxth r3, r5
cmp r3, r8
- bcs .L754
+ bcs .L756
mov r1, r7
ldrb r0, [r6, r5] @ zero_extendqisi2
bl V2P_block
bl FtlBbmIsBadBlock
- cbnz r0, .L748
+ cbnz r0, .L750
add r4, r4, r9
uxth r4, r4
-.L748:
+.L750:
adds r5, r5, #1
- b .L747
-.L754:
- cbz r4, .L750
+ b .L749
+.L756:
+ cbz r4, .L752
mov r1, r4
mov r0, #32768
bl __aeabi_idiv
uxth r4, r0
-.L750:
- ldr r3, .L755+4
+.L752:
+ ldr r3, .L757+4
movs r2, #6
movs r0, #0
- ldr r3, [r3, #760]
+ ldr r3, [r3, #808]
mla r7, r2, r7, r3
strh r4, [r7, #4] @ movhi
pop {r3, r4, r5, r6, r7, r8, r9, pc}
-.L756:
+.L758:
.align 2
-.L755:
+.L757:
.word .LANCHOR0
.word .LANCHOR2
.fnend
@@ -5009,22 +5003,22 @@ GetFreeBlockMinEraseCount:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r2, .L760
- ldr r0, [r2, #780]
- cbz r0, .L758
- ldr r3, [r2, #760]
+ ldr r2, .L762
+ ldr r0, [r2, #828]
+ cbz r0, .L760
+ ldr r3, [r2, #808]
subs r0, r0, r3
- ldr r3, .L760+4
+ ldr r3, .L762+4
asrs r0, r0, #1
muls r0, r3, r0
- ldr r3, [r2, #748]
+ ldr r3, [r2, #752]
uxth r0, r0
ldrh r0, [r3, r0, lsl #1]
-.L758:
+.L760:
bx lr
-.L761:
+.L763:
.align 2
-.L760:
+.L762:
.word .LANCHOR2
.word -1431655765
.fnend
@@ -5038,14 +5032,14 @@ GetFreeBlockMaxEraseCount:
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r1, .L770
+ ldr r1, .L772
push {r4, r5, r6, r7, lr}
.save {r4, r5, r6, r7, lr}
- ldr r3, [r1, #780]
- cbz r3, .L768
- ldrh r2, [r1, #784]
+ ldr r3, [r1, #828]
+ cbz r3, .L770
+ ldrh r2, [r1, #832]
movs r6, #6
- ldr r4, [r1, #760]
+ ldr r4, [r1, #808]
movw r7, #65535
rsb r2, r2, r2, lsl #3
subs r3, r3, r4
@@ -5054,32 +5048,32 @@ GetFreeBlockMaxEraseCount:
cmp r0, r2
it gt
uxthgt r0, r2
- ldr r2, .L770+4
+ ldr r2, .L772+4
muls r3, r2, r3
movs r2, #0
uxth r3, r3
-.L765:
+.L767:
uxth r5, r2
cmp r5, r0
- bcs .L767
+ bcs .L769
mul r5, r6, r3
adds r2, r2, #1
ldrh r5, [r4, r5]
cmp r5, r7
- bne .L769
-.L767:
- ldr r2, [r1, #748]
+ bne .L771
+.L769:
+ ldr r2, [r1, #752]
ldrh r0, [r2, r3, lsl #1]
pop {r4, r5, r6, r7, pc}
-.L769:
+.L771:
mov r3, r5
- b .L765
-.L768:
+ b .L767
+.L770:
mov r0, r3
pop {r4, r5, r6, r7, pc}
-.L771:
+.L773:
.align 2
-.L770:
+.L772:
.word .LANCHOR2
.word -1431655765
.fnend
@@ -5096,334 +5090,332 @@ FtlPrintInfo2buf:
push {r4, r5, r6, r7, r8, r9, r10, lr}
.save {r4, r5, r6, r7, r8, r9, r10, lr}
mov r6, r0
- ldr r8, .L782+240
+ ldr r8, .L784+240
add r4, r6, #12
- ldr r1, .L782
.pad #32
sub sp, sp, #32
+ ldr r1, .L784
bl strcpy
mov r0, r4
- ldr r1, .L782+4
+ ldr r1, .L784+4
ldr r2, [r8, #1864]
bl sprintf
- ldr r1, .L782+8
- ldr r2, [r8, #2916]
+ ldr r1, .L784+8
+ ldr r2, [r8, #2928]
add r4, r4, r0
mov r0, r4
bl sprintf
- ldr r3, .L782+12
+ ldr r3, .L784+12
ldr r3, [r3, #504]
cmp r3, #1
add r4, r4, r0
- bne .L778
+ bne .L780
add r0, sp, #16
add r1, sp, #20
add r2, sp, #24
add r3, sp, #28
bl NandcGetTimeCfg
- mov r0, r4
- ldr r1, .L782+16
- ldr r7, .L782+20
ldr r3, [sp, #24]
ldr r2, [sp, #16]
+ mov r0, r4
+ ldr r1, .L784+16
str r3, [sp]
ldr r3, [sp, #28]
+ ldr r7, .L784+20
str r3, [sp, #4]
ldr r3, [sp, #20]
bl sprintf
- ldr r1, .L782+24
+ ldr r1, .L784+24
add r4, r4, r0
add r5, r4, #10
mov r0, r4
bl strcpy
mov r0, r5
- ldr r1, .L782+28
- ldr r2, [r8, #2960]
+ ldr r1, .L784+28
+ ldr r2, [r8, #2968]
bl sprintf
- ldr r1, .L782+32
- ldr r2, [r7, #940]
+ ldr r1, .L784+32
+ ldr r2, [r7, #988]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+36
- ldr r2, [r7, #952]
+ ldr r1, .L784+36
+ ldr r2, [r7, #996]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+40
- ldr r2, [r7, #956]
+ ldr r1, .L784+40
+ ldr r2, [r7, #1000]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+44
- ldr r2, [r7, #960]
+ ldr r1, .L784+44
+ ldr r2, [r7, #1004]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+48
- ldr r2, [r7, #964]
+ ldr r1, .L784+48
+ ldr r2, [r7, #1008]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+52
- ldr r2, [r7, #968]
+ ldr r1, .L784+52
+ ldr r2, [r7, #1012]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+56
- ldr r2, [r7, #972]
+ ldr r1, .L784+56
+ ldr r2, [r7, #1016]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r2, [r7, #976]
- ldr r1, .L782+60
+ ldr r2, [r7, #1020]
+ ldr r1, .L784+60
lsrs r2, r2, #11
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r2, [r7, #980]
- ldr r1, .L782+64
+ ldr r2, [r7, #1024]
+ ldr r1, .L784+64
lsrs r2, r2, #11
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+68
- ldr r2, [r7, #984]
+ ldr r1, .L784+68
+ ldr r2, [r7, #1028]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+72
- ldr r2, [r7, #988]
+ ldr r1, .L784+72
+ ldr r2, [r7, #1032]
add r5, r5, r0
mov r0, r5
bl sprintf
add r5, r5, r0
bl FtlBbtCalcTotleCnt
- ldr r1, .L782+76
- ldrh r2, [r8, #2974]
+ ldr r1, .L784+76
+ ldrh r2, [r8, #2978]
mov r3, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+80
- ldrh r2, [r7, #784]
+ ldr r1, .L784+80
+ ldrh r2, [r7, #832]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+84
- ldr r2, [r7, #992]
+ ldr r1, .L784+84
+ ldr r2, [r7, #1036]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+88
- ldr r2, [r7, #996]
+ ldr r1, .L784+88
+ ldr r2, [r7, #1040]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+92
- ldr r2, [r7, #1000]
+ ldr r1, .L784+92
+ ldr r2, [r7, #1044]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+96
- ldr r2, [r7, #752]
+ ldr r1, .L784+96
+ ldr r2, [r7, #756]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+100
- ldr r2, [r7, #1004]
+ ldr r1, .L784+100
+ ldr r2, [r7, #1048]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+104
- ldr r2, [r7, #1008]
+ ldr r1, .L784+104
+ ldr r2, [r7, #1052]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+108
- ldrh r2, [r7, #1042]
+ ldr r1, .L784+108
+ ldrh r2, [r7, #790]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+112
- ldrh r2, [r7, #1040]
+ ldr r1, .L784+112
+ ldrh r2, [r7, #788]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+116
- ldr r2, [r8, #2940]
+ ldr r1, .L784+116
+ ldr r2, [r8, #1896]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+120
- ldr r2, [r8, #2932]
+ ldr r1, .L784+120
+ ldr r2, [r8, #2944]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+124
- ldr r2, [r8, #2824]
+ ldr r1, .L784+124
+ ldr r2, [r8, #2836]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+128
- ldrh r2, [r8, #3034]
+ ldr r1, .L784+128
+ ldrh r2, [r8, #3038]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+132
- ldrh r2, [r8, #2836]
+ ldr r1, .L784+132
+ ldrh r2, [r8, #2848]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+136
- ldrh r2, [r7, #1060]
+ ldr r1, .L784+136
+ ldrh r2, [r7, #1056]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+140
- ldr r2, [r8, #2840]
+ ldr r1, .L784+140
+ ldr r2, [r8, #2852]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+144
- ldrh r2, [r7, #1064]
+ ldr r1, .L784+144
+ ldrh r2, [r7, #1060]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+148
- ldrh r2, [r8, #2968]
+ ldr r1, .L784+148
+ ldrh r2, [r8, #2972]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+152
- ldrh r2, [r7, #790]
+ ldr r1, .L784+152
+ ldrh r2, [r7, #838]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+156
- ldrb r2, [r7, #794] @ zero_extendqisi2
+ ldr r1, .L784+156
+ ldrb r2, [r7, #842] @ zero_extendqisi2
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+160
- ldrh r2, [r7, #788]
+ ldr r1, .L784+160
+ ldrh r2, [r7, #836]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+164
- ldrb r2, [r7, #796] @ zero_extendqisi2
+ ldr r1, .L784+164
+ ldrb r2, [r7, #844] @ zero_extendqisi2
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+168
- ldrh r2, [r7, #792]
+ ldr r1, .L784+168
+ ldrh r2, [r7, #840]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r3, [r7, #768]
- ldrh r2, [r7, #788]
- ldr r1, .L782+172
+ ldr r3, [r7, #816]
+ ldrh r2, [r7, #836]
+ ldr r1, .L784+172
ldrh r2, [r3, r2, lsl #1]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+176
- ldrh r2, [r7, #838]
+ ldr r1, .L784+176
+ ldrh r2, [r7, #886]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+180
- ldrb r2, [r7, #842] @ zero_extendqisi2
+ ldr r1, .L784+180
+ ldrb r2, [r7, #890] @ zero_extendqisi2
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+184
- ldrh r2, [r7, #836]
+ ldr r1, .L784+184
+ ldrh r2, [r7, #884]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+188
- ldrb r2, [r7, #844] @ zero_extendqisi2
+ ldr r1, .L784+188
+ ldrb r2, [r7, #892] @ zero_extendqisi2
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+192
- ldrh r2, [r7, #840]
+ ldr r1, .L784+192
+ ldrh r2, [r7, #888]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r3, [r7, #768]
- ldrh r2, [r7, #836]
- ldr r1, .L782+196
+ ldr r3, [r7, #816]
+ ldrh r2, [r7, #884]
+ ldr r1, .L784+196
ldrh r2, [r3, r2, lsl #1]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+200
- ldrh r2, [r7, #886]
+ ldr r1, .L784+200
+ ldrh r2, [r7, #934]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+204
- ldrb r2, [r7, #890] @ zero_extendqisi2
+ ldr r1, .L784+204
+ ldrb r2, [r7, #938] @ zero_extendqisi2
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+208
- ldrh r2, [r7, #884]
+ ldr r1, .L784+208
+ ldrh r2, [r7, #932]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+212
- ldrb r2, [r7, #892] @ zero_extendqisi2
+ ldr r1, .L784+212
+ ldrb r2, [r7, #940] @ zero_extendqisi2
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+216
- ldrh r2, [r7, #888]
+ ldr r1, .L784+216
+ ldrh r2, [r7, #936]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+220
- ldrh r2, [r7, #1078]
+ ldr r1, .L784+220
+ ldrh r2, [r7, #1074]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+224
- ldrb r2, [r7, #1082] @ zero_extendqisi2
+ ldr r1, .L784+224
+ ldrb r2, [r7, #1078] @ zero_extendqisi2
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+228
- ldrh r2, [r7, #1076]
+ ldr r1, .L784+228
+ ldrh r2, [r7, #1072]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+232
- ldrb r2, [r7, #1084] @ zero_extendqisi2
+ ldr r1, .L784+232
+ ldrb r2, [r7, #1080] @ zero_extendqisi2
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L782+236
- ldrh r2, [r7, #1080]
+ ldr r1, .L784+236
+ ldrh r2, [r7, #1076]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, [r7, #1212]
- ldr r3, [r7, #948]
- ldr r2, [r7, #1124]
- b .L783
-.L784:
+ ldr r1, [r7, #1208]
+ ldr r3, [r8, #2832]
+ ldr r2, [r7, #1120]
+ str r1, [sp]
+ b .L785
+.L786:
.align 2
-.L782:
- .word .LC4
- .word .LC5
- .word .LC6
- .word .LANCHOR1
+.L784:
.word .LC7
- .word .LANCHOR2
.word .LC8
.word .LC9
+ .word .LANCHOR1
.word .LC10
+ .word .LANCHOR2
.word .LC11
.word .LC12
.word .LC13
@@ -5475,145 +5467,144 @@ FtlPrintInfo2buf:
.word .LC59
.word .LC60
.word .LC61
+ .word .LC62
+ .word .LC63
+ .word .LC64
.word .LANCHOR0
-.L783:
+.L785:
+ ldr r1, [r7, #1200]
orr r2, r3, r2, lsl #8
- str r1, [sp]
+ str r1, [sp, #4]
+ ldr r3, [r7, #1204]
+ ldr r1, .L787
add r5, r5, r0
- ldr r1, [r7, #1204]
mov r0, r5
- str r1, [sp, #4]
- ldr r3, [r7, #1208]
- ldr r1, .L785
bl sprintf
- ldr r1, .L785+4
- ldr r2, [r7, #1200]
+ ldr r1, .L787+4
+ ldr r2, [r7, #1196]
add r5, r5, r0
mov r0, r5
bl sprintf
- ldr r1, .L785+8
- ldr r2, [r7, #1224]
+ ldr r1, .L787+8
+ ldr r2, [r7, #1220]
adds r4, r5, r0
mov r0, r4
bl sprintf
- ldr r1, .L785+12
- ldrh r2, [r7, #1640]
+ ldr r1, .L787+12
+ ldrh r2, [r7, #1636]
add r4, r4, r0
mov r0, r4
bl sprintf
- ldr r1, .L785+16
- ldrh r2, [r7, #1642]
+ ldr r1, .L787+16
+ ldrh r2, [r7, #1638]
add r4, r4, r0
mov r0, r4
bl sprintf
- ldr r1, .L785+20
- ldr r2, [r7, #1644]
+ ldr r1, .L787+20
+ ldr r2, [r7, #1640]
add r4, r4, r0
mov r0, r4
bl sprintf
- ldr r1, .L785+24
- ldrh r2, [r7, #1648]
+ ldr r1, .L787+24
+ ldrh r2, [r7, #1644]
add r4, r4, r0
mov r0, r4
bl sprintf
add r4, r4, r0
bl GetFreeBlockMinEraseCount
- ldr r1, .L785+28
+ ldr r1, .L787+28
mov r2, r0
mov r0, r4
bl sprintf
add r4, r4, r0
- ldrh r0, [r7, #784]
+ ldrh r0, [r7, #832]
bl GetFreeBlockMaxEraseCount
- ldr r1, .L785+32
+ ldr r1, .L787+32
mov r2, r0
mov r0, r4
bl sprintf
- ldrh r3, [r7, #1076]
+ ldrh r3, [r7, #1072]
movw r2, #65535
cmp r3, r2
add r4, r4, r0
- beq .L775
- ldr r2, [r7, #768]
+ beq .L777
+ ldr r2, [r7, #816]
mov r0, r4
- ldr r1, .L785+36
+ ldr r1, .L787+36
ldrh r2, [r2, r3, lsl #1]
bl sprintf
add r4, r4, r0
-.L775:
+.L777:
movs r0, #0
movs r5, #0
bl List_get_gc_head_node
mov r9, #6
movw r10, #65535
uxth r3, r0
-.L777:
+.L779:
cmp r3, r10
- beq .L776
- ldr r2, [r7, #768]
+ beq .L778
+ ldr r2, [r7, #816]
mov r0, r4
mul r8, r9, r3
- ldr r1, .L785+40
+ ldr r1, .L787+40
ldrh r2, [r2, r3, lsl #1]
str r2, [sp]
- ldr r2, [r7, #760]
+ ldr r2, [r7, #808]
add r2, r2, r8
ldrh r2, [r2, #4]
str r2, [sp, #4]
- ldr r2, [r7, #748]
+ ldr r2, [r7, #752]
ldrh r2, [r2, r3, lsl #1]
str r2, [sp, #8]
mov r2, r5
bl sprintf
adds r5, r5, #1
- ldr r3, [r7, #760]
+ ldr r3, [r7, #808]
cmp r5, #16
ldrh r3, [r3, r8]
add r4, r4, r0
- bne .L777
-.L776:
- ldr r2, [r7, #760]
+ bne .L779
+.L778:
+ ldr r2, [r7, #808]
movs r5, #0
- ldr r3, [r7, #780]
+ ldr r3, [r7, #828]
mov r9, #6
movw r10, #65535
subs r3, r3, r2
- ldr r2, .L785+44
+ ldr r2, .L787+44
asrs r3, r3, #1
muls r3, r2, r3
uxth r3, r3
-.L779:
+.L781:
cmp r3, r10
- beq .L778
+ beq .L780
mul r8, r9, r3
- ldr r2, [r7, #760]
+ ldr r2, [r7, #808]
mov r0, r4
- ldr r1, .L785+48
+ ldr r1, .L787+48
add r2, r2, r8
ldrh r2, [r2, #4]
str r2, [sp]
- ldr r2, [r7, #748]
+ ldr r2, [r7, #752]
ldrh r2, [r2, r3, lsl #1]
str r2, [sp, #4]
mov r2, r5
bl sprintf
adds r5, r5, #1
- ldr r3, [r7, #760]
+ ldr r3, [r7, #808]
cmp r5, #4
ldrh r3, [r3, r8]
add r4, r4, r0
- bne .L779
-.L778:
+ bne .L781
+.L780:
subs r0, r4, r6
add sp, sp, #32
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, pc}
-.L786:
+.L788:
.align 2
-.L785:
- .word .LC62
- .word .LC63
- .word .LC64
+.L787:
.word .LC65
.word .LC66
.word .LC67
@@ -5622,24 +5613,27 @@ FtlPrintInfo2buf:
.word .LC70
.word .LC71
.word .LC72
- .word -1431655765
.word .LC73
+ .word .LC74
+ .word .LC75
+ .word -1431655765
+ .word .LC76
.fnend
.size FtlPrintInfo2buf, .-FtlPrintInfo2buf
.align 1
- .global rknand_proc_ftlread
+ .global ftl_proc_ftl_read
.thumb
.thumb_func
- .type rknand_proc_ftlread, %function
-rknand_proc_ftlread:
+ .type ftl_proc_ftl_read, %function
+ftl_proc_ftl_read:
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
push {r3, r4, r5, lr}
.save {r3, r4, r5, lr}
mov r5, r0
- ldr r1, .L788
- ldr r2, .L788+4
+ ldr r1, .L790
+ ldr r2, .L790+4
bl sprintf
adds r4, r5, r0
mov r0, r4
@@ -5647,13 +5641,13 @@ rknand_proc_ftlread:
add r0, r0, r4
subs r0, r0, r5
pop {r3, r4, r5, pc}
-.L789:
+.L791:
.align 2
-.L788:
- .word .LC74
- .word .LC75
+.L790:
+ .word .LC77
+ .word .LC78
.fnend
- .size rknand_proc_ftlread, .-rknand_proc_ftlread
+ .size ftl_proc_ftl_read, .-ftl_proc_ftl_read
.align 1
.global GetSwlReplaceBlock
.thumb
@@ -5667,184 +5661,185 @@ GetSwlReplaceBlock:
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.pad #28
sub sp, sp, #28
- ldr r4, .L818
- ldr r2, [r4, #1000]
- ldr r3, [r4, #1008]
+ ldr r4, .L820
+ ldr r2, [r4, #1044]
+ ldr r3, [r4, #1052]
cmp r2, r3
- bcs .L791
- ldr r2, .L818+4
+ bcs .L793
+ ldr r2, .L820+4
movs r3, #0
- ldr r0, [r4, #748]
- str r3, [r4, #992]
- ldrh r1, [r2, #2836]
+ ldr r0, [r4, #752]
+ str r3, [r4, #1036]
+ ldrh r1, [r2, #2848]
mov r5, r2
-.L792:
+.L794:
cmp r3, r1
- bcs .L817
+ bcs .L819
ldrh r6, [r0, r3, lsl #1]
adds r3, r3, #1
- ldr r2, [r4, #992]
+ ldr r2, [r4, #1036]
add r2, r2, r6
- str r2, [r4, #992]
- b .L792
-.L817:
- ldr r6, [r4, #992]
+ str r2, [r4, #1036]
+ b .L794
+.L819:
+ ldr r6, [r4, #1036]
mov r0, r6
bl __aeabi_uidiv
- ldrh r1, [r5, #2888]
- str r0, [r4, #1000]
- ldr r0, [r4, #996]
+ ldrh r1, [r5, #2900]
+ str r0, [r4, #1044]
+ ldr r0, [r4, #1040]
subs r0, r6, r0
bl __aeabi_uidiv
- str r0, [r4, #992]
- b .L794
-.L791:
- ldr r3, [r4, #1004]
+ str r0, [r4, #1036]
+ b .L796
+.L793:
+ ldr r3, [r4, #1048]
cmp r2, r3
- bls .L794
- ldr r0, .L818+4
+ bls .L796
+ ldr r0, .L820+4
adds r3, r3, #1
- str r3, [r4, #1004]
+ str r3, [r4, #1048]
movs r3, #0
-.L796:
- ldrh r2, [r0, #2836]
+.L798:
+ ldrh r2, [r0, #2848]
cmp r3, r2
- bcs .L794
- ldr r1, [r4, #748]
+ bcs .L796
+ ldr r1, [r4, #752]
ldrh r2, [r1, r3, lsl #1]
adds r2, r2, #1
strh r2, [r1, r3, lsl #1] @ movhi
adds r3, r3, #1
- b .L796
-.L794:
- ldr r6, [r4, #1008]
- ldr r8, [r4, #1000]
+ b .L798
+.L796:
+ ldr r6, [r4, #1052]
+ ldr r8, [r4, #1044]
add r3, r6, #256
- ldr r2, .L818
cmp r3, r8
- bls .L799
- ldr r1, [r2, #1004]
+ bls .L801
+ ldr r2, .L820
add r3, r6, #768
- cmp r3, r1
- bls .L799
- ldr r3, [r2, #948]
- cbnz r3, .L800
-.L802:
+ ldr r2, [r2, #1048]
+ cmp r3, r2
+ bls .L801
+ ldr r3, .L820+4
+ ldr r3, [r3, #2832]
+ cbnz r3, .L802
+.L804:
movw r0, #65535
- b .L801
-.L800:
+ b .L803
+.L802:
cmp r6, #30
- bhi .L802
-.L799:
- ldrh r0, [r4, #784]
+ bhi .L804
+.L801:
+ ldrh r0, [r4, #832]
add r0, r0, r0, lsl #1
ubfx r0, r0, #2, #16
bl GetFreeBlockMaxEraseCount
add r3, r6, #64
cmp r0, r3
mov r9, r0
- bcs .L803
+ bcs .L805
cmp r6, #30
- bhi .L802
-.L803:
- ldr r3, [r4, #764]
- ldr r2, .L818
+ bhi .L804
+.L805:
+ ldr r3, [r4, #812]
+ ldr r2, .L820
cmp r3, #0
- beq .L802
- ldr r1, .L818+4
+ beq .L804
+ ldr r1, .L820+4
movw r7, #65535
- ldr r0, [r2, #760]
+ ldr r0, [r2, #808]
mov ip, #6
- ldr r10, [r2, #748]
+ ldr r10, [r2, #752]
mov r5, r7
- ldrh r1, [r1, #2836]
+ ldrh r1, [r1, #2848]
mov lr, r7
str r1, [sp, #20]
movs r1, #0
-.L804:
+.L806:
ldrh r2, [r3]
cmp r2, lr
str r2, [sp, #16]
- beq .L806
+ beq .L808
adds r1, r1, #1
ldr r2, [sp, #20]
uxth r1, r1
cmp r1, r2
- bhi .L802
+ bhi .L804
ldrh fp, [r3, #4]
cmp fp, #0
- beq .L805
+ beq .L807
subs r3, r3, r0
- ldr r2, .L818+8
+ ldr r2, .L820+8
asrs r3, r3, #1
muls r3, r2, r3
uxth r3, r3
ldrh fp, [r10, r3, lsl #1]
cmp fp, r6
- bls .L810
+ bls .L812
cmp fp, r7
itt cc
movcc r7, fp
movcc r5, r3
-.L805:
+.L807:
ldr r3, [sp, #16]
mla r3, ip, r3, r0
- b .L804
-.L810:
+ b .L806
+.L812:
mov r5, r3
-.L806:
+.L808:
movw r3, #65535
cmp r5, r3
- beq .L802
+ beq .L804
ldrh fp, [r10, r5, lsl #1]
lsls r3, r5, #1
cmp fp, r6
- bls .L808
+ bls .L810
str r3, [sp, #16]
bl GetFreeBlockMinEraseCount
ldr r3, [sp, #16]
cmp r0, r6
it hi
- strhi r7, [r4, #1008]
-.L808:
+ strhi r7, [r4, #1052]
+.L810:
cmp fp, r8
- bcs .L802
+ bcs .L804
add r2, fp, #128
cmp r9, r2
- ble .L802
+ ble .L804
add r2, fp, #256
cmp r2, r8
- bcc .L809
- ldr r2, [r4, #1004]
+ bcc .L811
+ ldr r2, [r4, #1048]
add fp, fp, #768
cmp fp, r2
- bcs .L802
-.L809:
- ldr r2, [r4, #768]
+ bcs .L804
+.L811:
+ ldr r2, [r4, #816]
mov r1, r5
- ldr r0, .L818+12
+ ldr r0, .L820+12
ldrh r2, [r2, r3]
str r2, [sp]
mov r2, r8
ldrh r3, [r10, r3]
str r9, [sp, #8]
str r3, [sp, #4]
- ldr r3, [r4, #1004]
+ ldr r3, [r4, #1048]
bl printk
mov r0, r5
movs r3, #1
- str r3, [r4, #1652]
-.L801:
+ str r3, [r4, #1648]
+.L803:
add sp, sp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L819:
+.L821:
.align 2
-.L818:
+.L820:
.word .LANCHOR2
.word .LANCHOR0
.word -1431655765
- .word .LC76
+ .word .LC79
.fnend
.size GetSwlReplaceBlock, .-GetSwlReplaceBlock
.align 1
@@ -5860,18 +5855,18 @@ free_data_superblock:
cmp r0, r2
push {r3, lr}
.save {r3, lr}
- beq .L821
- ldr r2, .L822
+ beq .L823
+ ldr r2, .L824
movs r1, #0
- ldr r2, [r2, #768]
+ ldr r2, [r2, #816]
strh r1, [r2, r0, lsl #1] @ movhi
bl INSERT_FREE_LIST
-.L821:
+.L823:
movs r0, #0
pop {r3, pc}
-.L823:
+.L825:
.align 2
-.L822:
+.L824:
.word .LANCHOR2
.fnend
.size free_data_superblock, .-free_data_superblock
@@ -5884,9 +5879,9 @@ FtlGcBufInit:
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r2, .L835
+ ldr r2, .L837
mov ip, #36
- ldr r0, .L835+4
+ ldr r0, .L837+4
movs r3, #0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
@@ -5894,68 +5889,68 @@ FtlGcBufInit:
mov lr, #1
mov r6, r0
mov r4, r2
- str r3, [r2, #1656]
-.L825:
- ldrh r1, [r0, #2828]
+ str r3, [r2, #1652]
+.L827:
+ ldrh r1, [r0, #2840]
adds r5, r3, #1
uxth r3, r3
- ldr r8, .L835+4
+ ldr r8, .L837+4
cmp r3, r1
- bcs .L833
+ bcs .L835
mul r8, r7, r3
- ldr r9, [r2, #1660]
+ ldr r9, [r2, #1656]
add r1, r9, r8
str lr, [r1, #8]
- ldrh r1, [r0, #2908]
+ ldrh r1, [r0, #2920]
muls r1, r3, r1
it mi
addmi r1, r1, #3
bic r10, r1, #3
- ldr r1, [r4, #1664]
+ ldr r1, [r4, #1660]
add r1, r1, r10
str r1, [r9, r8]
- ldr r10, [r2, #1660]
- ldrh r1, [r6, #2910]
+ ldr r10, [r2, #1656]
+ ldrh r1, [r6, #2922]
muls r1, r3, r1
it mi
addmi r1, r1, #3
add r9, r10, r8
bic fp, r1, #3
- ldr r1, [r4, #1668]
+ ldr r1, [r4, #1664]
add r1, r1, fp
str r1, [r9, #4]
- ldr r1, [r2, #1672]
+ ldr r1, [r2, #1668]
mla r3, ip, r3, r1
ldr r1, [r10, r8]
str r1, [r3, #8]
ldr r1, [r9, #4]
str r1, [r3, #12]
mov r3, r5
- b .L825
-.L833:
- ldr r0, .L835
+ b .L827
+.L835:
+ ldr r0, .L837
mov lr, #12
movs r5, #0
-.L829:
- ldr r3, [r2, #1676]
+.L831:
+ ldr r3, [r2, #1672]
cmp r1, r3
- bcs .L834
+ bcs .L836
mul r7, lr, r1
- ldr r6, [r0, #1660]
- ldr r4, [r0, #1664]
+ ldr r6, [r0, #1656]
+ ldr r4, [r0, #1660]
adds r3, r6, r7
str r5, [r3, #8]
- ldrh r3, [r8, #2908]
+ ldrh r3, [r8, #2920]
muls r3, r1, r3
it mi
addmi r3, r3, #3
bic r3, r3, #3
add r3, r3, r4
str r3, [r6, r7]
- ldr r3, [r2, #1660]
- ldr r6, [r0, #1668]
+ ldr r3, [r2, #1656]
+ ldr r6, [r0, #1664]
add r7, r7, r3
- ldrh r3, [r8, #2910]
+ ldrh r3, [r8, #2922]
muls r3, r1, r3
add r1, r1, #1
it mi
@@ -5964,12 +5959,12 @@ FtlGcBufInit:
uxth r1, r1
add r3, r3, r6
str r3, [r7, #4]
- b .L829
-.L834:
- pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
+ b .L831
.L836:
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
+.L838:
.align 2
-.L835:
+.L837:
.word .LANCHOR2
.word .LANCHOR0
.fnend
@@ -5983,41 +5978,41 @@ FtlGcBufFree:
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L844
+ ldr r3, .L846
push {r4, r5, r6, r7, r8, r9, r10, lr}
.save {r4, r5, r6, r7, r8, r9, r10, lr}
movs r5, #0
- ldr lr, [r3, #1676]
+ ldr lr, [r3, #1672]
mov r10, #36
- ldr r6, [r3, #1660]
+ ldr r6, [r3, #1656]
mov r8, #12
mov ip, r5
-.L838:
+.L840:
uxth r4, r5
cmp r4, r1
- bcs .L837
+ bcs .L839
mla r4, r10, r4, r0
movs r2, #0
-.L839:
+.L841:
uxth r3, r2
cmp r3, lr
- bcs .L840
+ bcs .L842
mul r3, r8, r3
ldr r7, [r4, #8]
adds r2, r2, #1
add r9, r6, r3
ldr r3, [r6, r3]
cmp r3, r7
- bne .L839
+ bne .L841
str ip, [r9, #8]
-.L840:
+.L842:
adds r5, r5, #1
- b .L838
-.L837:
+ b .L840
+.L839:
pop {r4, r5, r6, r7, r8, r9, r10, pc}
-.L845:
+.L847:
.align 2
-.L844:
+.L846:
.word .LANCHOR2
.fnend
.size FtlGcBufFree, .-FtlGcBufFree
@@ -6030,43 +6025,43 @@ FtlGcBufAlloc:
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L854
+ ldr r3, .L856
mov ip, #1
push {r4, r5, r6, r7, r8, r9, lr}
.save {r4, r5, r6, r7, r8, r9, lr}
movs r4, #0
- ldr r5, [r3, #1676]
+ ldr r5, [r3, #1672]
mov lr, #12
- ldr r6, [r3, #1660]
+ ldr r6, [r3, #1656]
mov r8, #36
-.L847:
+.L849:
uxth r2, r4
cmp r2, r1
- bcs .L853
+ bcs .L855
mov r9, #0
-.L848:
+.L850:
uxth r3, r9
cmp r3, r5
- bcs .L849
+ bcs .L851
mla r3, lr, r3, r6
add r9, r9, #1
ldr r7, [r3, #8]
cmp r7, #0
- bne .L848
+ bne .L850
mla r2, r8, r2, r0
ldr r7, [r3]
str ip, [r3, #8]
str r7, [r2, #8]
ldr r3, [r3, #4]
str r3, [r2, #12]
-.L849:
+.L851:
adds r4, r4, #1
- b .L847
-.L853:
- pop {r4, r5, r6, r7, r8, r9, pc}
+ b .L849
.L855:
+ pop {r4, r5, r6, r7, r8, r9, pc}
+.L857:
.align 2
-.L854:
+.L856:
.word .LANCHOR2
.fnend
.size FtlGcBufAlloc, .-FtlGcBufAlloc
@@ -6080,24 +6075,24 @@ IsBlkInGcList:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r2, .L862
- ldr r3, [r2, #1680]
- ldrh r2, [r2, #1684]
+ ldr r2, .L864
+ ldr r3, [r2, #1676]
+ ldrh r2, [r2, #1680]
add r2, r3, r2, lsl #1
-.L857:
+.L859:
cmp r3, r2
- beq .L861
+ beq .L863
ldrh r1, [r3], #2
cmp r1, r0
- bne .L857
+ bne .L859
movs r0, #1
bx lr
-.L861:
+.L863:
movs r0, #0
bx lr
-.L863:
+.L865:
.align 2
-.L862:
+.L864:
.word .LANCHOR2
.fnend
.size IsBlkInGcList, .-IsBlkInGcList
@@ -6117,42 +6112,42 @@ FtlGcUpdatePage:
mov r7, r1
mov r8, r2
bl P2V_block_in_plane
- ldr r3, .L871
+ ldr r3, .L873
movs r4, #0
- ldrh r1, [r3, #1684]
- ldr r2, [r3, #1680]
-.L865:
+ ldrh r1, [r3, #1680]
+ ldr r2, [r3, #1676]
+.L867:
uxth r5, r4
cmp r5, r1
- bcs .L869
+ bcs .L871
adds r4, r4, #1
add lr, r2, r4, lsl #1
ldrh lr, [lr, #-2]
cmp lr, r0
- bne .L865
-.L869:
- cmp r5, r1
bne .L867
+.L871:
+ cmp r5, r1
+ bne .L869
strh r0, [r2, r5, lsl #1] @ movhi
- ldrh r0, [r3, #1684]
+ ldrh r0, [r3, #1680]
adds r0, r0, #1
- strh r0, [r3, #1684] @ movhi
-.L867:
- ldrh r2, [r3, #1692]
+ strh r0, [r3, #1680] @ movhi
+.L869:
+ ldrh r2, [r3, #1688]
movs r0, #12
muls r0, r2, r0
- ldr r2, [r3, #1688]
+ ldr r2, [r3, #1684]
adds r1, r2, r0
str r7, [r1, #4]
str r8, [r1, #8]
str r6, [r2, r0]
- ldrh r2, [r3, #1692]
+ ldrh r2, [r3, #1688]
adds r2, r2, #1
- strh r2, [r3, #1692] @ movhi
+ strh r2, [r3, #1688] @ movhi
pop {r4, r5, r6, r7, r8, pc}
-.L872:
+.L874:
.align 2
-.L871:
+.L873:
.word .LANCHOR2
.fnend
.size FtlGcUpdatePage, .-FtlGcUpdatePage
@@ -6169,31 +6164,31 @@ FtlGcRefreshOpenBlock:
.save {r4, lr}
mov r4, r0
mov r1, r4
- ldr r0, .L876
+ ldr r0, .L878
bl printk
- ldr r3, .L876+4
- ldrh r0, [r3, #1694]
+ ldr r3, .L878+4
+ ldrh r0, [r3, #1690]
cmp r0, r4
- beq .L874
- ldrh r1, [r3, #1696]
+ beq .L876
+ ldrh r1, [r3, #1692]
cmp r1, r4
- beq .L874
+ beq .L876
movw r2, #65535
cmp r0, r2
- bne .L875
- strh r4, [r3, #1694] @ movhi
- b .L874
-.L875:
+ bne .L877
+ strh r4, [r3, #1690] @ movhi
+ b .L876
+.L877:
cmp r1, r2
it eq
- strheq r4, [r3, #1696] @ movhi
-.L874:
+ strheq r4, [r3, #1692] @ movhi
+.L876:
movs r0, #0
pop {r4, pc}
-.L877:
+.L879:
.align 2
-.L876:
- .word .LC77
+.L878:
+ .word .LC80
.word .LANCHOR2
.fnend
.size FtlGcRefreshOpenBlock, .-FtlGcRefreshOpenBlock
@@ -6210,31 +6205,31 @@ FtlGcRefreshBlock:
.save {r4, lr}
mov r4, r0
mov r1, r4
- ldr r0, .L881
+ ldr r0, .L883
bl printk
- ldr r3, .L881+4
- ldrh r0, [r3, #1694]
+ ldr r3, .L883+4
+ ldrh r0, [r3, #1690]
cmp r0, r4
- beq .L879
- ldrh r1, [r3, #1696]
+ beq .L881
+ ldrh r1, [r3, #1692]
cmp r1, r4
- beq .L879
+ beq .L881
movw r2, #65535
cmp r0, r2
- bne .L880
- strh r4, [r3, #1694] @ movhi
- b .L879
-.L880:
+ bne .L882
+ strh r4, [r3, #1690] @ movhi
+ b .L881
+.L882:
cmp r1, r2
it eq
- strheq r4, [r3, #1696] @ movhi
-.L879:
+ strheq r4, [r3, #1692] @ movhi
+.L881:
movs r0, #0
pop {r4, pc}
-.L882:
+.L884:
.align 2
-.L881:
- .word .LC77
+.L883:
+ .word .LC80
.word .LANCHOR2
.fnend
.size FtlGcRefreshBlock, .-FtlGcRefreshBlock
@@ -6251,53 +6246,55 @@ FtlGcMarkBadPhyBlk:
.save {r4, r5, r6, lr}
mov r5, r0
bl P2V_block_in_plane
- ldr r4, .L892
+ ldr r4, .L894
mov r2, r5
- ldrh r1, [r4, #1698]
+ ldrh r1, [r4, #1694]
mov r6, r0
- ldr r0, .L892+4
+ ldr r0, .L894+4
bl printk
mov r0, r6
bl FtlGcRefreshBlock
- ldr r2, [r4, #948]
+ ldr r3, .L894+8
+ ldr r2, [r3, #2832]
mov r3, r4
- cbz r2, .L884
- ldr r1, [r4, #748]
+ cbz r2, .L886
+ ldr r1, [r4, #752]
ldrh r2, [r1, r6, lsl #1]
cmp r2, #29
itt hi
subhi r2, r2, #30
strhhi r2, [r1, r6, lsl #1] @ movhi
-.L884:
- ldrh r2, [r3, #1698]
+.L886:
+ ldrh r2, [r3, #1694]
movs r1, #0
- ldr r4, .L892+8
-.L885:
+ ldr r4, .L894+12
+.L887:
uxth r0, r1
cmp r0, r2
- bcs .L891
+ bcs .L893
adds r1, r1, #1
add r0, r4, r1, lsl #1
ldrh r0, [r0, #-2]
cmp r0, r5
- bne .L885
- b .L886
-.L891:
+ bne .L887
+ b .L888
+.L893:
cmp r2, #15
itttt ls
addls r1, r2, #1
- strhls r1, [r3, #1698] @ movhi
+ strhls r1, [r3, #1694] @ movhi
addls r3, r3, r2, lsl #1
- strhls r5, [r3, #1700] @ movhi
-.L886:
+ strhls r5, [r3, #1696] @ movhi
+.L888:
movs r0, #0
pop {r4, r5, r6, pc}
-.L893:
+.L895:
.align 2
-.L892:
+.L894:
.word .LANCHOR2
- .word .LC78
- .word .LANCHOR2+1700
+ .word .LC81
+ .word .LANCHOR0
+ .word .LANCHOR2+1696
.fnend
.size FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk
.align 1
@@ -6311,32 +6308,32 @@ FtlGcReFreshBadBlk:
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, lr}
.save {r4, lr}
- ldr r4, .L900
- ldrh r3, [r4, #1698]
- cbz r3, .L895
- ldrh r1, [r4, #1694]
+ ldr r4, .L902
+ ldrh r3, [r4, #1694]
+ cbz r3, .L897
+ ldrh r1, [r4, #1690]
movw r2, #65535
cmp r1, r2
- bne .L895
- ldrh r2, [r4, #1734]
+ bne .L897
+ ldrh r2, [r4, #1730]
cmp r2, r3
itt cs
movcs r3, #0
- strhcs r3, [r4, #1734] @ movhi
- ldrh r3, [r4, #1734]
+ strhcs r3, [r4, #1730] @ movhi
+ ldrh r3, [r4, #1730]
add r3, r4, r3, lsl #1
- ldrh r0, [r3, #1700]
+ ldrh r0, [r3, #1696]
bl P2V_block_in_plane
bl FtlGcRefreshBlock
- ldrh r3, [r4, #1734]
+ ldrh r3, [r4, #1730]
adds r3, r3, #1
- strh r3, [r4, #1734] @ movhi
-.L895:
+ strh r3, [r4, #1730] @ movhi
+.L897:
movs r0, #0
pop {r4, pc}
-.L901:
+.L903:
.align 2
-.L900:
+.L902:
.word .LANCHOR2
.fnend
.size FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk
@@ -6352,9 +6349,9 @@ ftl_memset:
push {r4, lr}
.save {r4, lr}
mov r4, r0
- cbz r2, .L903
+ cbz r2, .L905
bl memset
-.L903:
+.L905:
mov r0, r4
pop {r4, pc}
.fnend
@@ -6371,64 +6368,64 @@ FtlMemInit:
push {r3, r4, r5, r6, r7, r8, r9, lr}
.save {r3, r4, r5, r6, r7, r8, r9, lr}
mov r0, #1024
- ldr r4, .L1011
+ ldr r4, .L1013
movs r6, #0
- ldr r5, .L1011+4
+ ldr r5, .L1013+4
movw r3, #65535
movs r7, #12
mov r8, #36
- strh r6, [r4, #1736] @ movhi
- ldrh r1, [r5, #2904]
- str r6, [r4, #1740]
- str r6, [r4, #1124]
- str r6, [r4, #984]
- str r6, [r4, #988]
- str r6, [r4, #972]
- str r6, [r4, #960]
- str r6, [r4, #956]
- str r6, [r4, #964]
- str r6, [r4, #968]
- str r6, [r4, #952]
- str r6, [r4, #992]
- str r6, [r4, #996]
- str r6, [r4, #752]
+ strh r6, [r4, #1732] @ movhi
+ ldrh r1, [r5, #2916]
+ str r6, [r4, #1736]
+ str r6, [r4, #1120]
+ str r6, [r4, #1028]
+ str r6, [r4, #1032]
+ str r6, [r4, #1016]
str r6, [r4, #1004]
+ str r6, [r4, #1000]
str r6, [r4, #1008]
- str r6, [r4, #1744]
- str r6, [r4, #1652]
- str r3, [r4, #1748]
+ str r6, [r4, #1012]
+ str r6, [r4, #996]
+ str r6, [r4, #1036]
+ str r6, [r4, #1040]
+ str r6, [r4, #756]
+ str r6, [r4, #1048]
+ str r6, [r4, #1052]
+ str r6, [r4, #1740]
+ str r6, [r4, #1648]
+ str r3, [r4, #1744]
+ str r6, [r4, #1748]
+ str r6, [r4, #1640]
str r6, [r4, #1752]
- str r6, [r4, #1644]
- str r6, [r5, #2964]
- strh r3, [r4, #1694] @ movhi
- strh r3, [r4, #1696] @ movhi
+ strh r3, [r4, #1690] @ movhi
+ strh r3, [r4, #1692] @ movhi
movs r3, #32
- strh r6, [r4, #1648] @ movhi
- strh r3, [r4, #1640] @ movhi
+ strh r6, [r4, #1644] @ movhi
+ strh r3, [r4, #1636] @ movhi
movs r3, #128
- strh r6, [r4, #1698] @ movhi
- strh r3, [r4, #1642] @ movhi
+ strh r6, [r4, #1694] @ movhi
+ strh r3, [r4, #1638] @ movhi
strh r6, [r4, #1756] @ movhi
- strh r6, [r4, #1734] @ movhi
+ strh r6, [r4, #1730] @ movhi
bl __aeabi_idiv
- ldrh r3, [r5, #2828]
- str r6, [r5, #2952]
+ ldrh r3, [r5, #2840]
+ str r6, [r5, #2960]
lsls r3, r3, #2
cmp r0, r3
str r0, [r4, #1760]
- ldrh r0, [r5, #2902]
+ ldrh r0, [r5, #2914]
it hi
strhi r3, [r4, #1760]
lsls r0, r0, #1
bl ftl_malloc
- str r0, [r4, #1680]
- ldrh r0, [r5, #2902]
+ str r0, [r4, #1676]
+ ldrh r0, [r5, #2914]
muls r0, r7, r0
bl ftl_malloc
- ldrh r6, [r5, #2828]
+ ldrh r6, [r5, #2840]
mul r6, r8, r6
lsl r9, r6, #3
- str r0, [r4, #1688]
+ str r0, [r4, #1684]
mov r0, r9
bl ftl_malloc
str r0, [r4, #1764]
@@ -6440,303 +6437,303 @@ FtlMemInit:
str r0, [r4, #1772]
mov r0, r6
bl ftl_malloc
- str r0, [r4, #744]
+ str r0, [r4, #748]
mov r0, r6
bl ftl_malloc
- str r0, [r4, #1672]
+ str r0, [r4, #1668]
ldr r0, [r4, #1760]
mul r0, r8, r0
bl ftl_malloc
- ldrh r6, [r5, #2908]
- ldrh r3, [r5, #2828]
+ ldrh r6, [r5, #2920]
+ ldrh r3, [r5, #2840]
lsls r3, r3, #1
adds r3, r3, #1
- str r3, [r4, #1676]
- str r0, [r5, #2956]
- mov r0, r6
- bl ftl_malloc
- str r0, [r4, #756]
+ str r3, [r4, #1672]
+ str r0, [r5, #2964]
mov r0, r6
bl ftl_malloc
str r0, [r4, #1776]
mov r0, r6
bl ftl_malloc
str r0, [r4, #1780]
- ldr r0, [r4, #1676]
+ mov r0, r6
+ bl ftl_malloc
+ str r0, [r4, #1784]
+ ldr r0, [r4, #1672]
muls r0, r6, r0
bl ftl_malloc
- str r0, [r4, #1664]
+ str r0, [r4, #1660]
ldr r0, [r4, #1760]
muls r0, r6, r0
bl ftl_malloc
- str r0, [r4, #1784]
- mov r0, r6
- bl ftl_malloc
str r0, [r4, #1788]
mov r0, r6
bl ftl_malloc
str r0, [r4, #1792]
- ldr r0, [r4, #1676]
+ mov r0, r6
+ bl ftl_malloc
+ str r0, [r4, #1796]
+ ldr r0, [r4, #1672]
muls r0, r7, r0
bl ftl_malloc
- ldrh r3, [r5, #2828]
- ldrh r6, [r5, #2910]
+ ldrh r3, [r5, #2840]
+ ldrh r6, [r5, #2922]
muls r6, r3, r6
- str r0, [r4, #1660]
+ str r0, [r4, #1656]
mov r0, r6
bl ftl_malloc
- str r0, [r4, #1796]
+ str r0, [r4, #1800]
lsls r0, r6, #3
bl ftl_malloc
- ldrh r3, [r5, #2910]
- str r0, [r4, #1800]
- ldr r0, [r4, #1676]
+ ldrh r3, [r5, #2922]
+ str r0, [r4, #1804]
+ ldr r0, [r4, #1672]
muls r0, r3, r0
bl ftl_malloc
- ldrh r3, [r5, #2910]
- str r0, [r4, #1668]
+ ldrh r3, [r5, #2922]
+ str r0, [r4, #1664]
ldr r0, [r4, #1760]
muls r0, r3, r0
bl ftl_malloc
- str r0, [r4, #1804]
- ldrh r0, [r5, #2838]
+ str r0, [r4, #1808]
+ ldrh r0, [r5, #2850]
lsls r0, r0, #1
uxth r0, r0
- strh r0, [r4, #1808] @ movhi
+ strh r0, [r4, #1812] @ movhi
bl ftl_malloc
- str r0, [r4, #1812]
- ldrh r0, [r4, #1808]
+ str r0, [r4, #1816]
+ ldrh r0, [r4, #1812]
addw r0, r0, #547
lsrs r0, r0, #9
- strh r0, [r4, #1808] @ movhi
+ strh r0, [r4, #1812] @ movhi
lsls r0, r0, #9
bl ftl_malloc
- ldrh r6, [r5, #2838]
+ ldrh r6, [r5, #2850]
lsls r6, r6, #1
- str r0, [r4, #1816]
+ str r0, [r4, #1820]
adds r0, r0, #32
- str r0, [r4, #748]
+ str r0, [r4, #752]
mov r0, r6
bl ftl_malloc
- str r0, [r4, #1820]
+ str r0, [r4, #1824]
mov r0, r6
bl ftl_malloc
- ldr r6, [r5, #2928]
+ ldr r6, [r5, #2940]
lsls r6, r6, #1
- str r0, [r4, #768]
+ str r0, [r4, #816]
mov r0, r6
bl ftl_malloc
- str r0, [r4, #1824]
+ str r0, [r4, #1828]
mov r0, r6
bl ftl_malloc
- str r0, [r4, #1828]
- ldrh r0, [r5, #2838]
+ str r0, [r4, #1832]
+ ldrh r0, [r5, #2850]
lsrs r0, r0, #3
adds r0, r0, #4
bl ftl_malloc
- str r0, [r4, #944]
- ldrh r0, [r5, #2920]
+ str r0, [r4, #992]
+ ldrh r0, [r5, #2932]
lsls r0, r0, #1
bl ftl_malloc
- str r0, [r5, #2948]
- ldrh r0, [r5, #2920]
+ str r0, [r5, #2956]
+ ldrh r0, [r5, #2932]
lsls r0, r0, #1
bl ftl_malloc
- str r0, [r4, #1832]
- ldrh r0, [r5, #2920]
+ str r0, [r4, #1836]
+ ldrh r0, [r5, #2932]
lsls r0, r0, #2
bl ftl_malloc
- str r0, [r4, #1836]
- ldrh r0, [r5, #2922]
+ str r0, [r4, #1840]
+ ldrh r0, [r5, #2934]
lsls r0, r0, #2
bl ftl_malloc
- ldrh r2, [r5, #2922]
+ ldrh r2, [r5, #2934]
movs r1, #0
lsls r2, r2, #2
- str r0, [r4, #1840]
+ str r0, [r4, #1844]
bl ftl_memset
- ldrh r6, [r5, #2936]
+ ldrh r6, [r5, #2948]
lsls r6, r6, #2
mov r0, r6
bl ftl_malloc
- str r0, [r4, #1844]
+ str r0, [r4, #1848]
mov r0, r6
bl ftl_malloc
- ldr r6, .L1011+8
- str r0, [r4, #1848]
- ldr r0, [r5, #2928]
+ ldr r6, .L1013+8
+ str r0, [r4, #1852]
+ ldr r0, [r5, #2940]
lsls r0, r0, #2
bl ftl_malloc
- str r0, [r4, #1852]
- ldrh r0, [r5, #2938]
+ str r0, [r4, #1856]
+ ldrh r0, [r5, #2950]
muls r0, r7, r0
bl ftl_malloc
- ldrh r3, [r5, #2938]
- str r0, [r4, #932]
- ldrh r0, [r5, #2908]
+ ldrh r3, [r5, #2950]
+ str r0, [r4, #980]
+ ldrh r0, [r5, #2920]
muls r0, r3, r0
bl ftl_malloc
- ldrh r3, [r5, #2838]
- str r0, [r4, #1856]
+ ldrh r3, [r5, #2850]
+ str r0, [r4, #1860]
movs r0, #6
muls r0, r3, r0
bl ftl_malloc
- ldrh r3, [r5, #2894]
+ ldrh r3, [r5, #2906]
adds r3, r3, #31
asrs r3, r3, #5
- strh r3, [r4, #1860] @ movhi
- str r0, [r4, #760]
- ldrh r0, [r5, #2850]
+ strh r3, [r4, #1864] @ movhi
+ str r0, [r4, #808]
+ ldrh r0, [r5, #2862]
muls r0, r3, r0
lsls r0, r0, #2
bl ftl_malloc
- ldrh r2, [r4, #1860]
- ldrh r7, [r5, #2850]
+ ldrh r2, [r4, #1864]
+ ldrh r7, [r5, #2862]
movs r3, #1
lsls r2, r2, #2
mov r1, r2
- str r0, [r5, #2996]
-.L909:
+ str r0, [r5, #3000]
+.L911:
cmp r3, r7
- bcs .L1009
- ldr r0, [r5, #2996]
+ bcs .L1011
+ ldr r0, [r5, #3000]
adds r3, r3, #1
add r0, r0, r1
add r1, r1, r2
str r0, [r6, #4]!
- b .L909
-.L1009:
- ldr r2, .L1011+12
+ b .L911
+.L1011:
+ ldr r2, .L1013+12
movs r1, #0
-.L911:
+.L913:
cmp r3, #8
- beq .L1010
+ beq .L1012
add r0, r2, r3, lsl #2
adds r3, r3, #1
str r1, [r0, #28]
- b .L911
-.L1010:
- ldr r2, [r4, #1824]
- ldr r3, .L1011
- cbnz r2, .L913
-.L915:
- ldr r1, .L1011+16
- ldr r0, .L1011+20
+ b .L913
+.L1012:
+ ldr r2, [r4, #1828]
+ ldr r3, .L1013
+ cbnz r2, .L915
+.L917:
+ ldr r1, .L1013+16
+ ldr r0, .L1013+20
bl printk
mov r0, #-1
pop {r3, r4, r5, r6, r7, r8, r9, pc}
-.L1012:
+.L1014:
.align 2
-.L1011:
+.L1013:
.word .LANCHOR2
.word .LANCHOR0
- .word .LANCHOR0+2996
- .word .LANCHOR0+2968
+ .word .LANCHOR0+3000
+ .word .LANCHOR0+2972
.word .LANCHOR3
- .word .LC79
-.L913:
- ldr r2, [r3, #1828]
+ .word .LC82
+.L915:
+ ldr r2, [r3, #1832]
cmp r2, #0
- beq .L915
- ldr r2, [r3, #1844]
+ beq .L917
+ ldr r2, [r3, #1848]
cmp r2, #0
- beq .L915
- ldr r2, [r3, #1852]
+ beq .L917
+ ldr r2, [r3, #1856]
cmp r2, #0
- beq .L915
- ldr r2, [r3, #932]
+ beq .L917
+ ldr r2, [r3, #980]
cmp r2, #0
- beq .L915
- ldr r2, [r3, #1856]
+ beq .L917
+ ldr r2, [r3, #1860]
cmp r2, #0
- beq .L915
- ldr r2, [r3, #760]
+ beq .L917
+ ldr r2, [r3, #808]
cmp r2, #0
- beq .L915
- ldr r2, [r5, #2996]
+ beq .L917
+ ldr r2, [r5, #3000]
cmp r2, #0
- beq .L915
- ldr r3, [r3, #768]
+ beq .L917
+ ldr r3, [r3, #816]
cmp r3, #0
- beq .L915
- ldr r2, [r4, #1680]
- ldr r3, .L1013
+ beq .L917
+ ldr r2, [r4, #1676]
+ ldr r3, .L1015
cmp r2, #0
- beq .L915
- ldr r2, [r3, #1688]
+ beq .L917
+ ldr r2, [r3, #1684]
cmp r2, #0
- beq .L915
+ beq .L917
ldr r2, [r3, #1764]
cmp r2, #0
- beq .L915
+ beq .L917
ldr r2, [r3, #1772]
cmp r2, #0
- beq .L915
- ldr r2, [r3, #744]
+ beq .L917
+ ldr r2, [r3, #748]
cmp r2, #0
- beq .L915
- ldr r2, [r3, #1672]
+ beq .L917
+ ldr r2, [r3, #1668]
cmp r2, #0
- beq .L915
+ beq .L917
ldr r2, [r3, #1768]
cmp r2, #0
- beq .L915
- ldr r2, [r3, #756]
- cmp r2, #0
- beq .L915
+ beq .L917
ldr r2, [r3, #1776]
cmp r2, #0
- beq .L915
- ldr r3, [r3, #1780]
- cmp r3, #0
- beq .L915
- ldr r2, [r4, #1664]
- ldr r3, .L1013
+ beq .L917
+ ldr r2, [r3, #1780]
cmp r2, #0
- beq .L915
- ldr r2, [r3, #1788]
+ beq .L917
+ ldr r3, [r3, #1784]
+ cmp r3, #0
+ beq .L917
+ ldr r2, [r4, #1660]
+ ldr r3, .L1015
cmp r2, #0
- beq .L915
+ beq .L917
ldr r2, [r3, #1792]
cmp r2, #0
- beq .L915
- ldr r2, [r3, #1660]
- cmp r2, #0
- beq .L915
+ beq .L917
ldr r2, [r3, #1796]
cmp r2, #0
- beq .L915
+ beq .L917
+ ldr r2, [r3, #1656]
+ cmp r2, #0
+ beq .L917
ldr r2, [r3, #1800]
cmp r2, #0
- beq .L915
- ldr r2, [r3, #1668]
+ beq .L917
+ ldr r2, [r3, #1804]
cmp r2, #0
- beq .L915
- ldr r2, [r3, #748]
+ beq .L917
+ ldr r2, [r3, #1664]
+ cmp r2, #0
+ beq .L917
+ ldr r2, [r3, #752]
cmp r2, #0
- beq .L915
- ldr r3, [r3, #1812]
+ beq .L917
+ ldr r3, [r3, #1816]
cmp r3, #0
- beq .L915
- ldr r3, .L1013+4
- ldr r3, [r3, #2948]
+ beq .L917
+ ldr r3, .L1015+4
+ ldr r3, [r3, #2956]
cmp r3, #0
- beq .L915
- ldr r3, .L1013
- ldr r2, [r3, #1832]
- cmp r2, #0
- beq .L915
+ beq .L917
+ ldr r3, .L1015
ldr r2, [r3, #1836]
cmp r2, #0
- beq .L915
- ldr r3, [r3, #1840]
+ beq .L917
+ ldr r2, [r3, #1840]
+ cmp r2, #0
+ beq .L917
+ ldr r3, [r3, #1844]
cmp r3, #0
- beq .L915
+ beq .L917
movs r0, #0
pop {r3, r4, r5, r6, r7, r8, r9, pc}
-.L1014:
+.L1016:
.align 2
-.L1013:
+.L1015:
.word .LANCHOR2
.word .LANCHOR0
.fnend
@@ -6753,21 +6750,21 @@ FtlBbt2Bitmap:
push {r3, r4, r5, r6, r7, lr}
.save {r3, r4, r5, r6, r7, lr}
mov r4, r0
- ldr r3, .L1020
+ ldr r3, .L1022
mov r0, r1
mov r5, r1
movs r1, #0
movs r6, #1
movw r7, #65535
- ldrh r2, [r3, #1860]
+ ldrh r2, [r3, #1864]
lsls r2, r2, #2
bl ftl_memset
subs r2, r4, #2
addw r4, r4, #1022
-.L1017:
+.L1019:
ldrh r3, [r2, #2]!
cmp r3, r7
- beq .L1015
+ beq .L1017
lsrs r1, r3, #5
cmp r2, r4
and r3, r3, #31
@@ -6775,12 +6772,12 @@ FtlBbt2Bitmap:
lsl r3, r6, r3
orr r3, r3, r0
str r3, [r5, r1, lsl #2]
- bne .L1017
-.L1015:
+ bne .L1019
+.L1017:
pop {r3, r4, r5, r6, r7, pc}
-.L1021:
+.L1023:
.align 2
-.L1020:
+.L1022:
.word .LANCHOR2
.fnend
.size FtlBbt2Bitmap, .-FtlBbt2Bitmap
@@ -6806,19 +6803,19 @@ ftl_free_no_use_map_blk:
mov r0, r6
bl ftl_memset
movs r2, #0
-.L1023:
+.L1025:
ldrh r1, [r4, #6]
uxth r3, r2
cmp r1, r3
- bls .L1036
+ bls .L1038
ldr r0, [r5, r3, lsl #2]
movs r1, #0
ubfx r0, r0, #10, #16
-.L1024:
+.L1026:
ldrh r7, [r4, #10]
uxth r3, r1
cmp r7, r3
- bls .L1037
+ bls .L1039
ldrh r7, [r9, r3, lsl #1]
adds r1, r1, #1
cmp r7, r0
@@ -6826,57 +6823,57 @@ ftl_free_no_use_map_blk:
ldrheq r7, [r6, r3, lsl #1]
addeq r7, r7, #1
strheq r7, [r6, r3, lsl #1] @ movhi
- b .L1024
-.L1037:
+ b .L1026
+.L1039:
adds r2, r2, #1
- b .L1023
-.L1036:
+ b .L1025
+.L1038:
movs r7, #0
ldrh fp, [r6]
- ldr r2, .L1039
+ ldr r2, .L1041
mov r10, r7
-.L1028:
+.L1030:
ldrh r3, [r4, #10]
uxth r5, r7
cmp r3, r5
- bls .L1038
+ bls .L1040
ldrh r3, [r4]
cmp r3, r5
- bne .L1029
- ldrh r3, [r2, #2900]
+ bne .L1031
+ ldrh r3, [r2, #2912]
ldrh r1, [r4, #2]
cmp r1, r3
it cc
strhcc r3, [r6, r5, lsl #1] @ movhi
-.L1029:
+.L1031:
ldrh r8, [r6, r5, lsl #1]
cmp fp, r8
itt hi
movhi r10, r5
movhi fp, r8
cmp r8, #0
- bne .L1031
+ bne .L1033
ldrh r0, [r9, r5, lsl #1]
- cbz r0, .L1031
+ cbz r0, .L1033
movs r1, #1
str r2, [sp, #4]
bl FtlFreeSysBlkQueueIn
+ ldr r2, [sp, #4]
strh r8, [r9, r5, lsl #1] @ movhi
ldrh r3, [r4, #8]
subs r3, r3, #1
strh r3, [r4, #8] @ movhi
- ldr r2, [sp, #4]
-.L1031:
+.L1033:
adds r7, r7, #1
- b .L1028
-.L1038:
+ b .L1030
+.L1040:
mov r0, r10
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1040:
+.L1042:
.align 2
-.L1039:
+.L1041:
.word .LANCHOR0
.fnend
.size ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk
@@ -6892,72 +6889,72 @@ FtlL2PDataInit:
push {r3, r4, r5, r6, r7, r8, r9, lr}
.save {r3, r4, r5, r6, r7, r8, r9, lr}
movs r1, #0
- ldr r4, .L1045
+ ldr r4, .L1047
movs r7, #0
- ldr r5, .L1045+4
+ ldr r5, .L1047+4
mov r6, r7
- ldr r2, [r4, #2928]
+ ldr r2, [r4, #2940]
mov r9, r4
- ldr r0, [r5, #1828]
+ ldr r0, [r5, #1832]
lsls r2, r2, #1
bl ftl_memset
- ldrh r3, [r4, #2908]
- ldrh r2, [r4, #2938]
+ ldrh r3, [r4, #2920]
+ ldrh r2, [r4, #2950]
movs r1, #255
- ldr r0, [r5, #1856]
+ ldr r0, [r5, #1860]
muls r2, r3, r2
bl ftl_memset
mov r3, r5
movs r5, #12
mov r2, r4
movw lr, #65535
-.L1042:
- ldrh ip, [r2, #2938]
+.L1044:
+ ldrh ip, [r2, #2950]
adds r0, r7, #1
uxth r7, r7
- ldr r1, .L1045
+ ldr r1, .L1047
cmp ip, r7
- bls .L1044
+ bls .L1046
mul r1, r5, r7
- ldr ip, [r3, #932]
+ ldr ip, [r3, #980]
add r8, ip, r1
str r6, [r8, #4]
strh lr, [ip, r1] @ movhi
- ldr r4, [r3, #932]
+ ldr r4, [r3, #980]
add ip, r4, r1
- ldrh r1, [r9, #2908]
+ ldrh r1, [r9, #2920]
muls r1, r7, r1
- ldr r7, [r3, #1856]
+ ldr r7, [r3, #1860]
bic r1, r1, #3
add r1, r1, r7
mov r7, r0
str r1, [ip, #8]
- b .L1042
-.L1044:
- ldr r0, [r1, #2928]
+ b .L1044
+.L1046:
+ ldr r0, [r1, #2940]
movw r2, #65535
- ldrh r1, [r1, #2936]
- strh r2, [r3, #1866] @ movhi
- strh r0, [r3, #1874] @ movhi
+ ldrh r1, [r1, #2948]
+ strh r2, [r3, #1870] @ movhi
+ strh r0, [r3, #1878] @ movhi
movw r0, #61634
- strh r1, [r3, #1870] @ movhi
- ldr r1, [r3, #1824]
- strh r0, [r3, #1868] @ movhi
- ldrh r0, [r3, #1908]
- str r1, [r3, #1876]
- ldr r1, [r3, #1852]
- strh r2, [r3, #1864] @ movhi
+ strh r1, [r3, #1874] @ movhi
+ ldr r1, [r3, #1828]
strh r0, [r3, #1872] @ movhi
+ ldrh r0, [r3, #1912]
str r1, [r3, #1880]
- ldr r1, [r3, #1828]
- strh r2, [r3, #1904] @ movhi
+ ldr r1, [r3, #1856]
+ strh r2, [r3, #1868] @ movhi
+ strh r0, [r3, #1876] @ movhi
str r1, [r3, #1884]
- ldr r1, [r3, #1844]
+ ldr r1, [r3, #1832]
+ strh r2, [r3, #1908] @ movhi
str r1, [r3, #1888]
+ ldr r1, [r3, #1848]
+ str r1, [r3, #1892]
pop {r3, r4, r5, r6, r7, r8, r9, pc}
-.L1046:
+.L1048:
.align 2
-.L1045:
+.L1047:
.word .LANCHOR0
.word .LANCHOR2
.fnend
@@ -6973,46 +6970,46 @@ FtlVariablesInit:
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
.save {r4, r5, r6, lr}
- movs r5, #0
- ldr r6, .L1048
+ movs r4, #0
+ ldr r6, .L1050
movw r3, #65535
- ldr r4, .L1048+4
- mov r1, r5
- ldrh r2, [r6, #2920]
- ldr r0, [r6, #2948]
- strh r3, [r4, #1916] @ movhi
+ ldr r5, .L1050+4
+ mov r1, r4
+ ldrh r2, [r6, #2932]
+ ldr r0, [r6, #2956]
+ strh r3, [r5, #1920] @ movhi
mov r3, #-1
lsls r2, r2, #1
- str r3, [r4, #1928]
- str r5, [r4, #1912]
- str r5, [r4, #1920]
- str r5, [r4, #1924]
- str r5, [r4, #948]
- strh r5, [r6, #2946] @ movhi
+ str r3, [r5, #1932]
+ str r4, [r5, #1916]
+ str r4, [r5, #1924]
+ str r4, [r5, #1928]
+ str r4, [r6, #2832]
+ strh r4, [r6, #2954] @ movhi
bl ftl_memset
- ldrh r2, [r6, #2838]
- mov r1, r5
- ldr r0, [r4, #748]
+ ldrh r2, [r6, #2850]
+ mov r1, r4
+ ldr r0, [r5, #752]
lsls r2, r2, #1
bl ftl_memset
- ldrh r2, [r6, #2838]
- mov r1, r5
- ldr r0, [r4, #1812]
+ ldrh r2, [r6, #2850]
+ mov r1, r4
+ ldr r0, [r5, #1816]
lsls r2, r2, #1
bl ftl_memset
- add r0, r4, #1012
+ add r0, r5, #760
movs r1, #48
bl __memzero
- add r0, r4, #1128
+ addw r0, r5, #1124
mov r1, #512
bl __memzero
bl FtlGcBufInit
bl FtlL2PDataInit
- mov r0, r5
+ mov r0, r4
pop {r4, r5, r6, pc}
-.L1049:
+.L1051:
.align 2
-.L1048:
+.L1050:
.word .LANCHOR0
.word .LANCHOR2
.fnend
@@ -7029,110 +7026,110 @@ SupperBlkListInit:
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
movs r2, #6
- ldr r6, .L1061
+ ldr r6, .L1063
movs r5, #0
- ldr r4, .L1061+4
+ ldr r4, .L1063+4
.pad #20
sub sp, sp, #20
movs r1, #0
mov r9, r5
- ldrh r3, [r6, #2838]
+ ldrh r3, [r6, #2850]
mov r10, r5
- ldr r0, [r4, #760]
+ ldr r0, [r4, #808]
mov r8, r6
muls r2, r3, r2
bl ftl_memset
- str r5, [r4, #780]
- str r5, [r4, #764]
- str r5, [r4, #772]
- strh r5, [r4, #776] @ movhi
- strh r5, [r4, #784] @ movhi
- strh r5, [r4, #1736] @ movhi
-.L1051:
+ str r5, [r4, #828]
+ str r5, [r4, #812]
+ str r5, [r4, #820]
+ strh r5, [r4, #824] @ movhi
+ strh r5, [r4, #832] @ movhi
+ strh r5, [r4, #1732] @ movhi
+.L1053:
uxth fp, r5
- ldrh r2, [r8, #2836]
+ ldrh r2, [r8, #2848]
sxth r7, fp
cmp r7, r2
- bge .L1058
- ldr r3, .L1061
+ bge .L1060
+ ldr r3, .L1063
movs r2, #0
mov r6, r2
- ldrh ip, [r3, #2828]
- ldrh r3, [r3, #2898]
+ ldrh ip, [r3, #2840]
+ ldrh r3, [r3, #2910]
str r3, [sp, #4]
-.L1059:
+.L1061:
sxth r1, r2
cmp r1, ip
- bge .L1060
+ bge .L1062
add r1, r1, r8
str r2, [sp, #12]
str ip, [sp, #8]
- ldrb r0, [r1, #2856] @ zero_extendqisi2
+ ldrb r0, [r1, #2868] @ zero_extendqisi2
mov r1, fp
bl V2P_block
bl FtlBbmIsBadBlock
ldr ip, [sp, #8]
ldr r2, [sp, #12]
- cbnz r0, .L1052
+ cbnz r0, .L1054
ldr r3, [sp, #4]
add r6, r6, r3
uxth r6, r6
-.L1052:
+.L1054:
adds r2, r2, #1
- b .L1059
-.L1060:
- cbz r6, .L1054
+ b .L1061
+.L1062:
+ cbz r6, .L1056
sxth r1, r6
mov r0, #32768
bl __aeabi_idiv
uxth r6, r0
- b .L1055
-.L1054:
- ldr r1, [r4, #768]
+ b .L1057
+.L1056:
+ ldr r1, [r4, #816]
sxth r2, fp
movw r0, #65535
strh r0, [r1, r2, lsl #1] @ movhi
-.L1055:
+.L1057:
add r0, r7, r7, lsl #1
- ldr r1, [r4, #760]
- ldr r2, .L1061+4
+ ldr r1, [r4, #808]
+ ldr r2, .L1063+4
add r1, r1, r0, lsl #1
strh r6, [r1, #4] @ movhi
- ldrh r1, [r4, #788]
+ ldrh r1, [r4, #836]
cmp r7, r1
- beq .L1056
- ldrh r1, [r2, #836]
- cmp r7, r1
- beq .L1056
+ beq .L1058
ldrh r1, [r2, #884]
cmp r7, r1
- beq .L1056
- ldr r2, [r2, #768]
+ beq .L1058
+ ldrh r1, [r2, #932]
+ cmp r7, r1
+ beq .L1058
+ ldr r2, [r2, #816]
ldrh r2, [r2, r7, lsl #1]
- cbnz r2, .L1057
+ cbnz r2, .L1059
add r9, r9, #1
mov r0, fp
uxth r9, r9
bl INSERT_FREE_LIST
- b .L1056
-.L1057:
+ b .L1058
+.L1059:
add r10, r10, #1
mov r0, fp
uxth r10, r10
bl INSERT_DATA_LIST
-.L1056:
- adds r5, r5, #1
- b .L1051
.L1058:
+ adds r5, r5, #1
+ b .L1053
+.L1060:
movs r0, #0
- strh r10, [r4, #776] @ movhi
- strh r9, [r4, #784] @ movhi
+ strh r10, [r4, #824] @ movhi
+ strh r9, [r4, #832] @ movhi
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1062:
+.L1064:
.align 2
-.L1061:
+.L1063:
.word .LANCHOR0
.word .LANCHOR2
.fnend
@@ -7149,26 +7146,26 @@ FtlGcPageVarInit:
push {r3, r4, r5, lr}
.save {r3, r4, r5, lr}
movs r1, #255
- ldr r5, .L1064
+ ldr r5, .L1066
movs r3, #0
- ldr r4, .L1064+4
- ldrh r2, [r5, #2902]
- ldr r0, [r4, #1680]
- strh r3, [r4, #1684] @ movhi
+ ldr r4, .L1066+4
+ ldrh r2, [r5, #2914]
+ ldr r0, [r4, #1676]
+ strh r3, [r4, #1680] @ movhi
lsls r2, r2, #1
- strh r3, [r4, #1692] @ movhi
+ strh r3, [r4, #1688] @ movhi
bl ftl_memset
- ldrh r3, [r5, #2902]
+ ldrh r3, [r5, #2914]
movs r2, #12
- ldr r0, [r4, #1688]
+ ldr r0, [r4, #1684]
movs r1, #255
muls r2, r3, r2
bl ftl_memset
pop {r3, r4, r5, lr}
b FtlGcBufInit
-.L1065:
+.L1067:
.align 2
-.L1064:
+.L1066:
.word .LANCHOR0
.word .LANCHOR2
.fnend
@@ -7198,14 +7195,14 @@ FlashReadIdbData:
push {r3, lr}
.save {r3, lr}
mov r2, #2048
- ldr r1, .L1068
+ ldr r1, .L1070
bl ftl_memcpy
movs r0, #0
pop {r3, pc}
-.L1069:
+.L1071:
.align 2
-.L1068:
- .word .LANCHOR2+1932
+.L1070:
+ .word .LANCHOR2+1936
.fnend
.size FlashReadIdbData, .-FlashReadIdbData
.align 1
@@ -7220,62 +7217,62 @@ FlashLoadPhyInfoInRam:
push {r4, r5, r6, lr}
.save {r4, r5, r6, lr}
movs r4, #0
- ldr r6, .L1082
-.L1074:
+ ldr r6, .L1084
+.L1076:
mov r0, r6
- ldr r1, .L1082+4
+ ldr r1, .L1084+4
ldrb r2, [r6, #-1] @ zero_extendqisi2
bl FlashMemCmp8
mov r5, r0
- cbnz r0, .L1071
- ldr r3, .L1082+8
+ cbnz r0, .L1073
+ ldr r3, .L1084+8
lsls r4, r4, #5
add r2, r3, #508
adds r6, r2, r4
- beq .L1077
+ beq .L1079
add r4, r4, r3
- addw r3, r3, #2812
+ addw r3, r3, #2876
ldrb r2, [r4, #530] @ zero_extendqisi2
mov r4, r0
- b .L1076
-.L1071:
+ b .L1078
+.L1073:
adds r4, r4, #1
adds r6, r6, #32
- cmp r4, #72
- bne .L1074
- b .L1077
-.L1081:
+ cmp r4, #74
+ bne .L1076
+ b .L1079
+.L1083:
adds r4, r4, #1
cmp r4, #4
- beq .L1075
-.L1076:
+ beq .L1077
+.L1078:
lsls r1, r4, #5
ldrb r1, [r1, r3] @ zero_extendqisi2
cmp r1, r2
- bne .L1081
-.L1075:
- ldr r1, .L1082+12
+ bne .L1083
+.L1077:
+ ldr r1, .L1084+12
movs r2, #32
- ldr r0, .L1082+16
+ ldr r0, .L1084+16
add r1, r1, r4, lsl #5
bl ftl_memcpy
mov r1, r6
movs r2, #32
- ldr r0, .L1082+20
+ ldr r0, .L1084+20
bl ftl_memcpy
- b .L1072
-.L1077:
+ b .L1074
+.L1079:
mov r5, #-1
-.L1072:
+.L1074:
mov r0, r5
pop {r4, r5, r6, pc}
-.L1083:
+.L1085:
.align 2
-.L1082:
+.L1084:
.word .LANCHOR1+509
.word .LANCHOR0+1792
.word .LANCHOR1
- .word .LANCHOR1+2812
+ .word .LANCHOR1+2876
.word .LANCHOR0+44
.word .LANCHOR1+256
.fnend
@@ -7297,14 +7294,14 @@ NandcCopy1KB:
ldr r6, [sp, #16]
add r5, r0, #512
add r2, r2, r4, lsl #9
- bne .L1085
- cbz r3, .L1086
+ bne .L1087
+ cbz r3, .L1088
mov r0, r2
mov r1, r3
mov r2, #1024
bl ftl_memcpy
-.L1086:
- cbz r6, .L1084
+.L1088:
+ cbz r6, .L1086
ldrb r3, [r6, #2] @ zero_extendqisi2
lsrs r4, r4, #1
ldrb r2, [r6, #1] @ zero_extendqisi2
@@ -7318,14 +7315,14 @@ NandcCopy1KB:
orr r3, r3, r2, lsl #24
str r3, [r5, r4, lsl #2]
pop {r4, r5, r6, pc}
-.L1085:
- cbz r3, .L1089
+.L1087:
+ cbz r3, .L1091
mov r1, r2
mov r0, r3
mov r2, #1024
bl ftl_memcpy
-.L1089:
- cbz r6, .L1084
+.L1091:
+ cbz r6, .L1086
lsrs r4, r4, #1
add r4, r4, r4, lsl #1
lsls r4, r4, #2
@@ -7337,11 +7334,34 @@ NandcCopy1KB:
lsrs r3, r3, #24
strb r2, [r6, #2]
strb r3, [r6, #3]
-.L1084:
+.L1086:
pop {r4, r5, r6, pc}
.fnend
.size NandcCopy1KB, .-NandcCopy1KB
.align 1
+ .global ftl_memcpy32
+ .thumb
+ .thumb_func
+ .type ftl_memcpy32, %function
+ftl_memcpy32:
+ .fnstart
+ @ args = 0, pretend = 0, frame = 0
+ @ frame_needed = 0, uses_anonymous_args = 0
+ movs r3, #0
+ push {r4, lr}
+ .save {r4, lr}
+.L1103:
+ cmp r3, r2
+ beq .L1105
+ ldr r4, [r1, r3, lsl #2]
+ str r4, [r0, r3, lsl #2]
+ adds r3, r3, #1
+ b .L1103
+.L1105:
+ pop {r4, pc}
+ .fnend
+ .size ftl_memcpy32, .-ftl_memcpy32
+ .align 1
.global ftl_memcmp
.thumb
.thumb_func
@@ -7355,6 +7375,56 @@ ftl_memcmp:
.fnend
.size ftl_memcmp, .-ftl_memcmp
.align 1
+ .global js_hash
+ .thumb
+ .thumb_func
+ .type js_hash, %function
+js_hash:
+ .fnstart
+ @ args = 0, pretend = 0, frame = 0
+ @ frame_needed = 0, uses_anonymous_args = 0
+ ldr r3, .L1111
+ add r1, r1, r0
+ push {r4, lr}
+ .save {r4, lr}
+.L1108:
+ cmp r0, r1
+ beq .L1110
+ lsls r2, r3, #5
+ ldrb r4, [r0], #1 @ zero_extendqisi2
+ add r2, r2, r3, lsr #2
+ add r2, r2, r4
+ eors r3, r3, r2
+ b .L1108
+.L1110:
+ mov r0, r3
+ pop {r4, pc}
+.L1112:
+ .align 2
+.L1111:
+ .word 1204201446
+ .fnend
+ .size js_hash, .-js_hash
+ .align 1
+ .global timer_get_time
+ .thumb
+ .thumb_func
+ .type timer_get_time, %function
+timer_get_time:
+ .fnstart
+ @ args = 0, pretend = 0, frame = 0
+ @ frame_needed = 0, uses_anonymous_args = 0
+ @ link register save eliminated.
+ ldr r3, .L1114
+ ldr r0, [r3]
+ b jiffies_to_msecs
+.L1115:
+ .align 2
+.L1114:
+ .word jiffies
+ .fnend
+ .size timer_get_time, .-timer_get_time
+ .align 1
.global FlashSramLoadStore
.thumb
.thumb_func
@@ -7366,20 +7436,20 @@ FlashSramLoadStore:
push {r4, r5, lr}
.save {r4, r5, lr}
mov r5, r0
- ldr r4, .L1104
- ldr r4, [r4, #3980]
+ ldr r4, .L1119
+ ldr r4, [r4, #3984]
add r4, r4, #4096
add r1, r1, r4
- cbz r2, .L1103
+ cbz r2, .L1118
mov r0, r1
mov r1, r5
-.L1103:
+.L1118:
mov r2, r3
pop {r4, r5, lr}
b ftl_memcpy
-.L1105:
+.L1120:
.align 2
-.L1104:
+.L1119:
.word .LANCHOR2
.fnend
.size FlashSramLoadStore, .-FlashSramLoadStore
@@ -7397,19 +7467,6 @@ FlashCs123Init:
.fnend
.size FlashCs123Init, .-FlashCs123Init
.align 1
- .global rk_nand_de_init
- .thumb
- .thumb_func
- .type rk_nand_de_init, %function
-rk_nand_de_init:
- .fnstart
- @ args = 0, pretend = 0, frame = 0
- @ frame_needed = 0, uses_anonymous_args = 0
- @ link register save eliminated.
- b FlashDeInit
- .fnend
- .size rk_nand_de_init, .-rk_nand_de_init
- .align 1
.global rk_nand_suspend
.thumb
.thumb_func
@@ -7419,7 +7476,7 @@ rk_nand_suspend:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- b FlashSuspend
+ b ftl_flash_suspend
.fnend
.size rk_nand_suspend, .-rk_nand_suspend
.align 1
@@ -7432,7 +7489,7 @@ rk_nand_resume:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- b FlashResume
+ b ftl_flash_resume
.fnend
.size rk_nand_resume, .-rk_nand_resume
.align 1
@@ -7445,16 +7502,56 @@ rk_ftl_get_capacity:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L1111
- ldr r0, [r3, #2940]
+ ldr r3, .L1125
+ ldr r0, [r3, #1896]
bx lr
-.L1112:
+.L1126:
.align 2
-.L1111:
+.L1125:
.word .LANCHOR0
.fnend
.size rk_ftl_get_capacity, .-rk_ftl_get_capacity
.align 1
+ .global rk_nandc_get_irq_status
+ .thumb
+ .thumb_func
+ .type rk_nandc_get_irq_status, %function
+rk_nandc_get_irq_status:
+ .fnstart
+ @ args = 0, pretend = 0, frame = 0
+ @ frame_needed = 0, uses_anonymous_args = 0
+ @ link register save eliminated.
+ ldr r0, [r0, #372]
+ bx lr
+ .fnend
+ .size rk_nandc_get_irq_status, .-rk_nandc_get_irq_status
+ .align 1
+ .global rknand_proc_ftlread
+ .thumb
+ .thumb_func
+ .type rknand_proc_ftlread, %function
+rknand_proc_ftlread:
+ .fnstart
+ @ args = 0, pretend = 0, frame = 0
+ @ frame_needed = 0, uses_anonymous_args = 0
+ @ link register save eliminated.
+ b ftl_proc_ftl_read
+ .fnend
+ .size rknand_proc_ftlread, .-rknand_proc_ftlread
+ .align 1
+ .global ReadFlashInfo
+ .thumb
+ .thumb_func
+ .type ReadFlashInfo, %function
+ReadFlashInfo:
+ .fnstart
+ @ args = 0, pretend = 0, frame = 0
+ @ frame_needed = 0, uses_anonymous_args = 0
+ @ link register save eliminated.
+ b ftl_read_flash_info
+ .fnend
+ .size ReadFlashInfo, .-ReadFlashInfo
+ .align 1
.global rknand_print_hex
.thumb
.thumb_func
@@ -7471,49 +7568,50 @@ rknand_print_hex:
mov r7, r2
mov r8, r3
mov r4, r5
-.L1114:
+.L1131:
cmp r4, r8
- beq .L1122
- cbnz r5, .L1115
- ldr r0, .L1123
+ beq .L1139
+ cbnz r5, .L1132
+ ldr r0, .L1140
mov r1, r9
- mov r2, r4
+ mov r2, r6
+ mov r3, r4
bl printk
-.L1115:
+.L1132:
cmp r7, #4
- ldr r0, .L1123+4
- bne .L1116
+ ldr r0, .L1140+4
+ bne .L1133
ldr r1, [r6, r4, lsl #2]
- b .L1121
-.L1116:
+ b .L1138
+.L1133:
cmp r7, #2
ite eq
ldrsheq r1, [r6, r4, lsl #1]
ldrbne r1, [r6, r4] @ zero_extendqisi2
-.L1121:
+.L1138:
adds r5, r5, #1
bl printk
cmp r5, #15
- bls .L1119
- ldr r0, .L1123+8
+ bls .L1136
+ ldr r0, .L1140+8
movs r5, #0
- ldr r1, .L1123+12
+ ldr r1, .L1140+12
bl printk
-.L1119:
+.L1136:
adds r4, r4, #1
- b .L1114
-.L1122:
- ldr r0, .L1123+8
- ldr r1, .L1123+12
+ b .L1131
+.L1139:
+ ldr r0, .L1140+8
+ ldr r1, .L1140+12
pop {r3, r4, r5, r6, r7, r8, r9, lr}
b printk
-.L1124:
+.L1141:
.align 2
-.L1123:
- .word .LC80
- .word .LC81
- .word .LC74
- .word .LC82
+.L1140:
+ .word .LC83
+ .word .LC84
+ .word .LC77
+ .word .LC85
.fnend
.size rknand_print_hex, .-rknand_print_hex
.align 1
@@ -7528,146 +7626,146 @@ HynixGetReadRetryDefault:
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
cmp r0, #2
- ldr r5, .L1217
+ ldr r5, .L1234
mov r3, #172
mov r1, #173
mov r2, #174
.pad #44
sub sp, sp, #44
mov r4, r0
- strb r3, [r5, #1906]
+ strb r3, [r5, #1910]
mov r3, #175
- strb r0, [r5, #1902]
- strb r1, [r5, #1907]
- strb r2, [r5, #1908]
- strb r3, [r5, #1909]
- bne .L1126
+ strb r0, [r5, #1906]
+ strb r1, [r5, #1911]
+ strb r2, [r5, #1912]
+ strb r3, [r5, #1913]
+ bne .L1143
movs r3, #167
- strb r3, [r5, #1906]
- ldr r3, .L1217+4
+ strb r3, [r5, #1910]
+ ldr r3, .L1234+4
movs r2, #247
- strb r2, [r3, #2957]
- b .L1179
-.L1126:
+ strb r2, [r3, #3021]
+ b .L1196
+.L1143:
cmp r0, #3
- bne .L1128
+ bne .L1145
movs r3, #176
- strb r3, [r5, #1906]
+ strb r3, [r5, #1910]
movs r3, #177
- strb r3, [r5, #1907]
+ strb r3, [r5, #1911]
movs r3, #178
- strb r3, [r5, #1908]
+ strb r3, [r5, #1912]
movs r3, #179
- strb r3, [r5, #1909]
+ strb r3, [r5, #1913]
movs r3, #180
- strb r3, [r5, #1910]
+ strb r3, [r5, #1914]
movs r3, #181
- strb r3, [r5, #1911]
+ strb r3, [r5, #1915]
movs r3, #182
- strb r3, [r5, #1912]
+ strb r3, [r5, #1916]
movs r3, #183
- b .L1212
-.L1128:
+ b .L1229
+.L1145:
cmp r0, #4
- bne .L1129
+ bne .L1146
movs r0, #204
- strb r1, [r5, #1911]
- strb r0, [r5, #1906]
+ strb r1, [r5, #1915]
+ strb r0, [r5, #1910]
movs r0, #191
- strb r2, [r5, #1912]
- strb r0, [r5, #1907]
+ strb r2, [r5, #1916]
+ strb r0, [r5, #1911]
movs r0, #170
- strb r0, [r5, #1908]
+ strb r0, [r5, #1912]
movs r0, #171
- strb r0, [r5, #1909]
+ strb r0, [r5, #1913]
movs r0, #205
- strb r0, [r5, #1910]
-.L1212:
+ strb r0, [r5, #1914]
+.L1229:
mov fp, #8
- strb r3, [r5, #1913]
+ strb r3, [r5, #1917]
mov r9, fp
- b .L1127
-.L1129:
+ b .L1144
+.L1146:
cmp r0, #5
- bne .L1130
+ bne .L1147
movs r3, #56
mov fp, #8
- strb r3, [r5, #1906]
+ strb r3, [r5, #1910]
movs r3, #57
- strb r3, [r5, #1907]
+ strb r3, [r5, #1911]
movs r3, #58
- strb r3, [r5, #1908]
+ strb r3, [r5, #1912]
movs r3, #59
- strb r3, [r5, #1909]
- b .L1211
-.L1130:
+ strb r3, [r5, #1913]
+ b .L1228
+.L1147:
cmp r0, #6
- bne .L1131
+ bne .L1148
movs r3, #14
mov fp, #12
- strb r3, [r5, #1906]
+ strb r3, [r5, #1910]
movs r3, #15
- strb r3, [r5, #1907]
+ strb r3, [r5, #1911]
movs r3, #16
- strb r3, [r5, #1908]
+ strb r3, [r5, #1912]
movs r3, #17
- strb r3, [r5, #1909]
- b .L1211
-.L1131:
+ strb r3, [r5, #1913]
+ b .L1228
+.L1148:
cmp r0, #7
- bne .L1179
+ bne .L1196
movs r3, #176
mov fp, #12
- strb r3, [r5, #1906]
+ strb r3, [r5, #1910]
mov r9, #10
movs r3, #177
- strb r3, [r5, #1907]
+ strb r3, [r5, #1911]
movs r3, #178
- strb r3, [r5, #1908]
+ strb r3, [r5, #1912]
movs r3, #179
- strb r3, [r5, #1909]
+ strb r3, [r5, #1913]
movs r3, #180
- strb r3, [r5, #1910]
+ strb r3, [r5, #1914]
movs r3, #181
- strb r3, [r5, #1911]
+ strb r3, [r5, #1915]
movs r3, #182
- strb r3, [r5, #1912]
+ strb r3, [r5, #1916]
movs r3, #183
- strb r3, [r5, #1913]
+ strb r3, [r5, #1917]
movs r3, #212
- strb r3, [r5, #1914]
+ strb r3, [r5, #1918]
movs r3, #213
- strb r3, [r5, #1915]
- b .L1127
-.L1179:
+ strb r3, [r5, #1919]
+ b .L1144
+.L1196:
mov fp, #7
-.L1211:
+.L1228:
mov r9, #4
-.L1127:
+.L1144:
subs r3, r4, #1
cmp r3, #1
- bhi .L1208
- ldr r7, .L1217+8
+ bhi .L1225
+ ldr r7, .L1234+8
mov r8, #0
-.L1132:
+.L1149:
ldrb r3, [r5, #1616] @ zero_extendqisi2
uxtb r6, r8
- ldr r2, .L1217
+ ldr r2, .L1234
cmp r3, r6
- bls .L1139
+ bls .L1156
add r6, r6, r2
ldrb r3, [r6, #1620] @ zero_extendqisi2
add r4, r2, r3, lsl #6
add r3, r2, r3, lsl #3
- addw r4, r4, #1922
- addw r2, r2, #1905
+ addw r4, r4, #1926
+ addw r2, r2, #1909
ldrb r6, [r3, #16] @ zero_extendqisi2
ldr r1, [r3, #12]
mov r10, r4
mov r3, r4
add r6, r1, r6, lsl #8
addw ip, r6, #2056
-.L1134:
+.L1151:
str r3, [sp, #8]
movs r3, #55
str r3, [ip]
@@ -7685,23 +7783,23 @@ HynixGetReadRetryDefault:
subs r1, r3, r4
uxtb r1, r1
cmp r1, r9
- bcc .L1134
+ bcc .L1151
movs r2, #0
-.L1135:
+.L1152:
movs r3, #1
adds r0, r7, r2
-.L1136:
+.L1153:
ldrb r6, [r0, r3, lsl #2] @ zero_extendqisi2
ldrb r1, [r10] @ zero_extendqisi2
add r1, r1, r6
strb r1, [r10, r3, lsl #3]
adds r3, r3, #1
cmp r3, #7
- bne .L1136
+ bne .L1153
adds r2, r2, #1
add r10, r10, #1
cmp r2, #4
- bne .L1135
+ bne .L1152
movs r3, #0
add r8, r8, #1
strb r3, [r4, #16]
@@ -7711,40 +7809,40 @@ HynixGetReadRetryDefault:
strb r3, [r4, #48]
strb r3, [r4, #41]
strb r3, [r4, #49]
- b .L1132
-.L1208:
+ b .L1149
+.L1225:
subs r3, r4, #3
cmp r3, #4
- bhi .L1139
+ bhi .L1156
smulbb r2, r9, fp
lsls r3, r2, #4
str r3, [sp, #32]
and r3, r2, #252
str r3, [sp]
movs r3, #0
-.L1215:
+.L1232:
str r3, [sp, #12]
ldrb r3, [sp, #12] @ zero_extendqisi2
str r3, [sp, #8]
- ldr r3, .L1217
+ ldr r3, .L1234
ldr r2, [sp, #8]
ldrb r3, [r3, #1616] @ zero_extendqisi2
cmp r3, r2
- bhi .L1178
-.L1139:
- ldr r3, .L1217
- strb r9, [r3, #1903]
- strb fp, [r3, #1904]
+ bhi .L1195
+.L1156:
+ ldr r3, .L1234
+ strb r9, [r3, #1907]
+ strb fp, [r3, #1908]
add sp, sp, #44
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1178:
+.L1195:
ldr r2, [sp, #8]
- ldr r3, .L1217
+ ldr r3, .L1234
add r3, r3, r2
movs r2, #255
ldrb r8, [r3, #1620] @ zero_extendqisi2
- ldr r3, .L1217
+ ldr r3, .L1234
add r3, r3, r8, lsl #3
mov r0, r8
ldr r10, [r3, #12]
@@ -7759,8 +7857,8 @@ HynixGetReadRetryDefault:
moveq lr, #160
mov r2, #54
itete eq
- ldreq r3, .L1217+12
- ldrne r3, .L1217+12
+ ldreq r3, .L1234+12
+ ldrne r3, .L1234+12
mlaeq lr, lr, r8, r3
addne lr, r3, r8, lsl #6
ite ne
@@ -7771,36 +7869,36 @@ HynixGetReadRetryDefault:
cmp r4, #4
add r3, r10, r3, lsl #8
str r2, [r3, #2056]
- bne .L1143
+ bne .L1160
add r6, r6, r10
movs r3, #255
str r3, [r6, #2052]
movs r3, #64
str r3, [r6, #2048]
movs r3, #204
- b .L1214
-.L1143:
+ b .L1231
+.L1160:
subs r2, r4, #5
cmp r2, #1
- bhi .L1145
- ldr r2, .L1217
- ldrb r2, [r2, #1906] @ zero_extendqisi2
+ bhi .L1162
+ ldr r2, .L1234
+ ldrb r2, [r2, #1910] @ zero_extendqisi2
str r2, [r3, #2052]
movs r2, #82
str r2, [r3, #2048]
- b .L1144
-.L1145:
+ b .L1161
+.L1162:
add r6, r6, r10
movs r3, #174
str r3, [r6, #2052]
movs r3, #0
str r3, [r6, #2048]
movs r3, #176
-.L1214:
+.L1231:
str r3, [r6, #2052]
movs r3, #77
str r3, [r6, #2048]
-.L1144:
+.L1161:
ldr r3, [sp, #4]
cmp r4, #6
mov r2, #48
@@ -7832,123 +7930,123 @@ HynixGetReadRetryDefault:
subs r3, r4, #5
cmp r3, #1
str r3, [sp, #20]
- bls .L1181
+ bls .L1198
cmp r4, #7
ite eq
moveq r0, #32
movne r0, #2
- b .L1149
-.L1218:
+ b .L1166
+.L1235:
.align 2
-.L1217:
+.L1234:
.word .LANCHOR0
.word .LANCHOR1
- .word .LANCHOR1+2940
- .word .LANCHOR0+1902
-.L1181:
+ .word .LANCHOR1+3004
+ .word .LANCHOR0+1906
+.L1198:
movs r0, #16
-.L1149:
- ldr r3, .L1219
- ldr r3, [r3, #3984]
+.L1166:
+ ldr r3, .L1236
+ ldr r3, [r3, #3988]
mov r1, r3
-.L1150:
+.L1167:
ldr r2, [r5, #2048]
strb r2, [r1], #1
subs r2, r1, r3
uxtb r2, r2
cmp r2, r0
- bcc .L1150
+ bcc .L1167
cmp r4, #7
- bne .L1151
+ bne .L1168
movs r2, #0
-.L1153:
+.L1170:
ldrb r0, [r3, r2, lsl #2] @ zero_extendqisi2
uxtb r1, r2
cmp r0, #12
- beq .L1152
+ beq .L1169
add r0, r3, r2, lsl #2
ldrb r0, [r0, #1] @ zero_extendqisi2
cmp r0, #10
- beq .L1152
+ beq .L1169
adds r2, r2, #1
cmp r2, #8
- bne .L1153
- b .L1154
-.L1152:
+ bne .L1170
+ b .L1171
+.L1169:
cmp r1, #7
- bne .L1155
-.L1154:
- ldr r0, .L1219+4
+ bne .L1172
+.L1171:
+ ldr r0, .L1236+4
movs r1, #0
bl printk
-.L1156:
- b .L1156
-.L1151:
+.L1173:
+ b .L1173
+.L1168:
cmp r4, #6
- bne .L1155
+ bne .L1172
subs r2, r3, #1
adds r3, r3, #7
-.L1157:
+.L1174:
ldrb r1, [r2, #1]! @ zero_extendqisi2
cmp r1, #12
- beq .L1155
+ beq .L1172
ldrb r1, [r2, #8] @ zero_extendqisi2
cmp r1, #4
- beq .L1155
+ beq .L1172
cmp r2, r3
- bne .L1157
- ldr r0, .L1219+4
+ bne .L1174
+ ldr r0, .L1236+4
movs r1, #0
bl printk
-.L1159:
- b .L1159
-.L1155:
- ldr r1, .L1219
+.L1176:
+ b .L1176
+.L1172:
+ ldr r1, .L1236
ldr r0, [sp, #32]
- ldr r2, [r1, #3984]
+ ldr r2, [r1, #3988]
adds r0, r2, r0
mov r3, r2
-.L1160:
+.L1177:
cmp r3, r0
- beq .L1216
+ beq .L1233
ldr r6, [r5, #2048]
strb r6, [r3], #1
- b .L1160
-.L1216:
+ b .L1177
+.L1233:
ldr r3, [sp]
- ldr r0, [r1, #3984]
+ ldr r0, [r1, #3988]
add r0, r0, r3
movs r3, #8
-.L1163:
+.L1180:
ldr r1, [sp]
adds r6, r0, r1
-.L1162:
+.L1179:
ldr r1, [r0]
mvns r1, r1
str r1, [r0], #4
cmp r0, r6
- bne .L1162
+ bne .L1179
ldr r1, [sp]
subs r3, r3, #1
add r0, r0, r1
- bne .L1163
-.L1164:
- ldr r1, .L1219
+ bne .L1180
+.L1181:
+ ldr r1, .L1236
movs r0, #0
- ldr r1, [r1, #3984]
+ ldr r1, [r1, #3988]
str r1, [sp, #24]
mov r1, r0
ldr r6, [sp, #24]
add r6, r6, r3
str r6, [sp, #36]
-.L1167:
+.L1184:
movs r6, #1
movs r7, #16
str r7, [sp, #28]
lsl lr, r6, r1
movs r6, #0
mov ip, r6
-.L1165:
+.L1182:
ldr r7, [sp, #36]
ldr r7, [r7, r6]
and r7, lr, r7
@@ -7960,73 +8058,73 @@ HynixGetReadRetryDefault:
ldr r7, [sp, #28]
subs r7, r7, #1
str r7, [sp, #28]
- bne .L1165
+ bne .L1182
cmp ip, #8
add r1, r1, #1
it hi
orrhi r0, r0, lr
cmp r1, #32
- bne .L1167
+ bne .L1184
ldr r1, [sp, #24]
str r0, [r1, r3]
adds r3, r3, #4
ldr r1, [sp]
cmp r3, r1
- bne .L1164
- ldr r3, .L1219
- ldr r1, [r3, #3984]
+ bne .L1181
+ ldr r3, .L1236
+ ldr r1, [r3, #3988]
movs r3, #0
subs r0, r1, #4
add r6, r1, #28
-.L1169:
+.L1186:
ldr r7, [r0, #4]!
cmp r7, #0
it eq
addeq r3, r3, #1
cmp r0, r6
- bne .L1169
+ bne .L1186
cmp r3, #7
- ble .L1170
- ldr r0, .L1219+8
+ ble .L1187
+ ldr r0, .L1236+8
movs r2, #1
mov r3, #1024
bl rknand_print_hex
- ldr r0, .L1219+4
+ ldr r0, .L1236+4
movs r1, #0
bl printk
-.L1171:
- b .L1171
-.L1170:
+.L1188:
+ b .L1188
+.L1187:
cmp r4, #6
- beq .L1183
+ beq .L1200
cmp r4, #7
ite ne
movne ip, #8
moveq ip, #10
- b .L1172
-.L1183:
+ b .L1189
+.L1200:
mov ip, #4
-.L1172:
+.L1189:
add r7, r9, #-1
ldr r1, [sp, #16]
movs r0, #0
uxtb r7, r7
adds r7, r7, #1
-.L1173:
+.L1190:
mov lr, r1
mov r3, r2
-.L1174:
+.L1191:
ldrb r6, [r3], #1 @ zero_extendqisi2
strb r6, [lr], #1
subs r6, r3, r2
uxtb r6, r6
cmp r6, r9
- bcc .L1174
+ bcc .L1191
adds r0, r0, #1
add r2, r2, r7
cmp r0, fp
add r1, r1, ip
- blt .L1173
+ blt .L1190
ldr r3, [sp, #4]
mov r0, r8
add r6, r10, r3, lsl #8
@@ -8035,35 +8133,35 @@ HynixGetReadRetryDefault:
bl NandcWaitFlashReady
ldr r3, [sp, #20]
cmp r3, #1
- bhi .L1176
+ bhi .L1193
movs r3, #54
str r3, [r6, #2056]
- ldr r3, .L1219+12
+ ldr r3, .L1236+12
mov r1, #-1
ldr r0, [sp, #8]
- ldrb r3, [r3, #1906] @ zero_extendqisi2
+ ldrb r3, [r3, #1910] @ zero_extendqisi2
str r3, [r5, #2052]
movs r3, #0
str r3, [r5, #2048]
movs r3, #22
str r3, [r6, #2056]
bl FlashReadCmd
- b .L1177
-.L1176:
+ b .L1194
+.L1193:
movs r3, #56
str r3, [r6, #2056]
-.L1177:
+.L1194:
mov r0, r8
bl NandcWaitFlashReady
ldr r3, [sp, #12]
adds r3, r3, #1
- b .L1215
-.L1220:
+ b .L1232
+.L1237:
.align 2
-.L1219:
+.L1236:
.word .LANCHOR2
- .word .LC83
- .word .LC84
+ .word .LC86
+ .word .LC87
.word .LANCHOR0
.fnend
.size HynixGetReadRetryDefault, .-HynixGetReadRetryDefault
@@ -8079,74 +8177,74 @@ FlashGetReadRetryDefault:
@ link register save eliminated.
mov r3, r0
cmp r0, #0
- beq .L1221
+ beq .L1238
subs r2, r0, #1
cmp r2, #6
- bhi .L1223
+ bhi .L1240
b HynixGetReadRetryDefault
-.L1223:
+.L1240:
cmp r0, #49
- bne .L1224
- ldr r0, .L1244
+ bne .L1241
+ ldr r0, .L1261
movs r2, #64
- ldr r1, .L1244+4
- addw r0, r0, #1906
+ ldr r1, .L1261+4
+ addw r0, r0, #1910
strb r3, [r0, #-4]
movs r3, #4
strb r3, [r0, #-3]
movs r3, #15
strb r3, [r0, #-2]
- b .L1242
-.L1224:
+ b .L1259
+.L1241:
cmp r0, #33
- beq .L1225
+ beq .L1242
sub r2, r0, #65
cmp r2, #1
- bhi .L1226
-.L1225:
- ldr r0, .L1244
- strb r3, [r0, #1902]
+ bhi .L1243
+.L1242:
+ ldr r0, .L1261
+ strb r3, [r0, #1906]
movs r3, #4
- b .L1243
-.L1226:
+ b .L1260
+.L1243:
cmp r0, #34
- beq .L1227
+ beq .L1244
cmp r0, #67
- bne .L1228
-.L1227:
- ldr r0, .L1244
- strb r3, [r0, #1902]
+ bne .L1245
+.L1244:
+ ldr r0, .L1261
+ strb r3, [r0, #1906]
movs r3, #5
-.L1243:
- strb r3, [r0, #1903]
+.L1260:
+ strb r3, [r0, #1907]
movs r2, #45
movs r3, #7
- addw r0, r0, #1906
+ addw r0, r0, #1910
strb r3, [r0, #-2]
- ldr r1, .L1244+8
- b .L1242
-.L1228:
+ ldr r1, .L1261+8
+ b .L1259
+.L1245:
cmp r0, #35
- beq .L1229
+ beq .L1246
cmp r0, #68
- bne .L1221
-.L1229:
- ldr r0, .L1244
+ bne .L1238
+.L1246:
+ ldr r0, .L1261
movs r2, #95
- ldr r1, .L1244+12
- addw r0, r0, #1906
+ ldr r1, .L1261+12
+ addw r0, r0, #1910
strb r3, [r0, #-4]
movs r3, #5
strb r3, [r0, #-3]
movs r3, #17
strb r3, [r0, #-2]
-.L1242:
+.L1259:
b ftl_memcpy
-.L1221:
+.L1238:
bx lr
-.L1245:
+.L1262:
.align 2
-.L1244:
+.L1261:
.word .LANCHOR0
.word .LANCHOR1+440
.word .LANCHOR1+288
@@ -8165,15 +8263,15 @@ NandcXferComp:
push {r0, r1, r4, r5, r6, lr}
.save {r4, r5, r6, lr}
.pad #8
- ldr r5, .L1285
+ ldr r5, .L1302
add r0, r5, r0, lsl #3
- ldr r3, [r5, #2768]
+ ldr r3, [r5, #2780]
ldr r4, [r0, #12]
cmp r3, #3
- bls .L1277
+ bls .L1294
ldr r3, [r4, #16]
lsls r6, r3, #29
- bpl .L1277
+ bpl .L1294
mov r0, r4
bl wait_for_nandc_xfer_completed
ldr r6, [r4, #16]
@@ -8181,130 +8279,130 @@ NandcXferComp:
ubfx r6, r6, #1, #1
str r3, [sp]
cmp r6, #0
- beq .L1259
+ beq .L1276
movs r6, #0
-.L1249:
+.L1266:
ldr r2, [r4, #28]
ldr r3, [sp]
ubfx r2, r2, #16, #5
ubfx r3, r3, #22, #6
cmp r2, r3
- bge .L1257
- ldr r3, [r5, #2768]
+ bge .L1274
+ ldr r3, [r5, #2780]
cmp r3, #5
- bhi .L1250
-.L1253:
+ bhi .L1267
+.L1270:
adds r6, r6, #1
bic r3, r6, #-16777216
cmp r3, #0
- bne .L1249
+ bne .L1266
ldr r2, [r4, #28]
mov r1, r6
ldr r3, [sp]
ubfx r2, r2, #16, #5
- ldr r0, .L1285+4
+ ldr r0, .L1302+4
ubfx r3, r3, #22, #6
bl printk
- ldr r0, .L1285+8
+ ldr r0, .L1302+8
mov r1, r4
movs r2, #4
mov r3, #512
bl rknand_print_hex
- b .L1249
-.L1250:
+ b .L1266
+.L1267:
ldr r3, [r4]
str r3, [sp, #4]
ldr r3, [sp, #4]
lsls r0, r3, #18
- bpl .L1253
+ bpl .L1270
ldr r3, [sp, #4]
lsls r1, r3, #14
- bpl .L1253
-.L1257:
- ldr r3, [r5, #2804]
- ldr r4, .L1285
+ bpl .L1270
+.L1274:
+ ldr r3, [r5, #2812]
+ ldr r4, .L1302
cmp r3, #0
- beq .L1258
+ beq .L1275
ldr r1, [sp]
movs r2, #0
- ldr r0, [r4, #2796]
+ ldr r0, [r4, #2804]
ubfx r1, r1, #22, #5
lsls r1, r1, #10
bl rknand_dma_unmap_single
- ldr r0, [r4, #2800]
- movs r2, #0
ldr r1, [sp]
+ ldr r0, [r4, #2808]
+ movs r2, #0
ubfx r1, r1, #22, #5
lsls r1, r1, #7
bl rknand_dma_unmap_single
- b .L1258
-.L1261:
+ b .L1275
+.L1278:
ldr r3, [r4, #8]
adds r6, r6, #1
str r3, [sp]
bic r3, r6, #-16777216
- cbnz r3, .L1259
+ cbnz r3, .L1276
ldr r2, [sp]
mov r1, r6
ldr r3, [r4, #28]
- ldr r0, .L1285+12
+ ldr r0, .L1302+12
ubfx r3, r3, #16, #5
bl printk
- ldr r0, .L1285+8
+ ldr r0, .L1302+8
mov r1, r4
movs r2, #4
mov r3, #512
bl rknand_print_hex
-.L1259:
+.L1276:
ldr r3, [sp]
lsls r2, r3, #11
- bpl .L1261
- ldr r3, [r5, #2812]
- cbz r3, .L1262
+ bpl .L1278
+ ldr r3, [r5, #2820]
+ cbz r3, .L1279
mov r0, r4
bl NandcSendDumpDataStart
-.L1262:
- ldr r3, [r5, #2804]
- ldr r6, .L1285
- cbz r3, .L1263
+.L1279:
+ ldr r3, [r5, #2812]
+ ldr r6, .L1302
+ cbz r3, .L1280
ldr r1, [sp]
movs r2, #1
- ldr r0, [r6, #2796]
+ ldr r0, [r6, #2804]
ubfx r1, r1, #22, #5
lsls r1, r1, #10
bl rknand_dma_unmap_single
- ldr r0, [r6, #2800]
- movs r2, #1
ldr r1, [sp]
+ ldr r0, [r6, #2808]
+ movs r2, #1
ubfx r1, r1, #22, #5
lsls r1, r1, #7
bl rknand_dma_unmap_single
-.L1263:
- ldr r3, [r5, #2812]
- cbz r3, .L1258
+.L1280:
+ ldr r3, [r5, #2820]
+ cbz r3, .L1275
mov r0, r4
bl NandcSendDumpDataDone
-.L1258:
+.L1275:
movs r3, #0
- str r3, [r5, #2804]
- b .L1246
-.L1277:
+ str r3, [r5, #2812]
+ b .L1263
+.L1294:
ldr r3, [r4, #8]
str r3, [sp]
ldr r3, [sp]
lsls r3, r3, #11
- bpl .L1277
-.L1246:
+ bpl .L1294
+.L1263:
add sp, sp, #8
@ sp needed
pop {r4, r5, r6, pc}
-.L1286:
+.L1303:
.align 2
-.L1285:
+.L1302:
.word .LANCHOR0
- .word .LC85
- .word .LC86
- .word .LC87
+ .word .LC88
+ .word .LC89
+ .word .LC90
.fnend
.size NandcXferComp, .-NandcXferComp
.align 1
@@ -8319,7 +8417,7 @@ NandcXferData:
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r9, r3
- ldr r5, .L1331
+ ldr r5, .L1348
tst r9, #63
.pad #92
sub sp, sp, #92
@@ -8328,16 +8426,16 @@ NandcXferData:
mov r10, r1
mov r6, r2
ldr r7, [r3, #12]
- bne .L1288
+ bne .L1305
ldr r3, [sp, #128]
- cbnz r3, .L1289
+ cbnz r3, .L1306
add r0, sp, #24
movs r1, #255
movs r2, #64
bl memset
add r3, sp, #24
str r3, [sp, #128]
-.L1289:
+.L1306:
ldr r3, [sp, #128]
mov r0, r8
str r9, [sp]
@@ -8349,8 +8447,8 @@ NandcXferData:
mov r0, r8
bl NandcXferComp
cmp r10, #0
- bne .L1315
- ldr r3, [r5, #2816]
+ bne .L1332
+ ldr r3, [r5, #2824]
lsrs r4, r6, #1
mov r2, r10
mov r1, r10
@@ -8359,12 +8457,12 @@ NandcXferData:
ite cc
movcc lr, #64
movcs lr, #128
-.L1292:
+.L1309:
cmp r1, r4
add r3, r3, #4
add ip, r2, lr
- bcs .L1329
- ldr r0, [r5, #2784]
+ bcs .L1346
+ ldr r0, [r5, #2792]
lsrs r2, r2, #2
adds r1, r1, #1
ldr r2, [r0, r2, lsl #2]
@@ -8376,30 +8474,30 @@ NandcXferData:
strb r0, [r3, #-2]
strb r2, [r3, #-1]
mov r2, ip
- b .L1292
-.L1329:
+ b .L1309
+.L1346:
movs r2, #0
- ldr r0, [r5, #2816]
- ldr r1, [r5, #2768]
+ ldr r0, [r5, #2824]
+ ldr r1, [r5, #2780]
lsrs r6, r6, #2
mov fp, r2
-.L1294:
+.L1311:
cmp r2, r6
- bcs .L1290
+ bcs .L1307
cmp r0, #0
- beq .L1290
+ beq .L1307
add r3, r2, #8
ldr r3, [r7, r3, lsl #2]
str r3, [sp, #20]
ldr r3, [sp, #20]
lsls r4, r3, #29
- bmi .L1318
+ bmi .L1335
ldr r4, [sp, #20]
ubfx r4, r4, #15, #1
cmp r4, #0
- bne .L1318
+ bne .L1335
cmp r1, #5
- bls .L1296
+ bls .L1313
ldr r4, [sp, #20]
ldr r3, [sp, #20]
ubfx r4, r4, #3, #5
@@ -8420,10 +8518,10 @@ NandcXferData:
ite hi
ubfxhi r4, r4, #27, #1
ubfxls r4, r4, #29, #1
- b .L1328
-.L1296:
+ b .L1345
+.L1313:
cmp r1, #3
- bls .L1298
+ bls .L1315
ldr r4, [sp, #20]
ldr r3, [sp, #20]
ubfx r4, r4, #3, #5
@@ -8444,40 +8542,40 @@ NandcXferData:
ite hi
ubfxhi r4, r4, #28, #1
ubfxls r4, r4, #30, #1
-.L1328:
+.L1345:
orr r4, r3, r4, lsl #5
-.L1298:
+.L1315:
cmp fp, r4
it cc
movcc fp, r4
- b .L1295
-.L1318:
+ b .L1312
+.L1335:
mov fp, #-1
-.L1295:
+.L1312:
adds r2, r2, #1
- b .L1294
-.L1315:
+ b .L1311
+.L1332:
mov fp, #0
-.L1290:
+.L1307:
movs r3, #0
str r3, [r7, #16]
- b .L1301
-.L1288:
+ b .L1318
+.L1305:
cmp r1, #1
mov r4, #0
- bne .L1327
+ bne .L1344
mov fp, r4
-.L1302:
+.L1319:
cmp r4, r6
- bcs .L1330
+ bcs .L1347
and ip, r4, #3
cmp r9, #0
- beq .L1321
+ beq .L1338
add r3, r9, r4, lsl #9
- b .L1304
-.L1321:
+ b .L1321
+.L1338:
mov r3, r9
-.L1304:
+.L1321:
ldr r2, [sp, #128]
mov r0, r7
ldr r1, [sp, #128]
@@ -8492,21 +8590,21 @@ NandcXferData:
str r2, [sp]
mov r2, ip
bl NandcCopy1KB
+ ldr ip, [sp, #8]
mov r0, r8
movs r1, #1
movs r2, #2
- ldr ip, [sp, #8]
str fp, [sp]
- str fp, [sp, #4]
mov r3, ip
+ str fp, [sp, #4]
bl NandcXferStart
mov r0, r8
bl NandcXferComp
- b .L1302
-.L1330:
+ b .L1319
+.L1347:
mov fp, #0
- b .L1301
-.L1327:
+ b .L1318
+.L1344:
str r4, [sp]
mov r1, r4
str r4, [sp, #4]
@@ -8515,16 +8613,16 @@ NandcXferData:
mov fp, r4
bl NandcXferStart
str r9, [sp, #8]
-.L1307:
+.L1324:
cmp r4, r6
- bcs .L1301
+ bcs .L1318
mov r0, r8
bl NandcXferComp
ldr r3, [r7, #32]
add ip, r4, #2
cmp ip, r6
str r3, [sp, #20]
- bcs .L1308
+ bcs .L1325
movs r3, #0
mov r0, r8
str r3, [sp]
@@ -8535,10 +8633,10 @@ NandcXferData:
str ip, [sp, #12]
bl NandcXferStart
ldr ip, [sp, #12]
-.L1308:
+.L1325:
ldr r3, [sp, #20]
lsls r3, r3, #29
- bmi .L1323
+ bmi .L1340
ldr r2, [sp, #20]
ldr r3, [sp, #20]
ubfx r2, r2, #3, #5
@@ -8547,10 +8645,10 @@ NandcXferData:
cmp fp, r3
it cc
movcc fp, r3
- b .L1309
-.L1323:
+ b .L1326
+.L1340:
mov fp, #-1
-.L1309:
+.L1326:
ldr r1, [sp, #128]
cmp r9, #0
ldr r3, [sp, #8]
@@ -8574,13 +8672,13 @@ NandcXferData:
mov r4, ip
add r3, r3, #1024
str r3, [sp, #8]
- b .L1307
-.L1301:
- ldr r3, [r5, #2768]
+ b .L1324
+.L1318:
+ ldr r3, [r5, #2780]
cmp r3, #5
- bls .L1313
+ bls .L1330
cmp r10, #0
- bne .L1313
+ bne .L1330
ldr r3, [r7]
and r2, r3, #139264
cmp r2, #139264
@@ -8588,14 +8686,14 @@ NandcXferData:
moveq fp, #-1
orreq r3, r3, #131072
streq r3, [r7]
-.L1313:
+.L1330:
mov r0, fp
add sp, sp, #92
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1332:
+.L1349:
.align 2
-.L1331:
+.L1348:
.word .LANCHOR0
.fnend
.size NandcXferData, .-NandcXferData
@@ -8612,20 +8710,20 @@ FlashReadRawPage:
.save {r4, r5, r6, r7, r8, lr}
.pad #8
mov r8, r3
- ldr r3, .L1335
+ ldr r3, .L1352
mov r6, r1
mov r7, r2
mov r4, r0
ldrb r5, [r3, #265] @ zero_extendqisi2
- cbnz r0, .L1334
- ldr r2, .L1335+4
+ cbnz r0, .L1351
+ ldr r2, .L1352+4
ldrb r3, [r2, #1] @ zero_extendqisi2
ldr r2, [r2, #4]
muls r2, r3, r2
cmp r1, r2
it cc
movcc r5, #4
-.L1334:
+.L1351:
mov r0, r4
bl NandcWaitFlashReady
mov r0, r4
@@ -8638,8 +8736,8 @@ FlashReadRawPage:
mov r2, r5
movs r1, #0
mov r3, r7
- mov r0, r4
str r8, [sp]
+ mov r0, r4
bl NandcXferData
mov r5, r0
mov r0, r4
@@ -8648,9 +8746,9 @@ FlashReadRawPage:
add sp, sp, #8
@ sp needed
pop {r4, r5, r6, r7, r8, pc}
-.L1336:
+.L1353:
.align 2
-.L1335:
+.L1352:
.word .LANCHOR1
.word .LANCHOR0
.fnend
@@ -8667,7 +8765,7 @@ FlashDdrTunningRead:
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r7, r3
- ldr r4, .L1363
+ ldr r4, .L1380
.pad #20
sub sp, sp, #20
mov r10, r0
@@ -8676,14 +8774,14 @@ FlashDdrTunningRead:
ldr r3, [r4, #1828]
ldr r3, [r3, #304]
str r3, [sp, #8]
- ldr r3, [r4, #2768]
+ ldr r3, [r4, #2780]
cmp r3, #8
ldr r3, [sp, #56]
ite cc
movcc r9, #6
movcs r9, #12
cmp r3, #0
- beq .L1351
+ beq .L1368
movs r0, #1
bl FlashSetInterfaceMode
movs r0, #1
@@ -8691,137 +8789,137 @@ FlashDdrTunningRead:
mov r0, r10
bl FlashReset
mov r3, r7
+ ldr r1, [sp]
mov r2, fp
mov r0, r10
- ldr r1, [sp]
bl FlashReadRawPage
mov r6, r0
- ldrb r0, [r4, #2760] @ zero_extendqisi2
+ ldrb r0, [r4, #2764] @ zero_extendqisi2
bl FlashSetInterfaceMode
- ldrb r0, [r4, #2760] @ zero_extendqisi2
+ ldrb r0, [r4, #2764] @ zero_extendqisi2
bl NandcSetMode
adds r3, r6, #1
- bne .L1340
-.L1349:
+ bne .L1357
+.L1366:
mov r6, #-1
- b .L1341
-.L1340:
+ b .L1358
+.L1357:
mov r2, r6
- ldr r0, .L1363+4
+ ldr r0, .L1380+4
ldr r1, [sp]
bl printk
cmp r6, #9
itt ls
addls r4, r4, r10, lsl #3
ldrls r3, [r4, #12]
- ldr r4, .L1363+8
+ ldr r4, .L1380+8
itttt ls
ldrls r2, [r3, #3840]
ldrls r2, [r3]
orrls r2, r2, #131072
strls r2, [r3]
- ldr r3, [r4, #3988]
+ ldr r3, [r4, #3992]
adds r3, r3, #1
- str r3, [r4, #3988]
+ str r3, [r4, #3992]
cmp r3, #2048
- bcc .L1341
+ bcc .L1358
movs r7, #0
- str r7, [r4, #3988]
+ str r7, [r4, #3992]
mov fp, r7
- b .L1339
-.L1351:
+ b .L1356
+.L1368:
mov r6, #1024
-.L1339:
+.L1356:
movs r4, #0
mov r8, #-1
str r4, [sp, #4]
mov ip, r4
mov r5, r4
-.L1347:
+.L1364:
uxtb r0, r9
str ip, [sp, #12]
bl NandcSetDdrPara
mov r3, r7
mov r0, r10
- mov r2, fp
ldr r1, [sp]
+ mov r2, fp
bl FlashReadRawPage
adds r3, r6, #1
- cmp r0, r3
ldr ip, [sp, #12]
- bhi .L1343
+ cmp r0, r3
+ bhi .L1360
cmp r0, #2
- bhi .L1353
+ bhi .L1370
adds r5, r5, #1
cmp r5, #9
- bls .L1353
+ bls .L1370
rsb r4, r5, r9
mov r6, r0
mov r8, #0
- b .L1345
-.L1343:
+ b .L1362
+.L1360:
ldr r3, [sp, #4]
cmp r3, r5
- bcs .L1354
+ bcs .L1371
cmp r5, #7
rsb ip, r5, r4
- bhi .L1355
+ bhi .L1372
str r5, [sp, #4]
- b .L1354
-.L1353:
+ b .L1371
+.L1370:
mov r8, #0
mov r4, r9
mov r6, r0
mov r7, r8
mov fp, r8
- b .L1344
-.L1354:
+ b .L1361
+.L1371:
movs r5, #0
-.L1344:
+.L1361:
add r9, r9, #2
cmp r9, #69
- bls .L1347
-.L1345:
+ bls .L1364
+.L1362:
ldr r3, [sp, #4]
cmp r3, r5
it cs
movcs r4, ip
- b .L1346
-.L1355:
+ b .L1363
+.L1372:
mov r4, ip
-.L1346:
- cbz r4, .L1348
- ldr r0, .L1363+12
+.L1363:
+ cbz r4, .L1365
+ ldr r0, .L1380+12
mov r1, r4
bl printk
uxtb r0, r4
bl NandcSetDdrPara
-.L1348:
+.L1365:
cmp r8, #0
- beq .L1341
- ldr r0, .L1363+16
+ beq .L1358
+ ldr r0, .L1380+16
mov r1, r10
ldr r2, [sp]
bl printk
ldr r3, [sp, #56]
cmp r3, #0
- beq .L1349
+ beq .L1366
ldr r3, [sp, #8]
ubfx r0, r3, #8, #8
bl NandcSetDdrPara
-.L1341:
+.L1358:
mov r0, r6
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1364:
+.L1381:
.align 2
-.L1363:
+.L1380:
.word .LANCHOR0
- .word .LC88
+ .word .LC91
.word .LANCHOR2
- .word .LC89
- .word .LC90
+ .word .LC92
+ .word .LC93
.fnend
.size FlashDdrTunningRead, .-FlashDdrTunningRead
.align 1
@@ -8843,18 +8941,18 @@ FlashReadPage:
bl FlashReadRawPage
adds r2, r0, #1
mov r4, r0
- bne .L1366
- ldr r9, .L1385+4
+ bne .L1383
+ ldr r9, .L1402+4
ldrb fp, [r9, #8] @ zero_extendqisi2
mov r10, r9
cmp fp, #0
- bne .L1367
-.L1369:
- ldrb r3, [r10, #2761] @ zero_extendqisi2
- ldr r9, .L1385+4
- cbz r3, .L1366
- b .L1384
-.L1367:
+ bne .L1384
+.L1386:
+ ldrb r3, [r10, #2772] @ zero_extendqisi2
+ ldr r9, .L1402+4
+ cbz r3, .L1383
+ b .L1401
+.L1384:
movs r3, #0
mov r0, r5
strb r3, [r9, #8]
@@ -8864,10 +8962,10 @@ FlashReadPage:
bl FlashReadRawPage
strb fp, [r9, #8]
adds r3, r0, #1
- beq .L1369
+ beq .L1386
mov r4, r0
- b .L1366
-.L1384:
+ b .L1383
+.L1401:
ldr r3, [r9, #1828]
mov r1, r6
mov r0, r5
@@ -8879,20 +8977,20 @@ FlashReadPage:
bl FlashDdrTunningRead
adds r1, r0, #1
mov r4, r0
- beq .L1370
+ beq .L1387
ldrb r3, [r9, #1892] @ zero_extendqisi2
cmp r0, r3, lsr #1
- bls .L1366
-.L1370:
+ bls .L1383
+.L1387:
ubfx r0, r10, #8, #8
bl NandcSetDdrPara
-.L1366:
- ldr r9, .L1385+8
- ldr ip, [r9, #3992]
+.L1383:
+ ldr r9, .L1402+8
+ ldr ip, [r9, #3996]
cmp ip, #0
- beq .L1371
+ beq .L1388
adds r2, r4, #1
- bne .L1371
+ bne .L1388
mov r1, r6
mov r2, r8
mov r3, r7
@@ -8901,17 +8999,17 @@ FlashReadPage:
mov r3, r6
mov r2, r5
mov r4, r0
- ldr r0, .L1385
+ ldr r0, .L1402
mov r1, r4
bl printk
adds r3, r4, #1
- bne .L1371
- ldr r3, .L1385+4
+ bne .L1388
+ ldr r3, .L1402+4
ldrb r3, [r3, #76] @ zero_extendqisi2
- cbz r3, .L1371
+ cbz r3, .L1388
mov r0, r5
bl flash_enter_slc_mode
- ldr r4, [r9, #3992]
+ ldr r4, [r9, #3996]
mov r0, r5
mov r1, r6
mov r2, r8
@@ -8920,15 +9018,15 @@ FlashReadPage:
mov r4, r0
mov r0, r5
bl flash_exit_slc_mode
-.L1371:
+.L1388:
mov r0, r4
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1386:
+.L1403:
.align 2
-.L1385:
- .word .LC91
+.L1402:
+ .word .LC94
.word .LANCHOR0
.word .LANCHOR2
.fnend
@@ -8945,19 +9043,19 @@ FlashDdrParaScan:
push {r0, r1, r4, r5, r6, r7, r8, lr}
.save {r4, r5, r6, r7, r8, lr}
.pad #8
+ movs r5, #0
+ ldr r4, .L1414
mov r7, r0
- ldr r4, .L1397
mov r6, r1
- movs r5, #0
- ldrb r0, [r4, #2760] @ zero_extendqisi2
+ ldrb r0, [r4, #2764] @ zero_extendqisi2
bl FlashSetInterfaceMode
- ldrb r0, [r4, #2760] @ zero_extendqisi2
+ ldrb r0, [r4, #2764] @ zero_extendqisi2
bl NandcSetMode
mov r1, r6
mov r2, r5
mov r3, r5
- mov r0, r7
str r5, [sp]
+ mov r0, r7
bl FlashDdrTunningRead
mov r1, r6
mov r2, r5
@@ -8966,32 +9064,32 @@ FlashDdrParaScan:
mov r0, r7
bl FlashReadRawPage
adds r0, r0, #1
- beq .L1388
+ beq .L1405
cmp r8, #-1
- bne .L1389
-.L1388:
- ldrb r3, [r4, #2760] @ zero_extendqisi2
+ bne .L1406
+.L1405:
+ ldrb r3, [r4, #2764] @ zero_extendqisi2
lsls r3, r3, #31
- bpl .L1389
+ bpl .L1406
movs r0, #1
bl FlashSetInterfaceMode
movs r0, #1
bl NandcSetMode
- ldr r3, .L1397
+ ldr r3, .L1414
movs r2, #0
- strb r2, [r3, #2761]
- b .L1390
-.L1389:
+ strb r2, [r3, #2772]
+ b .L1407
+.L1406:
movs r3, #1
- strb r3, [r4, #2761]
-.L1390:
+ strb r3, [r4, #2772]
+.L1407:
movs r0, #0
add sp, sp, #8
@ sp needed
pop {r4, r5, r6, r7, r8, pc}
-.L1398:
+.L1415:
.align 2
-.L1397:
+.L1414:
.word .LANCHOR0
.fnend
.size FlashDdrParaScan, .-FlashDdrParaScan
@@ -9008,119 +9106,119 @@ FlashLoadPhyInfo:
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.pad #20
sub sp, sp, #20
- ldr r6, .L1415
+ ldr r6, .L1432
movs r4, #0
- ldr r3, .L1415+4
+ ldr r3, .L1432+4
mov r9, #4
- ldr r5, .L1415+8
+ ldr r5, .L1432+8
mov r7, #-1
mov r8, r6
ldr r0, [r3] @ unaligned
ldrh r3, [r6, #266]
mov r6, r5
- str r4, [r5, #4000]
+ str r4, [r5, #4004]
str r0, [sp, #12] @ unaligned
mov r0, r4
str r3, [sp, #4]
- ldr r3, [r5, #3984]
- str r3, [r5, #3996]
+ ldr r3, [r5, #3988]
+ str r3, [r5, #4000]
bl flash_enter_slc_mode
-.L1400:
+.L1417:
add fp, r4, #1
mov r10, #0
-.L1402:
+.L1419:
add r3, sp, #12
ldrb r0, [r3, r10] @ zero_extendqisi2
bl FlashBchSel
movs r0, #0
mov r1, r4
- ldr r2, [r5, #3984]
+ ldr r2, [r5, #3988]
mov r3, r0
bl FlashReadRawPage
adds r0, r0, #1
- bne .L1401
+ bne .L1418
movs r0, #0
mov r1, fp
- ldr r2, [r6, #3984]
+ ldr r2, [r6, #3988]
mov r3, r0
bl FlashReadRawPage
adds r0, r0, #1
- bne .L1401
+ bne .L1418
add r10, r10, #1
cmp r10, #4
- beq .L1403
- b .L1402
-.L1404:
+ beq .L1420
+ b .L1419
+.L1421:
add r0, fp, #12
movw r1, #2036
bl JSHash
ldr r3, [fp, #8]
cmp r3, r0
- bne .L1410
+ bne .L1427
add r1, fp, #160
movs r2, #32
- ldr r0, .L1415+12
+ ldr r0, .L1432+12
bl ftl_memcpy
- ldr r7, .L1415+16
- ldr r1, [r6, #3996]
+ ldr r7, .L1432+16
+ ldr r1, [r6, #4000]
movs r2, #32
add r0, r7, #44
adds r1, r1, #192
bl ftl_memcpy
- ldr r1, [r6, #3996]
+ ldr r1, [r6, #4000]
mov r2, #852
- addw r0, r7, #1902
+ addw r0, r7, #1906
adds r1, r1, #224
bl ftl_memcpy
- ldr fp, [r6, #3996]
- str r4, [r6, #4000]
+ ldr fp, [r6, #4000]
+ str r4, [r6, #4004]
mov r0, r4
ldrh r1, [r8, #266]
ldr r3, [fp, #1076]
- strb r3, [r7, #2761]
+ strb r3, [r7, #2772]
bl __aeabi_uidiv
adds r3, r0, #1
- cbnz r0, .L1413
+ cbnz r0, .L1430
movs r3, #2
-.L1413:
- str r3, [r6, #4004]
+.L1430:
+ str r3, [r6, #4008]
movs r7, #0
ldrh r3, [fp, #14]
- strb r3, [r5, #4008]
-.L1403:
+ strb r3, [r5, #4012]
+.L1420:
ldr r3, [sp, #4]
subs r9, r9, #1
add r4, r4, r3
- bne .L1400
+ bne .L1417
mov r0, r9
-.L1414:
+.L1431:
bl flash_exit_slc_mode
mov r0, r7
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1401:
- ldr fp, [r5, #3996]
- ldr r2, .L1415+20
+.L1418:
+ ldr fp, [r5, #4000]
+ ldr r2, .L1432+20
ldr r3, [fp]
cmp r3, r2
- bne .L1403
+ bne .L1420
cmp r7, #0
- bne .L1404
+ bne .L1421
mov r0, r4
ldrh r1, [r8, #266]
bl __aeabi_uidiv
- ldr r3, .L1415+8
+ ldr r3, .L1432+8
adds r0, r0, #1
- str r0, [r3, #4004]
+ str r0, [r3, #4008]
mov r0, r7
- b .L1414
-.L1410:
+ b .L1431
+.L1427:
mov r7, #-1
- b .L1403
-.L1416:
+ b .L1420
+.L1433:
.align 2
-.L1415:
+.L1432:
.word .LANCHOR1
.word .LANCHOR3+11
.word .LANCHOR2
@@ -9142,72 +9240,72 @@ ToshibaReadRetrial:
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.pad #28
sub sp, sp, #28
+ ldr r4, .L1462
mov r9, r0
- mov fp, r3
str r2, [sp, #8]
+ mov fp, r3
str r1, [sp, #16]
bl NandcWaitFlashReady
- ldr r4, .L1445
add r3, r4, r9, lsl #3
ldrb r2, [r3, #16] @ zero_extendqisi2
ldr r7, [r3, #12]
- ldrb r3, [r4, #1900] @ zero_extendqisi2
+ ldrb r3, [r4, #1904] @ zero_extendqisi2
add r6, r2, #8
subs r3, r3, #67
add r6, r7, r6, lsl #8
cmp r3, #1
lsl r3, r2, #8
str r3, [sp, #12]
- bls .L1434
- ldrb r5, [r4, #2761] @ zero_extendqisi2
- cbz r5, .L1435
+ bls .L1451
+ ldrb r5, [r4, #2772] @ zero_extendqisi2
+ cbz r5, .L1452
movs r0, #0
str r2, [sp, #20]
bl NandcSetDdrMode
movs r3, #1
ldr r2, [sp, #20]
str r3, [sp, #4]
- b .L1419
-.L1435:
+ b .L1436
+.L1452:
str r5, [sp, #4]
-.L1419:
+.L1436:
ldr r3, [sp, #12]
movs r1, #92
adds r3, r7, r3
str r1, [r3, #2056]
movs r1, #197
str r1, [r3, #2056]
- b .L1418
-.L1434:
+ b .L1435
+.L1451:
movs r3, #0
str r3, [sp, #4]
-.L1418:
+.L1435:
mov r8, #1
mov r10, #-1
lsls r3, r2, #8
str r3, [sp, #20]
-.L1420:
- ldr r3, .L1445+4
- ldrb r3, [r3, #4009] @ zero_extendqisi2
+.L1437:
+ ldr r3, .L1462+4
+ ldrb r3, [r3, #4013] @ zero_extendqisi2
adds r3, r3, #1
cmp r8, r3
- bcs .L1444
- ldrb r3, [r4, #1900] @ zero_extendqisi2
+ bcs .L1461
+ ldrb r3, [r4, #1904] @ zero_extendqisi2
mov r0, r6
uxtb r1, r8
subs r3, r3, #67
cmp r3, #1
- bhi .L1421
+ bhi .L1438
bl SandiskSetRRPara
- b .L1422
-.L1421:
+ b .L1439
+.L1438:
bl ToshibaSetRRPara
-.L1422:
- ldrb r3, [r4, #1900] @ zero_extendqisi2
+.L1439:
+ ldrb r3, [r4, #1904] @ zero_extendqisi2
cmp r3, #34
- bne .L1423
- ldr r3, .L1445+4
- ldrb r3, [r3, #4009] @ zero_extendqisi2
+ bne .L1440
+ ldr r3, .L1462+4
+ ldrb r3, [r3, #4013] @ zero_extendqisi2
subs r3, r3, #3
cmp r8, r3
itttt eq
@@ -9215,7 +9313,7 @@ ToshibaReadRetrial:
ldreq r3, [sp, #20]
addeq r3, r7, r3
streq r2, [r3, #2056]
-.L1423:
+.L1440:
ldr r3, [sp, #12]
movs r2, #38
adds r3, r7, r3
@@ -9223,54 +9321,54 @@ ToshibaReadRetrial:
movs r2, #93
str r2, [r3, #2056]
ldr r3, [sp, #4]
- cbz r3, .L1424
+ cbz r3, .L1441
movs r0, #4
bl NandcSetDdrMode
mov r0, r9
- mov r3, fp
ldr r1, [sp, #16]
+ mov r3, fp
ldr r2, [sp, #8]
bl FlashReadRawPage
mov r5, r0
movs r0, #0
bl NandcSetDdrMode
- b .L1425
-.L1424:
+ b .L1442
+.L1441:
mov r0, r9
ldr r1, [sp, #16]
ldr r2, [sp, #8]
mov r3, fp
bl FlashReadRawPage
mov r5, r0
-.L1425:
+.L1442:
adds r2, r5, #1
- beq .L1426
+ beq .L1443
ldrb r2, [r4, #1892] @ zero_extendqisi2
cmp r10, #-1
it eq
moveq r10, r5
add r2, r2, r2, lsl #1
cmp r5, r2, asr #2
- bcc .L1428
+ bcc .L1445
mov fp, #0
str fp, [sp, #8]
-.L1426:
+.L1443:
add r8, r8, #1
- b .L1420
-.L1444:
+ b .L1437
+.L1461:
mov r5, r10
-.L1428:
- ldrb r2, [r4, #1900] @ zero_extendqisi2
+.L1445:
+ ldrb r2, [r4, #1904] @ zero_extendqisi2
mov r0, r6
movs r1, #0
subs r2, r2, #67
cmp r2, #1
- bhi .L1430
+ bhi .L1447
bl SandiskSetRRPara
- b .L1431
-.L1430:
+ b .L1448
+.L1447:
bl ToshibaSetRRPara
-.L1431:
+.L1448:
ldr r3, [sp, #12]
movs r2, #255
add r7, r7, r3
@@ -9278,25 +9376,25 @@ ToshibaReadRetrial:
ldrb r2, [r4, #1892] @ zero_extendqisi2
add r2, r2, r2, lsl #1
cmp r5, r2, asr #2
- bcc .L1432
+ bcc .L1449
adds r3, r5, #1
it ne
movne r5, #256
-.L1432:
+.L1449:
mov r0, r9
bl NandcWaitFlashReady
ldr r3, [sp, #4]
- cbz r3, .L1433
+ cbz r3, .L1450
movs r0, #4
bl NandcSetDdrMode
-.L1433:
+.L1450:
mov r0, r5
add sp, sp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1446:
+.L1463:
.align 2
-.L1445:
+.L1462:
.word .LANCHOR0
.word .LANCHOR2
.fnend
@@ -9313,7 +9411,7 @@ SamsungReadRetrial:
push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r8, r0
- ldr r5, .L1460
+ ldr r5, .L1477
mov r9, r2
mov r7, r3
mov fp, r1
@@ -9325,12 +9423,12 @@ SamsungReadRetrial:
ldr r6, [r2, #12]
adds r3, r3, #8
add r6, r6, r3, lsl #8
-.L1448:
- ldr r3, .L1460+4
- ldrb r3, [r3, #4009] @ zero_extendqisi2
+.L1465:
+ ldr r3, .L1477+4
+ ldrb r3, [r3, #4013] @ zero_extendqisi2
adds r3, r3, #1
cmp r10, r3
- bcs .L1451
+ bcs .L1468
mov r0, r6
uxtb r1, r10
bl SamsungSetRRPara
@@ -9340,38 +9438,38 @@ SamsungReadRetrial:
mov r3, r7
bl FlashReadRawPage
adds r2, r0, #1
- beq .L1449
+ beq .L1466
ldrb r3, [r5, #1892] @ zero_extendqisi2
cmp r4, #-1
it eq
moveq r4, r0
add r3, r3, r3, lsl #1
cmp r0, r3, asr #2
- bcc .L1454
+ bcc .L1471
movs r7, #0
mov r9, r7
-.L1449:
+.L1466:
add r10, r10, #1
- b .L1448
-.L1454:
+ b .L1465
+.L1471:
mov r4, r0
-.L1451:
+.L1468:
mov r0, r6
movs r1, #0
bl SamsungSetRRPara
ldrb r3, [r5, #1892] @ zero_extendqisi2
add r3, r3, r3, lsl #1
cmp r4, r3, asr #2
- bcc .L1453
+ bcc .L1470
adds r3, r4, #1
it ne
movne r4, #256
-.L1453:
+.L1470:
mov r0, r4
pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1461:
+.L1478:
.align 2
-.L1460:
+.L1477:
.word .LANCHOR0
.word .LANCHOR2
.fnend
@@ -9388,7 +9486,7 @@ MicronReadRetrial:
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r9, r3
- ldr r3, .L1478
+ ldr r3, .L1495
mov fp, r2
.pad #28
sub sp, sp, #28
@@ -9397,15 +9495,15 @@ MicronReadRetrial:
ldrb r2, [r3, #76] @ zero_extendqisi2
mov r5, r3
ldrb r4, [r3, #1892] @ zero_extendqisi2
- cbnz r2, .L1463
+ cbnz r2, .L1480
add r4, r4, r4, lsl #1
ubfx r4, r4, #2, #8
- b .L1464
-.L1463:
- ldr r2, .L1478+4
+ b .L1481
+.L1480:
+ ldr r2, .L1495+4
smull r2, r3, r4, r2
uxtb r4, r3
-.L1464:
+.L1481:
mov r0, r8
movs r7, #0
bl NandcWaitFlashReady
@@ -9413,16 +9511,16 @@ MicronReadRetrial:
mov r5, #-1
ldr r2, [r3, #12]
ldrb r3, [r3, #16] @ zero_extendqisi2
+ str r2, [sp, #12]
str r3, [sp, #16]
mov r3, r2
- str r2, [sp, #12]
ldr r2, [sp, #16]
add r6, r3, r2, lsl #8
-.L1465:
- ldr r3, .L1478+8
- ldrb r3, [r3, #4009] @ zero_extendqisi2
+.L1482:
+ ldr r3, .L1495+8
+ ldrb r3, [r3, #4013] @ zero_extendqisi2
cmp r7, r3
- bcs .L1468
+ bcs .L1485
movs r3, #239
movs r0, #200
str r3, [r6, #2056]
@@ -9436,28 +9534,28 @@ MicronReadRetrial:
mov r0, r8
str ip, [r6, #2048]
mov r1, r10
- str ip, [r6, #2048]
- str ip, [r6, #2048]
str r3, [sp, #8]
mov r3, r9
+ str ip, [r6, #2048]
+ str ip, [r6, #2048]
str ip, [sp, #20]
bl FlashReadRawPage
adds r2, r0, #1
- beq .L1466
+ beq .L1483
cmp r5, #-1
it eq
moveq r5, r0
cmp r0, r4
- bcc .L1472
+ bcc .L1489
ldr ip, [sp, #20]
mov r9, ip
mov fp, ip
-.L1466:
+.L1483:
ldr r7, [sp, #8]
- b .L1465
-.L1472:
+ b .L1482
+.L1489:
mov r5, r0
-.L1468:
+.L1485:
ldr r2, [sp, #16]
movs r0, #200
ldr r3, [sp, #12]
@@ -9473,9 +9571,9 @@ MicronReadRetrial:
str r3, [r6, #2048]
str r3, [r6, #2048]
str r3, [r6, #2048]
- bcc .L1470
+ bcc .L1487
adds r3, r5, #1
- ldr r0, .L1478+12
+ ldr r0, .L1495+12
it ne
movne r5, #256
mov r1, r7
@@ -9483,18 +9581,18 @@ MicronReadRetrial:
mov r2, r10
mov r3, r7
bl printk
-.L1470:
+.L1487:
mov r0, r5
add sp, sp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1479:
+.L1496:
.align 2
-.L1478:
+.L1495:
.word .LANCHOR0
.word 1431655766
.word .LANCHOR2
- .word .LC92
+ .word .LC95
.fnend
.size MicronReadRetrial, .-MicronReadRetrial
.align 1
@@ -9510,29 +9608,29 @@ HynixReadRetrial:
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.pad #12
mov r10, r2
- ldr r5, .L1497
+ ldr r5, .L1514
mov r8, r3
mov r7, r0
mov fp, r1
adds r3, r5, r0
mov r6, #-1
ldr r2, [r5, #1788]
- ldrb r4, [r3, #1914] @ zero_extendqisi2
- ldrb r9, [r5, #1904] @ zero_extendqisi2
+ ldrb r4, [r3, #1918] @ zero_extendqisi2
+ ldrb r9, [r5, #1908] @ zero_extendqisi2
ldrb r2, [r2, #19] @ zero_extendqisi2
cmp r2, #7
it eq
- ldrbeq r4, [r3, #1922] @ zero_extendqisi2
+ ldrbeq r4, [r3, #1926] @ zero_extendqisi2
bl NandcWaitFlashReady
mov ip, #0
-.L1482:
+.L1499:
cmp ip, r9
- bcs .L1486
+ bcs .L1503
adds r4, r4, #1
mov r0, r7
- ldrb r1, [r5, #1903] @ zero_extendqisi2
+ ldrb r1, [r5, #1907] @ zero_extendqisi2
uxtb r4, r4
- ldr r2, .L1497+4
+ ldr r2, .L1514+4
cmp r4, r9
it cs
movcs r4, #0
@@ -9544,48 +9642,48 @@ HynixReadRetrial:
mov r1, fp
mov r3, r8
bl FlashReadRawPage
- adds r2, r0, #1
ldr ip, [sp, #4]
- beq .L1484
+ adds r2, r0, #1
+ beq .L1501
ldrb r3, [r5, #1892] @ zero_extendqisi2
cmp r6, #-1
it eq
moveq r6, r0
add r3, r3, r3, lsl #1
cmp r0, r3, asr #2
- bcc .L1491
+ bcc .L1508
mov r8, #0
mov r10, r8
-.L1484:
+.L1501:
add ip, ip, #1
- b .L1482
-.L1491:
+ b .L1499
+.L1508:
mov r6, r0
-.L1486:
+.L1503:
ldr r3, [r5, #1788]
add r7, r7, r5
ldrb r3, [r3, #19] @ zero_extendqisi2
cmp r3, #7
ldrb r3, [r5, #1892] @ zero_extendqisi2
ite eq
- strbeq r4, [r7, #1922]
- strbne r4, [r7, #1914]
+ strbeq r4, [r7, #1926]
+ strbne r4, [r7, #1918]
add r3, r3, r3, lsl #1
cmp r6, r3, asr #2
- bcc .L1490
+ bcc .L1507
adds r3, r6, #1
it ne
movne r6, #256
-.L1490:
+.L1507:
mov r0, r6
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1498:
+.L1515:
.align 2
-.L1497:
+.L1514:
.word .LANCHOR0
- .word .LANCHOR0+1906
+ .word .LANCHOR0+1910
.fnend
.size HynixReadRetrial, .-HynixReadRetrial
.align 1
@@ -9601,25 +9699,25 @@ FlashProgPage:
.save {r4, r5, r6, r7, r8, lr}
.pad #8
mov r8, r3
- ldr r3, .L1502
+ ldr r3, .L1519
mov r5, r1
mov r7, r2
mov r4, r0
ldrb r6, [r3, #265] @ zero_extendqisi2
- cbnz r0, .L1500
- ldr r2, .L1502+4
+ cbnz r0, .L1517
+ ldr r2, .L1519+4
ldrb r3, [r2, #1] @ zero_extendqisi2
ldr r1, [r2, #4]
muls r1, r3, r1
cmp r5, r1
- bcs .L1500
+ bcs .L1517
ldrb r3, [r2] @ zero_extendqisi2
- cbnz r3, .L1501
+ cbnz r3, .L1518
subs r6, r6, #2
- b .L1500
-.L1501:
+ b .L1517
+.L1518:
movs r6, #4
-.L1500:
+.L1517:
mov r0, r4
bl NandcWaitFlashReady
mov r0, r4
@@ -9629,9 +9727,9 @@ FlashProgPage:
bl FlashProgFirstCmd
uxtb r2, r6
mov r3, r7
+ str r8, [sp]
mov r0, r4
movs r1, #1
- str r8, [sp]
bl NandcXferData
mov r1, r5
mov r0, r4
@@ -9648,9 +9746,9 @@ FlashProgPage:
add sp, sp, #8
@ sp needed
pop {r4, r5, r6, r7, r8, pc}
-.L1503:
+.L1520:
.align 2
-.L1502:
+.L1519:
.word .LANCHOR1
.word .LANCHOR0
.fnend
@@ -9667,70 +9765,70 @@ FlashSavePhyInfo:
push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.pad #12
- ldr r4, .L1513
- ldr r5, .L1513+4
- ldr r8, .L1513+12
- ldr r3, [r4, #3984]
+ ldr r4, .L1530
+ ldr r5, .L1530+4
+ ldr r8, .L1530+12
+ ldr r3, [r4, #3988]
mov r9, r4
- ldrb r0, [r4, #4010] @ zero_extendqisi2
+ ldrb r0, [r4, #4014] @ zero_extendqisi2
mov r10, r5
- str r3, [r4, #3996]
+ str r3, [r4, #4000]
bl FlashBchSel
- ldr r0, [r4, #3984]
+ ldr r0, [r4, #3988]
mov r1, #2048
bl __memzero
- ldr r3, [r4, #3996]
+ ldr r3, [r4, #4000]
add r1, r5, #1792
movs r2, #32
str r8, [r3]
- ldr r0, [r4, #3996]
+ ldr r0, [r4, #4000]
ldrb r3, [r5, #1616] @ zero_extendqisi2
adds r0, r0, #16
strh r3, [r0, #-4] @ movhi
ldrb r3, [r5, #1] @ zero_extendqisi2
strh r3, [r0, #-2] @ movhi
- ldrb r3, [r5, #2761] @ zero_extendqisi2
+ ldrb r3, [r5, #2772] @ zero_extendqisi2
str r3, [r0, #1060]
bl ftl_memcpy
- ldr r0, [r4, #3996]
+ ldr r0, [r4, #4000]
addw r1, r5, #1620
movs r2, #8
adds r0, r0, #80
bl ftl_memcpy
- ldr r0, [r4, #3996]
+ ldr r0, [r4, #4000]
addw r1, r5, #1628
movs r2, #32
adds r0, r0, #96
bl ftl_memcpy
- ldr r0, [r4, #3996]
- ldr r1, .L1513+8
+ ldr r0, [r4, #4000]
+ ldr r1, .L1530+8
movs r2, #32
adds r0, r0, #160
bl ftl_memcpy
- ldr r0, [r4, #3996]
+ ldr r0, [r4, #4000]
add r1, r5, #44
movs r2, #32
adds r0, r0, #192
bl ftl_memcpy
- ldr r0, [r4, #3996]
+ ldr r0, [r4, #4000]
mov r2, #852
- addw r1, r5, #1902
+ addw r1, r5, #1906
adds r0, r0, #224
bl ftl_memcpy
- ldr r6, [r4, #3996]
+ ldr r6, [r4, #4000]
movw r1, #2036
add r0, r6, #12
bl JSHash
mov r3, #1592
str r3, [r6, #4]
- ldr r3, [r4, #4012]
- str r3, [r4, #3996]
+ ldr r3, [r4, #4016]
+ str r3, [r4, #4000]
str r0, [r6, #8]
movs r0, #0
bl flash_enter_slc_mode
movs r6, #0
mov r7, r6
-.L1507:
+.L1524:
ldr r1, [r5, #4]
movs r0, #0
mov r2, r0
@@ -9738,53 +9836,53 @@ FlashSavePhyInfo:
bl FlashEraseBlock
ldr r1, [r5, #4]
movs r0, #0
- ldr r2, [r4, #3984]
+ ldr r2, [r4, #3988]
muls r1, r7, r1
mov r3, r0
bl FlashProgPage
ldr r1, [r5, #4]
movs r0, #0
- ldr r2, [r4, #3984]
+ ldr r2, [r4, #3988]
muls r1, r7, r1
mov r3, r0
adds r1, r1, #1
bl FlashProgPage
ldr r1, [r5, #4]
movs r0, #0
- ldr r2, [r4, #4012]
+ ldr r2, [r4, #4016]
muls r1, r7, r1
mov r3, r0
bl FlashReadRawPage
adds r2, r7, #1
adds r0, r0, #1
- beq .L1505
- ldr fp, [r9, #3996]
+ beq .L1522
+ ldr fp, [r9, #4000]
ldr r3, [fp]
cmp r3, r8
- bne .L1505
+ bne .L1522
add r0, fp, #12
movw r1, #2036
str r2, [sp, #4]
bl JSHash
ldr r3, [fp, #8]
- cmp r3, r0
ldr r2, [sp, #4]
- bne .L1505
+ cmp r3, r0
+ bne .L1522
ldr r3, [r10, #4]
cmp r6, #1
- str r2, [r9, #4004]
+ str r2, [r9, #4008]
mul r3, r3, r7
- str r3, [r9, #4000]
- beq .L1508
+ str r3, [r9, #4004]
+ beq .L1525
movs r6, #1
-.L1505:
+.L1522:
cmp r2, #4
mov r7, r2
- bne .L1507
- b .L1506
-.L1508:
+ bne .L1524
+ b .L1523
+.L1525:
movs r6, #2
-.L1506:
+.L1523:
movs r0, #0
bl flash_exit_slc_mode
clz r0, r6
@@ -9793,9 +9891,9 @@ FlashSavePhyInfo:
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1514:
+.L1531:
.align 2
-.L1513:
+.L1530:
.word .LANCHOR2
.word .LANCHOR0
.word .LANCHOR1+256
@@ -9814,100 +9912,100 @@ FlashReadIdbDataRaw:
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r9, r0
- ldr r3, .L1528
+ ldr r3, .L1545
.pad #20
sub sp, sp, #20
- ldr r4, .L1528+4
+ ldr r4, .L1545+4
ldr r0, [r3] @ unaligned
- ldr r2, [r4, #2772]
- ldr r3, .L1528+8
+ ldr r2, [r4, #2768]
+ ldr r3, .L1545+8
str r0, [sp, #12] @ unaligned
cmp r2, r3
ldrb r10, [r4, #1892] @ zero_extendqisi2
str r3, [sp, #4]
- bne .L1516
+ bne .L1533
movs r0, #0
bl flash_enter_slc_mode
-.L1516:
+.L1533:
mov r0, r9
mov r1, #2048
bl __memzero
mov r8, #-1
movs r5, #2
-.L1517:
+.L1534:
ldrb r3, [r4, #1] @ zero_extendqisi2
cmp r5, r3
- bcs .L1521
+ bcs .L1538
movs r7, #0
-.L1519:
+.L1536:
add r3, sp, #12
- ldr r6, .L1528+12
+ ldr r6, .L1545+12
ldrb fp, [r7, r3] @ zero_extendqisi2
mov r0, fp
bl FlashBchSel
ldr r1, [r4, #4]
movs r0, #0
- ldr r2, [r6, #3984]
+ ldr r2, [r6, #3988]
muls r1, r5, r1
mov r3, r0
bl FlashReadRawPage
adds r0, r0, #1
- bne .L1518
+ bne .L1535
adds r7, r7, #1
cmp r7, #4
- bne .L1519
- b .L1520
-.L1518:
- ldr r3, [r6, #3984]
- ldr r2, .L1528+16
+ bne .L1536
+ b .L1537
+.L1535:
+ ldr r3, [r6, #3988]
+ ldr r2, .L1545+16
ldr r3, [r3]
cmp r3, r2
- bne .L1520
+ bne .L1537
mov r1, fp
- ldr r0, .L1528+20
+ ldr r0, .L1545+20
bl printk
mov r2, #2048
mov r0, r9
- ldr r1, [r6, #3984]
+ ldr r1, [r6, #3988]
bl ftl_memcpy
- ldr r3, [r6, #3984]
- ldr r2, .L1528+4
+ ldr r3, [r6, #3988]
+ ldr r2, .L1545+4
ldr r3, [r3, #512]
strb r3, [r2, #1]
- ldr r3, [r6, #4004]
+ ldr r3, [r6, #4008]
cmp r3, r5
- bls .L1524
- str r5, [r6, #4004]
+ bls .L1541
+ str r5, [r6, #4008]
bl FlashSavePhyInfo
mov r8, #0
-.L1520:
+.L1537:
adds r5, r5, #1
- b .L1517
-.L1524:
+ b .L1534
+.L1541:
mov r8, #0
-.L1521:
+.L1538:
mov r0, r10
bl FlashBchSel
- ldr r3, [r4, #2772]
+ ldr r3, [r4, #2768]
ldr r2, [sp, #4]
cmp r3, r2
- bne .L1526
+ bne .L1543
movs r0, #0
bl flash_exit_slc_mode
-.L1526:
+.L1543:
mov r0, r8
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1529:
+.L1546:
.align 2
-.L1528:
+.L1545:
.word .LANCHOR3+11
.word .LANCHOR0
.word 1446522928
.word .LANCHOR2
.word -52655045
- .word .LC93
+ .word .LC96
.fnend
.size FlashReadIdbDataRaw, .-FlashReadIdbDataRaw
.align 1
@@ -9926,39 +10024,39 @@ FlashInit:
sub sp, sp, #28
mov r0, #32768
bl ftl_malloc
- ldr r5, .L1626
- ldr r4, .L1626+4
+ ldr r5, .L1645
+ ldr r4, .L1645+4
movs r7, #0
add r9, r4, #12
mov r10, r4
- str r0, [r5, #3984]
+ str r0, [r5, #3988]
mov r0, #32768
bl ftl_malloc
- str r0, [r5, #4012]
+ str r0, [r5, #4016]
mov r0, #4096
bl ftl_malloc
- str r0, [r5, #4016]
+ str r0, [r5, #4020]
mov r0, #32768
bl ftl_malloc
- str r0, [r5, #4020]
+ str r0, [r5, #4024]
mov r0, #4096
bl ftl_malloc
movs r3, #50
- str r7, [r5, #4004]
+ str r7, [r5, #4008]
strb r3, [r4, #1]
- strb r3, [r5, #4008]
+ strb r3, [r5, #4012]
movs r3, #128
- strb r7, [r4, #2761]
+ strb r7, [r4, #2772]
str r3, [r4, #4]
movs r3, #60
- str r7, [r5, #3988]
+ str r7, [r5, #3992]
strb r7, [r4]
- strb r3, [r5, #4010]
- str r0, [r5, #4024]
+ strb r3, [r5, #4014]
+ str r0, [r5, #4028]
mov r0, r6
bl NandcInit
add r6, r4, #1792
-.L1535:
+.L1552:
uxtb fp, r7
mov r0, fp
bl FlashReset
@@ -9968,9 +10066,9 @@ FlashInit:
ldrb r8, [r3, #4] @ zero_extendqisi2
str r2, [sp, #20]
bl NandcFlashCs
+ ldr r2, [sp, #20]
movs r3, #144
movs r0, #200
- ldr r2, [sp, #20]
add r8, r2, r8, lsl #8
str r3, [r8, #2056]
movs r3, #0
@@ -9994,10 +10092,10 @@ FlashInit:
subs r3, r2, #1
uxtb r3, r3
cmp r3, #253
- bhi .L1531
+ bhi .L1548
ldrb r1, [r6, #2] @ zero_extendqisi2
ldrb r3, [r6, #1] @ zero_extendqisi2
- ldr r0, .L1626+8
+ ldr r0, .L1645+8
str r1, [sp]
ldrb r1, [r6, #3] @ zero_extendqisi2
str r1, [sp, #4]
@@ -10007,17 +10105,17 @@ FlashInit:
str r1, [sp, #12]
adds r1, r7, #1
bl printk
-.L1531:
- cbnz r7, .L1532
+.L1548:
+ cbnz r7, .L1549
ldrb r3, [r4, #1792] @ zero_extendqisi2
subs r3, r3, #1
uxtb r3, r3
cmp r3, #253
- bhi .L1576
+ bhi .L1595
ldrb r3, [r10, #1793] @ zero_extendqisi2
cmp r3, #255
- beq .L1576
-.L1532:
+ beq .L1595
+.L1549:
ldrb r3, [r6] @ zero_extendqisi2
adds r7, r7, #1
adds r6, r6, #8
@@ -10026,124 +10124,146 @@ FlashInit:
moveq r3, #44
strbeq r3, [r6, #-8]
cmp r7, #4
- bne .L1535
+ bne .L1552
ldrb r3, [r4, #1792] @ zero_extendqisi2
cmp r3, #173
- beq .L1536
- ldr r3, .L1626+4
- ldr r0, [r3, #2764]
+ beq .L1553
+ ldr r3, .L1645+4
+ ldr r0, [r3, #2776]
bl NandcSetDdrMode
-.L1536:
- ldr r0, .L1626+12
+.L1553:
+ ldr r6, .L1645+4
mov r1, #852
+ addw r0, r6, #1906
bl __memzero
- ldr r3, .L1626+16
+ ldr r3, .L1645+12
str r3, [r4, #1788]
movs r3, #0
strb r3, [r4, #8]
ldrb r3, [r4, #1793] @ zero_extendqisi2
cmp r3, #161
- beq .L1537
- cmp r3, #241
- beq .L1537
+ beq .L1554
cmp r3, #218
- beq .L1537
+ beq .L1554
+ and r2, r3, #223
+ cmp r2, #209
+ beq .L1554
cmp r3, #220
- bne .L1538
-.L1537:
+ bne .L1555
+ ldrb r2, [r6, #1795] @ zero_extendqisi2
+ cmp r2, #149
+ bne .L1555
+.L1554:
ldrb r1, [r4, #1792] @ zero_extendqisi2
movs r2, #1
strb r2, [r4]
movs r2, #16
strb r2, [r4, #1]
cmp r1, #152
- strb r2, [r5, #4010]
- ldr r2, .L1626+20
- strb r1, [r2, #2969]
- strb r3, [r2, #2970]
- bne .L1539
- ldr r1, .L1626+4
+ strb r2, [r5, #4014]
+ ldr r2, .L1645+16
+ strb r1, [r2, #3033]
+ strb r3, [r2, #3034]
+ bne .L1556
+ ldr r1, .L1645+4
ldrsb r1, [r1, #1796]
cmp r1, #0
ittt ge
movge r0, #24
- ldrge r1, .L1626
- strbge r0, [r1, #4010]
-.L1539:
+ ldrge r1, .L1645
+ strbge r0, [r1, #4014]
+.L1556:
+ ldr r1, .L1645+20
+ ldr r0, [r4, #2768]
+ cmp r0, r1
+ itt eq
+ moveq r1, #16
+ strbeq r1, [r5, #4014]
cmp r3, #218
- bne .L1540
+ bne .L1558
mov r1, #2048
- b .L1622
-.L1540:
+ b .L1641
+.L1558:
cmp r3, #220
- bne .L1541
+ bne .L1559
mov r1, #4096
-.L1622:
- strh r1, [r2, #2982] @ movhi
- strb r3, [r2, #2970]
-.L1541:
- ldr r1, .L1626+24
+.L1641:
+ strh r1, [r2, #3046] @ movhi
+ strb r3, [r2, #3034]
+.L1559:
+ ldr r1, .L1645+24
movs r2, #32
- ldr r0, .L1626+28
+ ldr r0, .L1645+28
bl ftl_memcpy
- ldr r0, .L1626+16
+ ldr r0, .L1645+12
movs r2, #32
- addw r1, r0, #2712
+ addw r1, r0, #2776
bl ftl_memcpy
-.L1538:
+.L1555:
ldrb r3, [r4] @ zero_extendqisi2
- ldr r6, .L1626+4
+ ldr r6, .L1645+4
cmp r3, #0
- bne .L1542
+ bne .L1560
bl FlashLoadPhyInfoInRam
- cbnz r0, .L1544
+ cbnz r0, .L1562
ldr r3, [r6, #1788]
ldrh r3, [r3, #16]
lsrs r3, r3, #8
lsls r7, r3, #31
and r0, r3, #7
- strb r0, [r6, #2760]
- bmi .L1544
+ strb r0, [r6, #2764]
+ bmi .L1562
movs r3, #1
- strb r3, [r6, #2761]
+ strb r3, [r6, #2772]
bl FlashSetInterfaceMode
- ldrb r0, [r6, #2760] @ zero_extendqisi2
+ ldrb r0, [r6, #2764] @ zero_extendqisi2
bl NandcSetMode
-.L1544:
+.L1562:
ldr r3, [r4, #1788]
- ldr r6, .L1626+4
+ ldr r6, .L1645+4
ldrb r3, [r3, #26] @ zero_extendqisi2
strb r3, [r4, #76]
bl FlashLoadPhyInfo
cmp r0, #0
- beq .L1542
- ldr r3, [r6, #2764]
- cbz r3, .L1547
+ beq .L1560
+ ldr r3, [r6, #2776]
+ cbz r3, .L1565
movs r0, #1
bl FlashSetInterfaceMode
movs r0, #1
- b .L1623
-.L1547:
- ldrb r0, [r6, #2760] @ zero_extendqisi2
+ b .L1642
+.L1646:
+ .align 2
+.L1645:
+ .word .LANCHOR2
+ .word .LANCHOR0
+ .word .LC97
+ .word .LANCHOR1+256
+ .word .LANCHOR1
+ .word 1446522928
+ .word .LANCHOR1+2908
+ .word .LANCHOR0+44
+.L1565:
+ ldrb r0, [r6, #2764] @ zero_extendqisi2
bl FlashSetInterfaceMode
- ldrb r0, [r6, #2760] @ zero_extendqisi2
-.L1623:
+ ldrb r0, [r6, #2764] @ zero_extendqisi2
+.L1642:
bl NandcSetMode
bl FlashLoadPhyInfo
cmp r0, #0
- beq .L1542
+ beq .L1560
movs r0, #1
- ldr r6, .L1626+4
+ ldr r6, .L1647
bl FlashSetInterfaceMode
movs r0, #1
bl NandcSetMode
ldr r3, [r4, #1788]
- ldr r0, .L1626+32
+ ldr r0, .L1647+4
ldrh r1, [r3, #14]
bl printk
bl FlashLoadPhyInfoInRam
adds r1, r0, #1
- beq .L1533
+ beq .L1550
bl FlashDieInfoInit
ldr r3, [r6, #1788]
ldrb r0, [r3, #19] @ zero_extendqisi2
@@ -10153,29 +10273,29 @@ FlashInit:
ldrb r1, [r3, #9] @ zero_extendqisi2
addw r2, r2, #4095
cmp r1, r2, asr #12
- blt .L1549
+ blt .L1567
ldrh r2, [r3, #14]
adds r2, r2, #255
cmp r1, r2, asr #8
- bge .L1550
-.L1549:
+ bge .L1568
+.L1567:
ldrh r2, [r3, #14]
bic r2, r2, #255
strh r2, [r3, #14] @ movhi
-.L1550:
- ldrb r3, [r4, #2760] @ zero_extendqisi2
+.L1568:
+ ldrb r3, [r4, #2764] @ zero_extendqisi2
tst r3, #6
- beq .L1551
+ beq .L1569
bl FlashSavePhyInfo
movs r0, #0
- ldr r1, [r5, #4000]
+ ldr r1, [r5, #4004]
bl FlashDdrParaScan
-.L1551:
+.L1569:
bl FlashSavePhyInfo
-.L1542:
+.L1560:
ldr r2, [r4, #1788]
- ldr r6, .L1626+4
- ldr r7, .L1626
+ ldr r6, .L1647
+ ldr r7, .L1647+8
ldrb r3, [r2, #26] @ zero_extendqisi2
ldrh r0, [r2, #10]
ldrb r8, [r2, #18] @ zero_extendqisi2
@@ -10184,14 +10304,14 @@ FlashInit:
ubfx r1, r3, #7, #1
strb r1, [r4, #8]
ubfx r1, r3, #3, #1
- strb r1, [r5, #4028]
+ strb r1, [r5, #4032]
ubfx r1, r3, #4, #1
ubfx r3, r3, #8, #3
- strb r1, [r4, #2820]
- strb r3, [r4, #2760]
+ strb r1, [r4, #2828]
+ strb r3, [r4, #2764]
movs r3, #0
ldrb r1, [r2, #12] @ zero_extendqisi2
- str r3, [r5, #3992]
+ str r3, [r5, #3996]
bl __aeabi_idiv
mov r1, r0
mov r0, r8
@@ -10200,172 +10320,163 @@ FlashInit:
ldr r3, [r4, #1788]
ldrh r2, [r3, #16]
lsls r2, r2, #25
- bpl .L1553
+ bpl .L1571
ldrb r0, [r3, #19] @ zero_extendqisi2
- ldrb r3, [r6, #1903] @ zero_extendqisi2
- strb r0, [r6, #1900]
- strb r3, [r6, #1901]
- ldrb r3, [r6, #1904] @ zero_extendqisi2
- strb r3, [r7, #4009]
+ ldrb r3, [r6, #1907] @ zero_extendqisi2
+ strb r0, [r6, #1904]
+ strb r3, [r6, #1905]
+ ldrb r3, [r6, #1908] @ zero_extendqisi2
+ strb r3, [r7, #4013]
subs r3, r0, #1
cmp r3, #6
- bhi .L1554
- ldr r3, .L1626+36
- str r3, [r7, #3992]
+ bhi .L1572
+ ldr r3, .L1647+12
+ str r3, [r7, #3996]
subs r3, r0, #5
cmp r3, #1
- bhi .L1555
+ bhi .L1573
movs r3, #1
- str r3, [r6, #2812]
- b .L1556
-.L1555:
+ str r3, [r6, #2820]
+ b .L1574
+.L1573:
cmp r0, #7
- beq .L1577
-.L1556:
- ldr r6, .L1626+40
- b .L1557
-.L1627:
- .align 2
-.L1626:
- .word .LANCHOR2
- .word .LANCHOR0
- .word .LC94
- .word .LANCHOR0+1902
- .word .LANCHOR1+256
- .word .LANCHOR1
- .word .LANCHOR1+2844
- .word .LANCHOR0+44
- .word .LC95
- .word HynixReadRetrial
- .word .LANCHOR0+1922
-.L1577:
- addw r6, r6, #1930
-.L1557:
+ beq .L1596
+.L1574:
+ ldr r6, .L1647+16
+ b .L1575
+.L1596:
+ addw r6, r6, #1934
+.L1575:
subs r2, r6, #1
movs r3, #0
adds r6, r6, #31
-.L1558:
+.L1576:
ldrsb r1, [r2, #1]!
cmp r1, #0
it eq
addeq r3, r3, #1
cmp r2, r6
- bne .L1558
+ bne .L1576
cmp r3, #27
- bls .L1553
+ bls .L1571
bl FlashGetReadRetryDefault
bl FlashSavePhyInfo
- b .L1553
-.L1554:
+ b .L1571
+.L1572:
sub r3, r0, #17
cmp r3, #2
- bhi .L1560
- ldr r3, .L1628
+ bhi .L1578
+ ldr r3, .L1647+20
cmp r0, #19
- str r3, [r7, #3992]
+ str r3, [r7, #3996]
ite ne
movne r3, #7
moveq r3, #15
- strb r3, [r7, #4009]
- b .L1553
-.L1560:
+ strb r3, [r7, #4013]
+ b .L1571
+.L1578:
cmp r0, #33
- beq .L1562
+ beq .L1580
sub r3, r0, #65
cmp r3, #1
- bhi .L1563
-.L1562:
- ldr r3, .L1628+4
- str r3, [r5, #3992]
+ bhi .L1581
+.L1580:
+ ldr r3, .L1647+24
+ str r3, [r5, #3996]
movs r3, #4
- strb r3, [r4, #1901]
+ strb r3, [r4, #1905]
movs r3, #7
- strb r3, [r5, #4009]
- b .L1553
-.L1563:
+ strb r3, [r5, #4013]
+ b .L1571
+.L1581:
sub r3, r0, #67
uxtb r3, r3
cmp r3, #1
- bls .L1564
+ bls .L1582
sub r2, r0, #34
cmp r2, #1
- bhi .L1565
-.L1564:
- ldr r2, .L1628+4
+ bhi .L1583
+.L1582:
+ ldr r2, .L1647+24
cmp r0, #35
- str r2, [r5, #3992]
- beq .L1566
+ str r2, [r5, #3996]
+ beq .L1584
cmp r0, #68
- beq .L1566
- ldr r2, .L1628+8
+ beq .L1584
+ ldr r2, .L1647+8
movs r1, #7
- strb r1, [r2, #4009]
- b .L1567
-.L1566:
+ strb r1, [r2, #4013]
+ b .L1585
+.L1584:
movs r2, #17
- strb r2, [r5, #4009]
-.L1567:
+ strb r2, [r5, #4013]
+.L1585:
cmp r3, #1
ite ls
movls r3, #4
movhi r3, #5
- strb r3, [r4, #1901]
- b .L1553
-.L1565:
+ strb r3, [r4, #1905]
+ b .L1571
+.L1583:
cmp r0, #49
itt eq
- ldreq r3, .L1628+12
- streq r3, [r7, #3992]
-.L1553:
- ldr r1, [r4, #2772]
- ldr r2, .L1628+16
- ldr r3, .L1628+20
- cmp r1, r2
- bne .L1569
- ldrb r2, [r3, #76] @ zero_extendqisi2
- cbz r2, .L1569
- ldr r3, [r3, #1788]
- movs r2, #0
- strb r2, [r3, #18]
-.L1569:
- ldrb r2, [r4, #1792] @ zero_extendqisi2
- ldr r3, .L1628+20
- cmp r2, #44
- bne .L1570
- ldrb r2, [r3, #2761] @ zero_extendqisi2
- cbz r2, .L1570
+ ldreq r3, .L1647+28
+ streq r3, [r7, #3996]
+.L1571:
+ ldr r1, [r4, #2768]
+ ldr r3, .L1647+32
+ ldr r2, .L1647
+ cmp r1, r3
+ bne .L1587
+ ldrb r0, [r2, #76] @ zero_extendqisi2
+ cbz r0, .L1587
+ ldr r2, [r2, #1788]
+ movs r0, #0
+ strb r0, [r2, #18]
+.L1587:
+ ldrb r0, [r4, #1792] @ zero_extendqisi2
+ ldr r2, .L1647
+ cmp r0, #44
+ bne .L1588
+ ldrb r0, [r2, #2772] @ zero_extendqisi2
+ cbz r0, .L1588
+ cmp r1, r3
+ bne .L1589
+ ldrb r3, [r2, #76] @ zero_extendqisi2
+ cbnz r3, .L1588
+.L1589:
movs r0, #1
- movs r2, #0
- strb r2, [r3, #2761]
+ movs r3, #0
+ strb r3, [r4, #2772]
bl FlashSetInterfaceMode
movs r0, #1
bl NandcSetMode
-.L1570:
+.L1588:
movs r0, #0
bl flash_enter_slc_mode
- ldrb r3, [r4, #2760] @ zero_extendqisi2
+ ldrb r3, [r4, #2764] @ zero_extendqisi2
tst r3, #6
- beq .L1571
- ldr r2, .L1628+20
- ldrb r2, [r2, #2761] @ zero_extendqisi2
- cbnz r2, .L1572
+ beq .L1590
+ ldr r2, .L1647
+ ldrb r2, [r2, #2772] @ zero_extendqisi2
+ cbnz r2, .L1591
lsls r3, r3, #31
- bmi .L1571
-.L1572:
+ bmi .L1590
+.L1591:
movs r0, #0
- ldr r1, [r5, #4000]
+ ldr r1, [r5, #4004]
bl FlashDdrParaScan
-.L1571:
+.L1590:
movs r0, #0
mov r8, #16
bl flash_exit_slc_mode
ldr r3, [r4, #1788]
- ldr r6, .L1628+20
+ ldr r6, .L1647
ldrb r0, [r3, #20] @ zero_extendqisi2
bl FlashBchSel
- ldr r0, .L1628+24
+ ldr r0, .L1647+36
bl FlashReadIdbDataRaw
- ldr r0, .L1628+28
+ ldr r0, .L1647+40
strb r8, [r4, #1]
bl FlashTimingCfg
ldr r5, [r4, #1788]
@@ -10400,7 +10511,7 @@ FlashInit:
ldrb r1, [r4] @ zero_extendqisi2
strh r3, [r4, #1886] @ movhi
cmp r1, #1
- bne .L1574
+ bne .L1593
lsls r3, r3, #1
lsrs r7, r7, #1
lsls r2, r2, #1
@@ -10410,28 +10521,31 @@ FlashInit:
strh r7, [r6, #1878] @ movhi
strh r2, [r6, #1884] @ movhi
strh r3, [r6, #1890] @ movhi
-.L1574:
+.L1593:
ldrb r0, [r5, #20] @ zero_extendqisi2
bl FlashBchSel
- bl FlashSuspend
+ bl ftl_flash_suspend
movs r0, #0
- b .L1533
-.L1576:
+ b .L1550
+.L1595:
mvn r0, #1
-.L1533:
+.L1550:
add sp, sp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1629:
+.L1648:
.align 2
-.L1628:
+.L1647:
+ .word .LANCHOR0
+ .word .LC98
+ .word .LANCHOR2
+ .word HynixReadRetrial
+ .word .LANCHOR0+1926
.word MicronReadRetrial
.word ToshibaReadRetrial
- .word .LANCHOR2
.word SamsungReadRetrial
.word 1446522928
- .word .LANCHOR0
- .word .LANCHOR2+1932
+ .word .LANCHOR2+1936
.word 150000
.fnend
.size FlashInit, .-FlashInit
@@ -10447,58 +10561,58 @@ FlashPageProgMsbFFData:
push {r4, r5, r6, r7, r8, r9, r10, lr}
.save {r4, r5, r6, r7, r8, r9, r10, lr}
mov r4, r2
- ldr r2, .L1645
+ ldr r2, .L1664
mov r8, r1
mov r7, r0
ldr r3, [r2, #1788]
mov r5, r2
ldrb r1, [r2, #76] @ zero_extendqisi2
ldrb r3, [r3, #19] @ zero_extendqisi2
- cbz r1, .L1631
- ldr r1, [r2, #2772]
- ldr r2, .L1645+4
+ cbz r1, .L1650
+ ldr r1, [r2, #2768]
+ ldr r2, .L1664+4
cmp r1, r2
- beq .L1630
-.L1631:
+ beq .L1649
+.L1650:
subs r2, r3, #5
cmp r2, #2
- bls .L1632
+ bls .L1651
cmp r3, #68
- beq .L1632
+ beq .L1651
cmp r3, #35
- beq .L1632
+ beq .L1651
cmp r3, #19
- bne .L1630
-.L1632:
- ldr r9, .L1645
+ bne .L1649
+.L1651:
+ ldr r9, .L1664
movw r10, #65535
- ldr r6, .L1645+8
-.L1634:
+ ldr r6, .L1664+8
+.L1653:
ldr r3, [r5, #1788]
ldrh r3, [r3, #10]
cmp r3, r4
- bls .L1630
+ bls .L1649
add r3, r9, r4, lsl #1
ldrh r3, [r3, #592]
cmp r3, r10
- bne .L1630
+ bne .L1649
movs r1, #255
mov r2, #32768
- ldr r0, [r6, #4012]
+ ldr r0, [r6, #4016]
bl memset
add r1, r4, r8
adds r4, r4, #1
mov r0, r7
- ldr r2, [r6, #4012]
+ ldr r2, [r6, #4016]
movs r3, #0
bl FlashProgPage
uxth r4, r4
- b .L1634
-.L1630:
+ b .L1653
+.L1649:
pop {r4, r5, r6, r7, r8, r9, r10, pc}
-.L1646:
+.L1665:
.align 2
-.L1645:
+.L1664:
.word .LANCHOR0
.word 1446522928
.word .LANCHOR2
@@ -10513,11 +10627,11 @@ FlashReadSlc2KPages:
.fnstart
@ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L1677
+ ldr r3, .L1696
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
movs r6, #0
- ldr r7, .L1677+4
+ ldr r7, .L1696+4
.pad #28
sub sp, sp, #28
ldrb r9, [r3, #265] @ zero_extendqisi2
@@ -10525,9 +10639,9 @@ FlashReadSlc2KPages:
mov fp, r0
str r2, [sp, #8]
mov r10, r7
-.L1648:
+.L1667:
cmp r6, r8
- beq .L1676
+ beq .L1695
rsb r3, r6, r8
add r2, sp, #20
mov r0, fp
@@ -10536,22 +10650,22 @@ FlashReadSlc2KPages:
str r3, [sp]
add r3, sp, #16
bl LogAddr2PhyAddr
- ldrb r2, [r7, #1616] @ zero_extendqisi2
ldr r3, [sp, #16]
+ ldrb r2, [r7, #1616] @ zero_extendqisi2
cmp r3, r2
- bcc .L1649
+ bcc .L1668
mov r3, #-1
str r3, [fp]
- b .L1650
-.L1649:
+ b .L1669
+.L1668:
add r3, r3, r7
ldrb r4, [r3, #1620] @ zero_extendqisi2
mov r0, r4
bl NandcWaitFlashReady
mov r0, r4
bl NandcFlashCs
- mov r0, r4
ldr r1, [sp, #20]
+ mov r0, r4
bl FlashReadCmd
mov r0, r4
bl NandcWaitFlashReady
@@ -10562,20 +10676,20 @@ FlashReadSlc2KPages:
str r3, [sp]
ldr r3, [fp, #8]
bl NandcXferData
- ldr r1, [r7, #4]
ldr r3, [sp, #20]
+ ldr r1, [r7, #4]
+ add r1, r1, r3
mov r5, r0
mov r0, r4
- add r1, r1, r3
bl FlashReadCmd
ldr r3, [fp, #8]
- cbz r3, .L1651
+ cbz r3, .L1670
add r3, r3, #2048
-.L1651:
+.L1670:
ldr r2, [fp, #12]
- cbz r2, .L1652
+ cbz r2, .L1671
adds r2, r2, #8
-.L1652:
+.L1671:
str r2, [sp]
movs r1, #0
mov r2, r9
@@ -10591,63 +10705,63 @@ FlashReadSlc2KPages:
ldrb r3, [r10, #1892] @ zero_extendqisi2
add r3, r3, r3, lsl #1
cmp r5, r3, asr #2
- bls .L1653
+ bls .L1672
adds r0, r5, #1
it ne
movne r5, #256
str r5, [fp]
- b .L1655
-.L1653:
+ b .L1674
+.L1672:
movs r3, #0
str r3, [fp]
-.L1655:
+.L1674:
ldr r3, [fp, #12]
- cbz r3, .L1656
+ cbz r3, .L1675
ldr r2, [r3, #8]
adds r1, r2, #1
- bne .L1656
+ bne .L1675
ldr r3, [r3]
adds r3, r3, #1
it ne
strne r2, [fp]
-.L1656:
+.L1675:
ldr r3, [fp]
adds r2, r3, #1
- bne .L1650
+ bne .L1669
ldr r1, [fp, #4]
- ldr r0, .L1677+8
+ ldr r0, .L1696+8
ldrb r2, [r10, #1892] @ zero_extendqisi2
bl printk
ldr r1, [fp, #8]
- cbz r1, .L1658
- ldr r0, .L1677+12
+ cbz r1, .L1677
+ ldr r0, .L1696+12
movs r2, #4
movs r3, #8
bl rknand_print_hex
-.L1658:
+.L1677:
ldr r1, [fp, #12]
- cbz r1, .L1650
+ cbz r1, .L1669
movs r2, #4
- ldr r0, .L1677+16
+ ldr r0, .L1696+16
mov r3, r2
bl rknand_print_hex
-.L1650:
+.L1669:
adds r6, r6, #1
add fp, fp, #36
- b .L1648
-.L1676:
+ b .L1667
+.L1695:
movs r0, #0
add sp, sp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1678:
+.L1697:
.align 2
-.L1677:
+.L1696:
.word .LANCHOR1
.word .LANCHOR0
- .word .LC96
- .word .LC97
- .word .LC98
+ .word .LC99
+ .word .LC100
+ .word .LC101
.fnend
.size FlashReadSlc2KPages, .-FlashReadSlc2KPages
.align 1
@@ -10659,31 +10773,31 @@ FlashReadPages:
.fnstart
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L1778
+ ldr r3, .L1797
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.pad #52
sub sp, sp, #52
ldrb r3, [r3, #265] @ zero_extendqisi2
mov r10, r0
- ldr r5, .L1778+4
+ ldr r5, .L1797+4
str r1, [sp, #28]
str r3, [sp, #24]
ldrb r3, [r5, #8] @ zero_extendqisi2
str r2, [sp, #16]
str r3, [sp, #32]
ldrb r3, [r5] @ zero_extendqisi2
- cbz r3, .L1722
+ cbz r3, .L1741
bl FlashReadSlc2KPages
- b .L1773
-.L1722:
+ b .L1792
+.L1741:
mov r8, r3
str r3, [sp, #12]
-.L1680:
+.L1699:
ldr r3, [sp, #12]
ldr r2, [sp, #28]
cmp r3, r2
- bcs .L1775
+ bcs .L1794
ldr r3, [sp, #12]
mov r9, #36
ldr r2, [sp, #12]
@@ -10699,84 +10813,84 @@ FlashReadPages:
str r3, [sp]
add r3, sp, #40
bl LogAddr2PhyAddr
- ldrb r2, [r5, #1616] @ zero_extendqisi2
ldr r3, [sp, #40]
- mov r6, r0
+ ldrb r2, [r5, #1616] @ zero_extendqisi2
cmp r3, r2
- bcc .L1682
+ mov r6, r0
+ bcc .L1701
mov r3, #-1
str r3, [r10, r9]
- b .L1683
-.L1682:
+ b .L1702
+.L1701:
add r3, r3, r5
ldrb r4, [r3, #1620] @ zero_extendqisi2
- ldr r3, .L1778+8
+ ldr r3, .L1797+8
mov r0, r4
- ldrb r3, [r3, #4028] @ zero_extendqisi2
+ ldrb r3, [r3, #4032] @ zero_extendqisi2
cmp r3, #0
it eq
moveq r6, #0
bl NandcWaitFlashReady
- ldr r3, .L1778+4
+ ldr r3, .L1797+4
ldr r3, [r3, #1788]
ldrb r1, [r3, #19] @ zero_extendqisi2
subs r3, r1, #1
cmp r3, #6
- bhi .L1685
+ bhi .L1704
adds r2, r5, r4
cmp r1, #7
- ldrb r3, [r2, #1914] @ zero_extendqisi2
+ ldrb r3, [r2, #1918] @ zero_extendqisi2
it eq
- ldrbeq r3, [r2, #1922] @ zero_extendqisi2
- ldr r2, .L1778+4
+ ldrbeq r3, [r2, #1926] @ zero_extendqisi2
+ ldr r2, .L1797+4
add r2, r2, r4
- ldrb r2, [r2, #2756] @ zero_extendqisi2
+ ldrb r2, [r2, #2760] @ zero_extendqisi2
cmp r2, r3
- beq .L1685
+ beq .L1704
mov r0, r4
- ldrb r1, [r5, #1903] @ zero_extendqisi2
- ldr r2, .L1778+12
+ ldrb r1, [r5, #1907] @ zero_extendqisi2
+ ldr r2, .L1797+12
bl HynixSetRRPara
-.L1685:
+.L1704:
mov r0, r4
and r3, fp, #-2147483648
str r3, [sp, #20]
bl NandcFlashCs
ldr r3, [sp, #16]
cmp r3, #1
- beq .L1687
+ beq .L1706
ldr r3, [sp, #20]
- cbz r3, .L1688
-.L1687:
- ldr r3, .L1778+4
+ cbz r3, .L1707
+.L1706:
+ ldr r3, .L1797+4
ldrb r3, [r3, #76] @ zero_extendqisi2
- cbz r3, .L1688
+ cbz r3, .L1707
mov r0, r4
bl flash_enter_slc_mode
-.L1690:
+.L1709:
mov fp, #0
- b .L1689
-.L1688:
+ b .L1708
+.L1707:
mov r0, r4
bl flash_exit_slc_mode
- b .L1690
-.L1776:
+ b .L1709
+.L1795:
cmp r4, #255
- beq .L1723
-.L1691:
- cbz r6, .L1693
+ beq .L1742
+.L1710:
+ cbz r6, .L1712
ldr r2, [r5, #4]
mov r0, r4
add r2, r2, r1
bl FlashReadDpCmd
-.L1694:
+.L1713:
mov r0, r4
bl NandcWaitFlashReady
- cbz r6, .L1692
+ cbz r6, .L1711
mov r0, r4
ldr r1, [sp, #44]
bl FlashReadDpDataOutCmd
-.L1692:
+.L1711:
ldr r3, [r7, #12]
mov r0, r4
movs r1, #0
@@ -10786,27 +10900,27 @@ FlashReadPages:
bl NandcXferData
ldrb r3, [r5, #8] @ zero_extendqisi2
mov ip, r0
- cbz r3, .L1725
+ cbz r3, .L1744
cmp r0, #-1
- bne .L1725
+ bne .L1744
movs r6, #0
strb fp, [r5, #8]
-.L1689:
+.L1708:
ldr r1, [sp, #44]
adds r0, r1, #1
- bne .L1691
- b .L1776
-.L1693:
+ bne .L1710
+ b .L1795
+.L1712:
mov r0, r4
bl FlashReadCmd
- b .L1694
-.L1723:
+ b .L1713
+.L1742:
movs r6, #0
- b .L1692
-.L1725:
+ b .L1711
+.L1744:
mov fp, ip
- cbz r6, .L1696
- ldr r3, .L1778+4
+ cbz r6, .L1715
+ ldr r3, .L1797+4
mov r0, r4
str ip, [sp, #36]
ldr r1, [r3, #4]
@@ -10822,12 +10936,12 @@ FlashReadPages:
ldr r2, [sp, #24]
ldr r3, [r3, #8]
bl NandcXferData
- cmp r0, #-1
ldr ip, [sp, #36]
+ cmp r0, #-1
+ mov r8, r0
it eq
moveq r6, #0
- mov r8, r0
-.L1696:
+.L1715:
mov r0, r4
str ip, [sp, #36]
bl NandcFlashDeCs
@@ -10835,15 +10949,15 @@ FlashReadPages:
ldrb r3, [sp, #32] @ zero_extendqisi2
cmp ip, #-1
strb r3, [r5, #8]
- bne .L1703
- ldrb r3, [r5, #2761] @ zero_extendqisi2
- cbnz r3, .L1698
-.L1702:
- ldr r3, .L1778+8
- ldr r6, [r3, #3992]
- cbnz r6, .L1699
- b .L1777
-.L1698:
+ bne .L1722
+ ldrb r3, [r5, #2772] @ zero_extendqisi2
+ cbnz r3, .L1717
+.L1721:
+ ldr r3, .L1797+8
+ ldr r6, [r3, #3996]
+ cbnz r6, .L1718
+ b .L1796
+.L1717:
ldr r3, [r5, #1828]
mov r0, r4
ldr r1, [sp, #44]
@@ -10855,17 +10969,17 @@ FlashReadPages:
bl FlashDdrTunningRead
cmp r0, #-1
mov fp, r0
- beq .L1701
+ beq .L1720
ldrb r3, [r5, #1892] @ zero_extendqisi2
cmp r0, r3, lsr #1
- bls .L1727
-.L1701:
+ bls .L1746
+.L1720:
ubfx r0, r6, #8, #8
bl NandcSetDdrPara
cmp fp, #-1
- beq .L1702
- b .L1727
-.L1699:
+ beq .L1721
+ b .L1746
+.L1718:
mov r0, r4
ldr r1, [sp, #44]
ldr r2, [r7, #8]
@@ -10873,18 +10987,18 @@ FlashReadPages:
blx r6
cmp r0, #-1
mov fp, r0
- bne .L1704
+ bne .L1723
ldr r3, [r5, #1788]
ldrb r3, [r3, #19] @ zero_extendqisi2
subs r3, r3, #1
cmp r3, #6
- bhi .L1705
+ bhi .L1724
mov r0, r4
- ldrb r1, [r5, #1903] @ zero_extendqisi2
- ldr r2, .L1778+12
+ ldrb r1, [r5, #1907] @ zero_extendqisi2
+ ldr r2, .L1797+12
movs r3, #0
bl HynixSetRRPara
-.L1705:
+.L1724:
ldr r1, [sp, #44]
mov r0, r4
ldr r2, [r7, #8]
@@ -10893,141 +11007,141 @@ FlashReadPages:
ldr r1, [r7, #4]
ldrb r2, [r5, #1892] @ zero_extendqisi2
mov fp, r0
- ldr r0, .L1778+16
+ ldr r0, .L1797+16
mov r3, fp
bl printk
cmp fp, #-1
- bne .L1704
+ bne .L1723
ldrb r6, [r5, #76] @ zero_extendqisi2
- cbz r6, .L1706
+ cbz r6, .L1725
ldr r3, [sp, #16]
mov r0, r4
cmp r3, #1
- beq .L1707
+ beq .L1726
ldr r3, [sp, #20]
- cbz r3, .L1708
-.L1707:
+ cbz r3, .L1727
+.L1726:
bl flash_enter_slc_mode
- b .L1709
-.L1708:
+ b .L1728
+.L1727:
bl flash_exit_slc_mode
-.L1709:
- ldr r3, .L1778+8
+.L1728:
+ ldr r3, .L1797+8
mov r0, r4
ldr r1, [sp, #44]
ldr r2, [r7, #8]
- ldr r6, [r3, #3992]
+ ldr r6, [r3, #3996]
ldr r3, [r7, #12]
blx r6
movs r6, #0
mov fp, r0
- b .L1710
-.L1777:
+ b .L1729
+.L1796:
mov r0, r4
ldr r1, [sp, #44]
ldr r2, [r7, #8]
ldr r3, [r7, #12]
bl FlashReadRawPage
mov fp, r0
- b .L1710
-.L1727:
+ b .L1729
+.L1746:
movs r6, #0
-.L1703:
+.L1722:
ldrb r3, [r5, #1892] @ zero_extendqisi2
add r3, r3, r3, lsl #1
cmp fp, r3, asr #2
- bls .L1712
- ldr r3, .L1778+8
- ldr r3, [r3, #3992]
- cbz r3, .L1729
-.L1710:
- cmp fp, #-1
- beq .L1706
- b .L1712
+ bls .L1731
+ ldr r3, .L1797+8
+ ldr r3, [r3, #3996]
+ cbz r3, .L1748
.L1729:
+ cmp fp, #-1
+ beq .L1725
+ b .L1731
+.L1748:
mov fp, #256
-.L1706:
+.L1725:
str fp, [r10, r9]
- b .L1713
-.L1779:
+ b .L1732
+.L1798:
.align 2
-.L1778:
+.L1797:
.word .LANCHOR1
.word .LANCHOR0
.word .LANCHOR2
- .word .LANCHOR0+1906
- .word .LC99
-.L1704:
+ .word .LANCHOR0+1910
+ .word .LC102
+.L1723:
movs r6, #0
-.L1712:
+.L1731:
cmp fp, #256
- beq .L1706
+ beq .L1725
movs r3, #0
str r3, [r10, r9]
-.L1713:
+.L1732:
ldr r3, [r10, r9]
adds r2, r3, #1
- bne .L1715
+ bne .L1734
ldr r1, [r7, #4]
- ldr r0, .L1780
+ ldr r0, .L1799
ldrb r2, [r5, #1892] @ zero_extendqisi2
bl printk
ldr r1, [r7, #12]
- cbz r1, .L1715
+ cbz r1, .L1734
movs r2, #4
- ldr r0, .L1780+4
+ ldr r0, .L1799+4
mov r3, r2
bl rknand_print_hex
-.L1715:
- cbz r6, .L1717
+.L1734:
+ cbz r6, .L1736
ldrb r3, [r5, #1892] @ zero_extendqisi2
add r3, r3, r3, lsl #1
cmp r8, r3, asr #2
- bls .L1718
- ldr r3, .L1780+8
- ldr r3, [r3, #3992]
+ bls .L1737
+ ldr r3, .L1799+8
+ ldr r3, [r3, #3996]
cmp r3, #0
it eq
moveq r8, #256
-.L1718:
+.L1737:
add r9, r9, #36
cmp r8, #-1
str r8, [r10, r9]
- beq .L1717
+ beq .L1736
cmp r8, #256
itt ne
movne r3, #0
strne r3, [r10, r9]
-.L1717:
+.L1736:
ldr r3, [sp, #12]
add r3, r3, r6
str r3, [sp, #12]
ldr r3, [sp, #16]
cmp r3, #1
- beq .L1719
+ beq .L1738
ldr r3, [sp, #20]
- cbz r3, .L1683
-.L1719:
+ cbz r3, .L1702
+.L1738:
ldrb r3, [r5, #76] @ zero_extendqisi2
- cbz r3, .L1683
+ cbz r3, .L1702
mov r0, r4
bl flash_exit_slc_mode
-.L1683:
+.L1702:
ldr r3, [sp, #12]
adds r3, r3, #1
str r3, [sp, #12]
- b .L1680
-.L1775:
+ b .L1699
+.L1794:
movs r0, #0
-.L1773:
+.L1792:
add sp, sp, #52
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1781:
+.L1800:
.align 2
-.L1780:
- .word .LC96
- .word .LC98
+.L1799:
+ .word .LC99
+ .word .LC101
.word .LANCHOR2
.fnend
.size FlashReadPages, .-FlashReadPages
@@ -11043,36 +11157,36 @@ FlashLoadFactorBbt:
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
movs r1, #16
- ldr r7, .L1794
+ ldr r7, .L1813
.pad #52
sub sp, sp, #52
- ldr r4, .L1794+4
+ ldr r4, .L1813+4
movs r5, #0
mov fp, #-1
ldrh r3, [r7, #1878]
- add r0, r4, #4032
+ addw r0, r4, #4036
ldrh r6, [r7, #1876]
mov r10, r5
mov r8, r7
mov r9, r4
smulbb r6, r6, r3
bl __memzero
- ldr r3, [r4, #4016]
- uxth r6, r6
+ ldr r3, [r4, #4020]
str r5, [sp, #20]
str r3, [sp, #24]
-.L1783:
+ uxth r6, r6
+.L1802:
ldrb r3, [r8, #1616] @ zero_extendqisi2
uxtb r7, r5
cmp r3, r7
- bls .L1793
+ bls .L1812
mul ip, r6, r7
subs r4, r6, #1
sub r3, r6, #12
uxth r4, r4
-.L1784:
+.L1803:
cmp r4, r3
- ble .L1786
+ ble .L1805
add r2, ip, r4
movs r1, #1
add r0, sp, #12
@@ -11086,44 +11200,44 @@ FlashLoadFactorBbt:
ldr ip, [sp]
adds r2, r2, #1
ldr r3, [sp, #4]
- beq .L1785
- ldr r2, [r9, #4016]
+ beq .L1804
+ ldr r2, [r9, #4020]
ldrh r1, [r2]
movw r2, #61664
cmp r1, r2
- bne .L1785
+ bne .L1804
mov r1, r7
- ldr r0, .L1794+8
+ ldr r0, .L1813+8
mov r2, r4
add r10, r10, #1
bl printk
- ldr r3, .L1794+4
+ ldr r3, .L1813+4
uxth r10, r10
add r7, r3, r7, lsl #1
- strh r4, [r7, #4032] @ movhi
- b .L1786
-.L1785:
+ strh r4, [r7, #4036] @ movhi
+ b .L1805
+.L1804:
subs r4, r4, #1
uxth r4, r4
- b .L1784
-.L1786:
+ b .L1803
+.L1805:
ldrb r3, [r8, #1616] @ zero_extendqisi2
adds r5, r5, #1
cmp r3, r10
it eq
moveq fp, #0
- b .L1783
-.L1793:
+ b .L1802
+.L1812:
mov r0, fp
add sp, sp, #52
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1795:
+.L1814:
.align 2
-.L1794:
+.L1813:
.word .LANCHOR0
.word .LANCHOR2
- .word .LC100
+ .word .LC103
.fnend
.size FlashLoadFactorBbt, .-FlashLoadFactorBbt
.align 1
@@ -11139,20 +11253,20 @@ FlashProgSlc2KPages:
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.pad #68
sub sp, sp, #68
- ldr r8, .L1826+20
+ ldr r8, .L1845+20
movs r7, #0
str r3, [sp, #12]
mov r6, r1
- ldr r3, .L1826
+ ldr r3, .L1845
mov r9, r2
mov r4, r0
mov r10, r0
mov fp, r8
ldrb r3, [r3, #265] @ zero_extendqisi2
str r3, [sp, #8]
-.L1797:
+.L1816:
cmp r7, r6
- beq .L1825
+ beq .L1844
subs r3, r6, r7
add r2, sp, #20
mov r0, r10
@@ -11161,14 +11275,14 @@ FlashProgSlc2KPages:
str r3, [sp]
add r3, sp, #24
bl LogAddr2PhyAddr
- ldrb r2, [r8, #1616] @ zero_extendqisi2
ldr r3, [sp, #24]
+ ldrb r2, [r8, #1616] @ zero_extendqisi2
cmp r3, r2
- bcc .L1798
+ bcc .L1817
mov r3, #-1
str r3, [r10]
- b .L1799
-.L1798:
+ b .L1818
+.L1817:
add r3, r3, r8
ldrb r5, [r3, #1620] @ zero_extendqisi2
mov r0, r5
@@ -11179,43 +11293,43 @@ FlashProgSlc2KPages:
ldr r1, [sp, #20]
bl FlashProgFirstCmd
ldr r3, [r10, #12]
+ ldr r2, [sp, #8]
movs r1, #1
mov r0, r5
- ldr r2, [sp, #8]
str r3, [sp]
ldr r3, [r10, #8]
bl NandcXferData
- mov r0, r5
ldr r1, [sp, #20]
+ mov r0, r5
bl FlashProgSecondCmd
mov r0, r5
bl NandcWaitFlashReady
- mov r0, r5
ldr r1, [sp, #20]
+ mov r0, r5
bl FlashReadStatus
ldr r3, [sp, #20]
sbfx r0, r0, #0, #1
str r0, [r10]
- mov r0, r5
ldr r1, [r8, #4]
+ mov r0, r5
add r1, r1, r3
bl FlashProgFirstCmd
ldr r3, [r10, #8]
- cbz r3, .L1800
+ cbz r3, .L1819
add r3, r3, #2048
-.L1800:
+.L1819:
ldr r2, [r10, #12]
- cbz r2, .L1801
+ cbz r2, .L1820
adds r2, r2, #8
-.L1801:
+.L1820:
str r2, [sp]
movs r1, #1
ldr r2, [sp, #8]
mov r0, r5
bl NandcXferData
+ ldr r3, [sp, #20]
ldr r1, [fp, #4]
mov r0, r5
- ldr r3, [sp, #20]
add r1, r1, r3
bl FlashProgSecondCmd
mov r0, r5
@@ -11229,28 +11343,28 @@ FlashProgSlc2KPages:
movmi r3, #-1
strmi r3, [r10]
bl NandcFlashDeCs
-.L1799:
+.L1818:
adds r7, r7, #1
add r10, r10, #36
- b .L1797
-.L1825:
+ b .L1816
+.L1844:
ldr r3, [sp, #12]
cmp r3, #0
- beq .L1824
- ldr r8, .L1826+24
+ beq .L1843
+ ldr r8, .L1845+24
mov r10, #0
mov fp, r8
-.L1804:
+.L1823:
cmp r10, r6
- beq .L1824
+ beq .L1843
ldr r3, [r4]
adds r3, r3, #1
- bne .L1805
+ bne .L1824
ldr r1, [r4, #4]
- ldr r0, .L1826+4
+ ldr r0, .L1845+4
bl printk
- b .L1806
-.L1805:
+ b .L1825
+.L1824:
rsb r3, r10, r6
mov r1, r9
add r2, sp, #20
@@ -11260,13 +11374,13 @@ FlashProgSlc2KPages:
add r3, sp, #24
mov r7, r4
bl LogAddr2PhyAddr
- ldr r2, [r8, #4020]
+ ldr r2, [r8, #4024]
movs r3, #0
+ add r5, sp, #28
str r3, [r2]
- ldr r2, [r8, #4024]
+ ldr r2, [r8, #4028]
str r3, [r2]
ldmia r7!, {r0, r1, r2, r3}
- add r5, sp, #28
stmia r5!, {r0, r1, r2, r3}
ldmia r7!, {r0, r1, r2, r3}
stmia r5!, {r0, r1, r2, r3}
@@ -11275,61 +11389,61 @@ FlashProgSlc2KPages:
movs r1, #1
mov r2, r9
str r3, [r5]
- ldr r3, [r8, #4020]
- str r3, [sp, #36]
ldr r3, [r8, #4024]
+ str r3, [sp, #36]
+ ldr r3, [r8, #4028]
str r3, [sp, #40]
bl FlashReadPages
ldr r5, [sp, #28]
adds r3, r5, #1
- bne .L1807
- ldr r0, .L1826+8
+ bne .L1826
+ ldr r0, .L1845+8
ldr r1, [r4, #4]
bl printk
str r5, [r4]
-.L1807:
+.L1826:
ldr r3, [r4, #12]
- cbz r3, .L1808
+ cbz r3, .L1827
ldr r2, [r3]
- ldr r3, [fp, #4024]
+ ldr r3, [fp, #4028]
ldr r3, [r3]
cmp r2, r3
- beq .L1808
- ldr r0, .L1826+12
+ beq .L1827
+ ldr r0, .L1845+12
ldr r1, [r4, #4]
bl printk
mov r3, #-1
str r3, [r4]
-.L1808:
+.L1827:
ldr r3, [r4, #8]
- cbz r3, .L1806
+ cbz r3, .L1825
ldr r2, [r3]
- ldr r3, [fp, #4020]
+ ldr r3, [fp, #4024]
ldr r3, [r3]
cmp r2, r3
- beq .L1806
- ldr r0, .L1826+16
+ beq .L1825
+ ldr r0, .L1845+16
ldr r1, [r4, #4]
bl printk
mov r3, #-1
str r3, [r4]
-.L1806:
+.L1825:
add r10, r10, #1
adds r4, r4, #36
- b .L1804
-.L1824:
+ b .L1823
+.L1843:
movs r0, #0
add sp, sp, #68
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1827:
+.L1846:
.align 2
-.L1826:
+.L1845:
.word .LANCHOR1
- .word .LC101
- .word .LC102
- .word .LC103
.word .LC104
+ .word .LC105
+ .word .LC106
+ .word .LC107
.word .LANCHOR0
.word .LANCHOR2
.fnend
@@ -11346,60 +11460,60 @@ FtlLoadFactoryBbt:
push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
movs r6, #0
- ldr r5, .L1839
- ldr r7, .L1839+4
- ldr r3, [r5, #756]
- subw r8, r7, #2978
- ldr r9, [r5, #1796]
+ ldr r5, .L1858
+ ldr r7, .L1858+4
+ ldr r3, [r5, #1776]
+ subw r8, r7, #2982
+ ldr r9, [r5, #1800]
mov r10, r8
- str r3, [r5, #4056]
- str r9, [r5, #4060]
-.L1829:
- ldrh r3, [r8, #2850]
+ str r3, [r5, #4060]
+ str r9, [r5, #4064]
+.L1848:
+ ldrh r3, [r8, #2862]
cmp r6, r3
- bcs .L1838
- ldrh r4, [r8, #2894]
+ bcs .L1857
+ ldrh r4, [r8, #2906]
movw fp, #61664
movw r3, #65535
strh r3, [r7, #2]! @ movhi
subs r4, r4, #1
uxth r4, r4
-.L1830:
- ldrh r3, [r10, #2894]
+.L1849:
+ ldrh r3, [r10, #2906]
sub r2, r3, #16
cmp r4, r2
- ble .L1832
+ ble .L1851
mla r3, r3, r6, r4
movs r1, #1
- ldr r0, .L1839+8
+ ldr r0, .L1858+8
mov r2, r1
lsls r3, r3, #10
- str r3, [r5, #4052]
+ str r3, [r5, #4056]
bl FlashReadPages
- ldr r3, [r5, #4048]
+ ldr r3, [r5, #4052]
adds r3, r3, #1
- beq .L1831
+ beq .L1850
ldrh r3, [r9]
cmp r3, fp
- bne .L1831
+ bne .L1850
strh r4, [r7] @ movhi
- b .L1832
-.L1831:
+ b .L1851
+.L1850:
subs r4, r4, #1
uxth r4, r4
- b .L1830
-.L1832:
+ b .L1849
+.L1851:
adds r6, r6, #1
- b .L1829
-.L1838:
+ b .L1848
+.L1857:
movs r0, #0
pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1840:
+.L1859:
.align 2
-.L1839:
+.L1858:
.word .LANCHOR2
- .word .LANCHOR0+2978
- .word .LANCHOR2+4048
+ .word .LANCHOR0+2982
+ .word .LANCHOR2+4052
.fnend
.size FtlLoadFactoryBbt, .-FtlLoadFactoryBbt
.align 1
@@ -11411,17 +11525,17 @@ FtlGetLastWrittenPage:
.fnstart
@ args = 0, pretend = 0, frame = 104
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L1852
+ ldr r3, .L1871
cmp r1, #1
push {r4, r5, r6, r7, r8, lr}
.save {r4, r5, r6, r7, r8, lr}
.pad #104
sub sp, sp, #104
it eq
- ldrheq r4, [r3, #2900]
+ ldrheq r4, [r3, #2912]
mov r8, r1
it ne
- ldrhne r4, [r3, #2898]
+ ldrhne r4, [r3, #2910]
lsls r6, r0, #10
add r3, sp, #40
add r0, sp, #4
@@ -11438,12 +11552,12 @@ FtlGetLastWrittenPage:
bl FlashReadPages
ldr r3, [sp, #40]
adds r3, r3, #1
- bne .L1844
-.L1845:
+ bne .L1863
+.L1864:
sxth r3, r7
sxth r4, r5
cmp r3, r4
- bgt .L1844
+ bgt .L1863
add r4, r4, r3
add r0, sp, #4
movs r1, #1
@@ -11456,28 +11570,28 @@ FtlGetLastWrittenPage:
bl FlashReadPages
ldr r3, [sp, #40]
adds r3, r3, #1
- bne .L1846
+ bne .L1865
ldr r3, [sp, #44]
adds r3, r3, #1
- bne .L1846
+ bne .L1865
ldr r3, [sp, #4]
adds r3, r3, #1
- beq .L1846
+ beq .L1865
subs r4, r4, #1
uxth r5, r4
- b .L1845
-.L1846:
+ b .L1864
+.L1865:
adds r3, r4, #1
uxth r7, r3
- b .L1845
-.L1844:
+ b .L1864
+.L1863:
sxth r0, r5
add sp, sp, #104
@ sp needed
pop {r4, r5, r6, r7, r8, pc}
-.L1853:
+.L1872:
.align 2
-.L1852:
+.L1871:
.word .LANCHOR0
.fnend
.size FtlGetLastWrittenPage, .-FtlGetLastWrittenPage
@@ -11492,167 +11606,167 @@ FtlLoadBbt:
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, lr}
.save {r4, r5, r6, r7, r8, lr}
- movs r3, #0
- ldr r4, .L1883
- ldr r5, .L1883+4
- ldr r7, [r4, #1796]
+ ldr r4, .L1902
+ ldr r7, .L1902+4
+ ldr r3, [r4, #1776]
mov r8, r4
- str r3, [r4, #4056]
- str r7, [r4, #4060]
+ ldr r6, [r4, #1800]
+ str r3, [r4, #4060]
+ str r6, [r4, #4064]
bl FtlBbtMemInit
- ldrh r6, [r5, #2894]
- subs r6, r6, #1
- uxth r6, r6
-.L1855:
- ldrh r3, [r5, #2894]
+ ldrh r5, [r7, #2906]
+ subs r5, r5, #1
+ uxth r5, r5
+.L1874:
+ ldrh r3, [r7, #2906]
subs r3, r3, #48
- cmp r6, r3
- ble .L1858
+ cmp r5, r3
+ ble .L1877
movs r1, #1
- ldr r0, .L1883+8
- lsls r3, r6, #10
- str r3, [r4, #4052]
+ ldr r0, .L1902+8
+ lsls r3, r5, #10
+ str r3, [r4, #4056]
mov r2, r1
bl FlashReadPages
- ldr r3, [r4, #4048]
+ ldr r3, [r4, #4052]
adds r3, r3, #1
- bne .L1856
+ bne .L1875
movs r1, #1
- ldr r3, [r8, #4052]
- ldr r0, .L1883+8
+ ldr r3, [r8, #4056]
+ ldr r0, .L1902+8
mov r2, r1
adds r3, r3, #1
- str r3, [r8, #4052]
+ str r3, [r8, #4056]
bl FlashReadPages
-.L1856:
- ldr r3, [r4, #4048]
+.L1875:
+ ldr r3, [r4, #4052]
adds r3, r3, #1
- beq .L1857
- ldrh r2, [r7]
+ beq .L1876
+ ldrh r2, [r6]
movw r3, #61649
cmp r2, r3
- bne .L1857
- ldr r3, [r7, #4]
- strh r6, [r5, #2968] @ movhi
- str r3, [r5, #2976]
- ldrh r3, [r7, #8]
- strh r3, [r5, #2972] @ movhi
- b .L1858
-.L1857:
- subs r6, r6, #1
- uxth r6, r6
- b .L1855
-.L1858:
- ldrh r3, [r5, #2968]
+ bne .L1876
+ ldr r3, [r6, #4]
+ strh r5, [r7, #2972] @ movhi
+ str r3, [r7, #2980]
+ ldrh r3, [r6, #8]
+ strh r3, [r7, #2976] @ movhi
+ b .L1877
+.L1876:
+ subs r5, r5, #1
+ uxth r5, r5
+ b .L1874
+.L1877:
+ ldrh r3, [r7, #2972]
movw r2, #65535
- ldr r6, .L1883+4
+ ldr r5, .L1902+4
cmp r3, r2
- beq .L1872
- ldrh r3, [r6, #2972]
+ beq .L1891
+ ldrh r3, [r5, #2976]
cmp r3, r2
- beq .L1862
+ beq .L1881
movs r1, #1
- ldr r0, .L1883+8
+ ldr r0, .L1902+8
lsls r3, r3, #10
- str r3, [r4, #4052]
+ str r3, [r4, #4056]
mov r2, r1
bl FlashReadPages
- ldr r3, [r4, #4048]
+ ldr r3, [r4, #4052]
adds r3, r3, #1
- beq .L1862
- ldrh r2, [r7]
+ beq .L1881
+ ldrh r2, [r6]
movw r3, #61649
cmp r2, r3
- bne .L1862
- ldr r3, [r7, #4]
- ldr r2, [r6, #2976]
+ bne .L1881
+ ldr r3, [r6, #4]
+ ldr r2, [r5, #2980]
cmp r3, r2
itttt hi
- strhi r3, [r6, #2976]
- ldrhhi r2, [r6, #2972]
- ldrhhi r3, [r7, #8]
- strhhi r2, [r6, #2968] @ movhi
+ strhi r3, [r5, #2980]
+ ldrhhi r2, [r5, #2976]
+ ldrhhi r3, [r6, #8]
+ strhhi r2, [r5, #2972] @ movhi
it hi
- strhhi r3, [r6, #2972] @ movhi
-.L1862:
- ldrh r0, [r5, #2968]
+ strhhi r3, [r5, #2976] @ movhi
+.L1881:
+ ldrh r0, [r7, #2972]
movs r1, #1
bl FtlGetLastWrittenPage
movw r8, #61649
- uxth r6, r0
+ uxth r5, r0
adds r0, r0, #1
- strh r0, [r5, #2970] @ movhi
-.L1864:
- sxth r3, r6
+ strh r0, [r7, #2974] @ movhi
+.L1883:
+ sxth r3, r5
cmp r3, #0
- blt .L1869
- ldrh r2, [r5, #2968]
+ blt .L1888
+ ldrh r2, [r7, #2972]
movs r1, #1
- ldr r0, .L1883+8
+ ldr r0, .L1902+8
orr r3, r3, r2, lsl #10
- str r3, [r4, #4052]
- ldr r3, [r4, #756]
- mov r2, r1
str r3, [r4, #4056]
+ ldr r3, [r4, #1776]
+ mov r2, r1
+ str r3, [r4, #4060]
bl FlashReadPages
- ldr r3, [r4, #4048]
+ ldr r3, [r4, #4052]
adds r3, r3, #1
- beq .L1865
- ldrh r3, [r7]
+ beq .L1884
+ ldrh r3, [r6]
cmp r3, r8
- bne .L1865
-.L1869:
- ldrh r2, [r7, #10]
- ldrh r0, [r7, #12]
- ldr r3, .L1883+4
- strh r2, [r5, #2974] @ movhi
+ bne .L1884
+.L1888:
+ ldrh r2, [r6, #10]
+ ldrh r0, [r6, #12]
+ ldr r3, .L1902+4
+ strh r2, [r7, #2978] @ movhi
movw r2, #65535
cmp r0, r2
- bne .L1866
- b .L1867
-.L1865:
- subs r6, r6, #1
- uxth r6, r6
- b .L1864
-.L1866:
- ldr r2, [r3, #2824]
+ bne .L1885
+ b .L1886
+.L1884:
+ subs r5, r5, #1
+ uxth r5, r5
+ b .L1883
+.L1885:
+ ldr r2, [r3, #2836]
cmp r0, r2
- beq .L1867
- ldrh r3, [r3, #2838]
+ beq .L1886
+ ldrh r3, [r3, #2850]
lsrs r3, r3, #2
cmp r2, r3
- bcs .L1867
+ bcs .L1886
cmp r0, r3
- bcs .L1867
+ bcs .L1886
bl FtlSysBlkNumInit
-.L1867:
- ldr r7, .L1883+12
- movs r6, #0
-.L1870:
- ldrh r3, [r5, #2850]
- cmp r6, r3
- bcs .L1882
- ldrh r2, [r4, #1860]
- ldr r1, [r4, #4056]
- ldr r0, [r7, #4]!
+.L1886:
+ ldr r6, .L1902+12
+ movs r5, #0
+.L1889:
+ ldrh r3, [r7, #2862]
+ cmp r5, r3
+ bcs .L1901
+ ldrh r2, [r4, #1864]
+ ldr r1, [r4, #4060]
+ ldr r0, [r6, #4]!
lsls r2, r2, #2
- mla r1, r6, r2, r1
+ mla r1, r5, r2, r1
bl ftl_memcpy
- adds r6, r6, #1
- b .L1870
-.L1882:
+ adds r5, r5, #1
+ b .L1889
+.L1901:
movs r0, #0
pop {r4, r5, r6, r7, r8, pc}
-.L1872:
+.L1891:
mov r0, #-1
pop {r4, r5, r6, r7, r8, pc}
-.L1884:
+.L1903:
.align 2
-.L1883:
+.L1902:
.word .LANCHOR2
.word .LANCHOR0
- .word .LANCHOR2+4048
- .word .LANCHOR0+2992
+ .word .LANCHOR2+4052
+ .word .LANCHOR0+2996
.fnend
.size FtlLoadBbt, .-FtlLoadBbt
.align 1
@@ -11667,64 +11781,64 @@ FtlScanSysBlk:
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
movs r6, #0
- ldr r5, .L1970
+ ldr r5, .L1989
.pad #36
sub sp, sp, #36
- ldr r4, .L1970+4
+ ldr r4, .L1989+4
mov r1, r6
- ldr r2, [r5, #2928]
- ldr r0, [r4, #1852]
+ ldr r2, [r5, #2940]
+ ldr r0, [r4, #1856]
mov r9, r4
- strh r6, [r5, #2946] @ movhi
+ strh r6, [r5, #2954] @ movhi
lsls r2, r2, #2
- strh r6, [r4, #1908] @ movhi
+ strh r6, [r4, #1912] @ movhi
bl ftl_memset
- ldr r2, [r5, #2928]
+ ldr r2, [r5, #2940]
mov r1, r6
- ldr r0, [r4, #1824]
+ ldr r0, [r4, #1828]
lsls r2, r2, #1
bl ftl_memset
- ldrh r2, [r5, #2920]
+ ldrh r2, [r5, #2932]
mov r1, r6
- ldr r0, [r4, #1836]
+ ldr r0, [r4, #1840]
lsls r2, r2, #2
bl ftl_memset
- ldrh r2, [r5, #2920]
- ldr r0, [r5, #2948]
+ ldrh r2, [r5, #2932]
+ ldr r0, [r5, #2956]
mov r1, r6
lsls r2, r2, #1
bl ftl_memset
- add r0, r4, #1064
+ addw r0, r4, #1060
movs r1, #255
movs r2, #12
bl memset
- ldrh r3, [r5, #2836]
+ ldrh r3, [r5, #2848]
str r5, [sp, #12]
mov r5, r4
str r3, [sp, #4]
-.L1886:
- ldr r6, .L1970
+.L1905:
+ ldr r6, .L1989
ldr r2, [sp, #4]
- ldrh r3, [r6, #2838]
+ ldrh r3, [r6, #2850]
mov r0, r6
cmp r3, r2
- bls .L1928
- ldr r1, [r4, #1668]
+ bls .L1947
+ ldr r1, [r4, #1664]
mov r10, #36
- ldrh r8, [r6, #2828]
+ ldrh r8, [r6, #2840]
movs r7, #0
ldr r2, [r4, #1764]
str r1, [sp, #8]
- ldr r3, [r4, #1664]
- ldrh r1, [r6, #2910]
+ ldr r3, [r4, #1660]
+ ldrh r1, [r6, #2922]
str r7, [sp]
str r1, [sp, #16]
- addw r1, r6, #2856
+ addw r1, r6, #2868
str r1, [sp, #20]
-.L1929:
+.L1948:
uxth r1, r7
cmp r1, r8
- bcs .L1965
+ bcs .L1984
str r3, [sp, #28]
ldr r3, [sp, #20]
ldr r1, [sp, #4]
@@ -11735,7 +11849,7 @@ FtlScanSysBlk:
bl FtlBbmIsBadBlock
ldr r2, [sp, #24]
ldr r3, [sp, #28]
- cbnz r0, .L1887
+ cbnz r0, .L1906
ldr r1, [sp]
ldr r6, [sp]
mla r0, r10, r1, r2
@@ -11754,25 +11868,25 @@ FtlScanSysBlk:
adds r1, r1, #1
uxth r1, r1
str r1, [sp]
-.L1887:
+.L1906:
adds r7, r7, #1
- b .L1929
-.L1965:
+ b .L1948
+.L1984:
ldr r3, [sp]
cmp r3, #0
- beq .L1891
+ beq .L1910
+ ldr r8, .L1989
mov r1, r3
ldr r0, [r4, #1764]
movs r2, #1
- ldr r8, .L1970
bl FlashReadPages
movs r3, #0
str r3, [sp, #8]
-.L1892:
+.L1911:
ldrh r3, [sp, #8]
ldr r2, [sp]
cmp r3, r2
- bcs .L1891
+ bcs .L1910
ldr r3, [sp, #8]
mov r10, #36
mul r10, r10, r3
@@ -11783,10 +11897,10 @@ FtlScanSysBlk:
adds r3, r3, #1
ldr r7, [r2, #12]
ubfx r6, r6, #10, #16
- bne .L1894
+ bne .L1913
mov fp, #16
movw r3, #65535
-.L1893:
+.L1912:
ldr r0, [r4, #1764]
movs r1, #1
str r3, [sp, #16]
@@ -11799,69 +11913,69 @@ FtlScanSysBlk:
ldrh r2, [r7]
ldr r3, [sp, #16]
cmp r2, r3
- bne .L1895
+ bne .L1914
ldr r3, [r9, #1764]
mov r2, #-1
str r2, [r3, r10]
- b .L1894
-.L1895:
+ b .L1913
+.L1914:
ldr r2, [r5, #1764]
ldr r2, [r2, r10]
adds r2, r2, #1
- bne .L1894
+ bne .L1913
add fp, fp, #-1
uxth fp, fp
cmp fp, #0
- bne .L1893
-.L1894:
+ bne .L1912
+.L1913:
ldr r3, [r5, #1764]
ldr r3, [r3, r10]
adds r3, r3, #1
- beq .L1897
- ldr r2, [r5, #984]
+ beq .L1916
+ ldr r2, [r5, #1028]
ldr r3, [r7, #4]
adds r1, r2, #1
- beq .L1898
+ beq .L1917
cmp r2, r3
- bhi .L1899
-.L1898:
+ bhi .L1918
+.L1917:
adds r2, r3, #1
itt ne
addne r2, r3, #1
- strne r2, [r9, #984]
-.L1899:
+ strne r2, [r9, #1028]
+.L1918:
ldrh r2, [r7]
movw r1, #61604
cmp r2, r1
- beq .L1901
- bhi .L1902
+ beq .L1920
+ bhi .L1921
movw r3, #61574
cmp r2, r3
- bne .L1900
+ bne .L1919
ldr r3, [sp, #12]
ldr r2, [sp, #12]
- ldrh r10, [r3, #2920]
- ldrh r0, [r2, #2946]
- ldr r2, [r9, #1836]
+ ldrh r10, [r3, #2932]
+ ldrh r0, [r2, #2954]
+ ldr r2, [r9, #1840]
add lr, r10, #-1
uxth r3, lr
rsb lr, r0, lr
str r2, [sp, #16]
- b .L1915
-.L1902:
+ b .L1934
+.L1921:
movw r3, #61634
cmp r2, r3
- beq .L1904
+ beq .L1923
movw r3, #65535
cmp r2, r3
- bne .L1900
+ bne .L1919
mov r0, r6
- b .L1964
-.L1904:
+ b .L1983
+.L1923:
ldr r3, [sp, #12]
- ldrh r0, [r4, #1908]
- ldr r2, [r4, #1852]
- ldr r1, [r3, #2928]
+ ldrh r0, [r4, #1912]
+ ldr r2, [r4, #1856]
+ ldr r1, [r3, #2940]
str r2, [sp, #16]
uxth lr, r1
add r3, lr, #-1
@@ -11869,279 +11983,279 @@ FtlScanSysBlk:
add lr, lr, #-1
uxth r3, r3
sxth lr, lr
-.L1906:
+.L1925:
sxth ip, r3
cmp ip, lr
- ble .L1966
+ ble .L1985
ldr r2, [r7, #4]
lsl fp, ip, #2
mov r10, r2
ldr r2, [sp, #16]
ldr r2, [r2, ip, lsl #2]
cmp r10, r2
- bls .L1907
+ bls .L1926
ldr r2, [sp, #16]
ldr r2, [r2]
- cbnz r2, .L1908
+ cbnz r2, .L1927
cmp r0, r1
itt ne
addne r0, r0, #1
- strhne r0, [r9, #1908] @ movhi
-.L1908:
+ strhne r0, [r9, #1912] @ movhi
+.L1927:
movs r1, #0
uxth lr, r3
-.L1909:
+.L1928:
uxth r2, r1
cmp r2, lr
- bcs .L1967
- ldr r0, [r5, #1852]
+ bcs .L1986
+ ldr r0, [r5, #1856]
sxth r2, r2
adds r1, r1, #1
add r10, r0, r2, lsl #2
ldr r10, [r10, #4]
str r10, [r0, r2, lsl #2]
- ldr r0, [r5, #1824]
+ ldr r0, [r5, #1828]
add r10, r0, r2, lsl #1
ldrh r10, [r10, #2]
strh r10, [r0, r2, lsl #1] @ movhi
- b .L1909
-.L1967:
+ b .L1928
+.L1986:
ldr r1, [r7, #4]
- ldr r2, [r4, #1852]
+ ldr r2, [r4, #1856]
str r1, [r2, fp]
sxth r1, r3
- ldr r2, [r4, #1824]
+ ldr r2, [r4, #1828]
cmp r1, #0
strh r6, [r2, ip, lsl #1] @ movhi
- bge .L1911
- b .L1900
-.L1907:
+ bge .L1930
+ b .L1919
+.L1926:
subs r3, r3, #1
uxth r3, r3
- b .L1906
-.L1966:
+ b .L1925
+.L1985:
cmp ip, #0
- bge .L1942
- b .L1900
-.L1911:
- ldrh r0, [r5, #1908]
- ldr r2, [r8, #2928]
+ bge .L1961
+ b .L1919
+.L1930:
+ ldrh r0, [r5, #1912]
+ ldr r2, [r8, #2940]
subs r2, r2, r0
subs r2, r2, #1
sxth r2, r2
cmp r1, r2
- bgt .L1900
-.L1942:
- ldr r2, [r4, #1852]
+ bgt .L1919
+.L1961:
+ ldr r2, [r4, #1856]
sxth r3, r3
ldr r1, [r7, #4]
adds r0, r0, #1
- strh r0, [r4, #1908] @ movhi
+ strh r0, [r4, #1912] @ movhi
str r1, [r2, r3, lsl #2]
- ldr r2, [r4, #1824]
- b .L1962
-.L1921:
+ ldr r2, [r4, #1828]
+ b .L1981
+.L1940:
ldr r1, [sp, #16]
lsl fp, ip, #2
ldr r2, [r7, #4]
ldr r1, [r1, ip, lsl #2]
cmp r2, r1
- bhi .L1968
+ bhi .L1987
subs r3, r3, #1
uxth r3, r3
-.L1915:
+.L1934:
sxth ip, r3
cmp ip, lr
- bgt .L1921
- b .L1920
-.L1971:
+ bgt .L1940
+ b .L1939
+.L1990:
.align 2
-.L1970:
+.L1989:
.word .LANCHOR0
.word .LANCHOR2
-.L1968:
+.L1987:
ldr r2, [sp, #16]
ldr r2, [r2]
- cbnz r2, .L1917
+ cbnz r2, .L1936
cmp r0, r10
itt ne
addne r0, r0, #1
- strhne r0, [r8, #2946] @ movhi
-.L1917:
+ strhne r0, [r8, #2954] @ movhi
+.L1936:
movs r1, #0
uxth lr, r3
-.L1918:
+.L1937:
uxth r2, r1
cmp r2, lr
- bcs .L1969
- ldr r0, [r4, #1836]
+ bcs .L1988
+ ldr r0, [r4, #1840]
sxth r2, r2
adds r1, r1, #1
add r10, r0, r2, lsl #2
ldr r10, [r10, #4]
str r10, [r0, r2, lsl #2]
- ldr r0, [r8, #2948]
+ ldr r0, [r8, #2956]
add r10, r0, r2, lsl #1
ldrh r10, [r10, #2]
strh r10, [r0, r2, lsl #1] @ movhi
- b .L1918
-.L1969:
- ldr r2, [r5, #1836]
+ b .L1937
+.L1988:
+ ldr r2, [r5, #1840]
ldr r1, [r7, #4]
str r1, [r2, fp]
- ldr r2, .L1972
- ldr r2, [r2, #2948]
+ ldr r2, .L1991
+ ldr r2, [r2, #2956]
strh r6, [r2, ip, lsl #1] @ movhi
-.L1920:
+.L1939:
sxth r3, r3
cmp r3, #0
- blt .L1900
- ldrh r2, [r8, #2920]
- ldrh r1, [r8, #2946]
+ blt .L1919
+ ldrh r2, [r8, #2932]
+ ldrh r1, [r8, #2954]
subs r2, r2, #1
subs r2, r2, r1
sxth r2, r2
cmp r3, r2
- bgt .L1900
+ bgt .L1919
adds r1, r1, #1
- ldr r2, [r9, #1836]
- strh r1, [r8, #2946] @ movhi
+ ldr r2, [r9, #1840]
+ strh r1, [r8, #2954] @ movhi
ldr r1, [r7, #4]
str r1, [r2, r3, lsl #2]
- ldr r2, [r8, #2948]
-.L1962:
+ ldr r2, [r8, #2956]
+.L1981:
strh r6, [r2, r3, lsl #1] @ movhi
- b .L1900
-.L1901:
- ldrh r1, [r9, #1064]
+ b .L1919
+.L1920:
+ ldrh r1, [r9, #1060]
movw r2, #65535
cmp r1, r2
- bne .L1922
- strh r6, [r5, #1064] @ movhi
- b .L1963
-.L1922:
- ldrh r0, [r5, #1068]
+ bne .L1941
+ strh r6, [r5, #1060] @ movhi
+ b .L1982
+.L1941:
+ ldrh r0, [r5, #1064]
cmp r0, r2
- beq .L1923
+ beq .L1942
movs r1, #1
bl FtlFreeSysBlkQueueIn
-.L1923:
- ldr r2, [r9, #1072]
+.L1942:
+ ldr r2, [r9, #1068]
ldr r3, [r7, #4]
cmp r2, r3
- bcs .L1924
- ldrh r3, [r5, #1064]
- strh r6, [r5, #1064] @ movhi
- strh r3, [r5, #1068] @ movhi
+ bcs .L1943
+ ldrh r3, [r5, #1060]
+ strh r6, [r5, #1060] @ movhi
+ strh r3, [r5, #1064] @ movhi
ldr r3, [r7, #4]
-.L1963:
- str r3, [r5, #1072]
- b .L1900
-.L1924:
- strh r6, [r5, #1068] @ movhi
- b .L1900
-.L1897:
+.L1982:
+ str r3, [r5, #1068]
+ b .L1919
+.L1943:
+ strh r6, [r5, #1064] @ movhi
+ b .L1919
+.L1916:
ldrb r1, [r8, #76] @ zero_extendqisi2
mov r0, r6
- cbz r1, .L1925
-.L1964:
+ cbz r1, .L1944
+.L1983:
movs r1, #0
-.L1925:
+.L1944:
bl FtlFreeSysBlkQueueIn
-.L1900:
+.L1919:
ldr r3, [sp, #8]
adds r3, r3, #1
str r3, [sp, #8]
- b .L1892
-.L1891:
+ b .L1911
+.L1910:
ldr r6, [sp, #4]
adds r6, r6, #1
uxth r3, r6
str r3, [sp, #4]
- b .L1886
-.L1928:
- ldr r3, .L1972+4
- ldr r5, [r3, #1824]
+ b .L1905
+.L1947:
+ ldr r3, .L1991+4
+ ldr r5, [r3, #1828]
ldrh r2, [r5]
- cbz r2, .L1930
-.L1933:
- ldr r5, [r0, #2948]
- ldr r3, .L1972
+ cbz r2, .L1949
+.L1952:
+ ldr r5, [r0, #2956]
+ ldr r3, .L1991
ldrh r2, [r5]
- cbz r2, .L1931
- b .L1954
-.L1930:
- ldrh r3, [r3, #1908]
+ cbz r2, .L1950
+ b .L1973
+.L1949:
+ ldrh r3, [r3, #1912]
cmp r3, #0
- beq .L1933
- ldr r6, [r6, #2928]
-.L1934:
+ beq .L1952
+ ldr r6, [r6, #2940]
+.L1953:
uxth r3, r2
sxth r1, r3
cmp r1, r6
- bcs .L1933
+ bcs .L1952
ldrh r7, [r5, r1, lsl #1]
adds r2, r2, #1
cmp r7, #0
- beq .L1934
+ beq .L1953
mov lr, #0
-.L1935:
- ldr r5, [r0, #2928]
+.L1954:
+ ldr r5, [r0, #2940]
sxth r2, r3
cmp r2, r5
- bcs .L1933
- ldr r5, [r4, #1824]
+ bcs .L1952
+ ldr r5, [r4, #1828]
subs r6, r2, r1
adds r3, r3, #1
ldrh r7, [r5, r2, lsl #1]
uxth r3, r3
strh r7, [r5, r6, lsl #1] @ movhi
- ldr r5, [r4, #1852]
+ ldr r5, [r4, #1856]
ldr r7, [r5, r2, lsl #2]
str r7, [r5, r6, lsl #2]
- ldr r5, [r4, #1824]
+ ldr r5, [r4, #1828]
strh lr, [r5, r2, lsl #1] @ movhi
- b .L1935
-.L1931:
- ldrh r1, [r3, #2946]
- cbz r1, .L1954
- ldrh r6, [r3, #2920]
-.L1938:
+ b .L1954
+.L1950:
+ ldrh r1, [r3, #2954]
+ cbz r1, .L1973
+ ldrh r6, [r3, #2932]
+.L1957:
uxth r3, r2
sxth r1, r3
cmp r1, r6
- bge .L1954
+ bge .L1973
ldrh r7, [r5, r1, lsl #1]
adds r2, r2, #1
cmp r7, #0
- beq .L1938
- ldr r5, .L1972
+ beq .L1957
+ ldr r5, .L1991
mov ip, #0
-.L1939:
- ldrh r6, [r0, #2920]
+.L1958:
+ ldrh r6, [r0, #2932]
sxth r2, r3
cmp r2, r6
- bge .L1954
- ldr r6, [r5, #2948]
+ bge .L1973
+ ldr r6, [r5, #2956]
rsb lr, r1, r2
adds r3, r3, #1
ldrh r7, [r6, r2, lsl #1]
uxth r3, r3
strh r7, [r6, lr, lsl #1] @ movhi
- ldr r6, [r4, #1836]
+ ldr r6, [r4, #1840]
ldr r7, [r6, r2, lsl #2]
str r7, [r6, lr, lsl #2]
- ldr r6, [r5, #2948]
+ ldr r6, [r5, #2956]
strh ip, [r6, r2, lsl #1] @ movhi
- b .L1939
-.L1954:
+ b .L1958
+.L1973:
movs r0, #0
add sp, sp, #36
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L1973:
+.L1992:
.align 2
-.L1972:
+.L1991:
.word .LANCHOR0
.word .LANCHOR2
.fnend
@@ -12158,215 +12272,215 @@ FtlLoadSysInfo:
push {r4, r5, r6, r7, r8, lr}
.save {r4, r5, r6, r7, r8, lr}
movs r1, #0
- ldr r6, .L1993
- ldr r5, .L1993+4
- ldrh r2, [r6, #2836]
- ldr r3, [r5, #1796]
- ldr r0, [r5, #768]
+ ldr r6, .L2012
+ ldr r5, .L2012+4
+ ldrh r2, [r6, #2848]
+ ldr r3, [r5, #1800]
+ ldr r0, [r5, #816]
lsls r2, r2, #1
- str r1, [r5, #4056]
- str r3, [r5, #4060]
+ str r1, [r5, #4060]
+ str r3, [r5, #4064]
bl ftl_memset
- ldrh r0, [r5, #1064]
+ ldrh r0, [r5, #1060]
movw r2, #65535
cmp r0, r2
- bne .L1975
-.L1983:
+ bne .L1994
+.L2002:
mov r0, #-1
pop {r4, r5, r6, r7, r8, pc}
-.L1975:
+.L1994:
movs r1, #1
- ldr r8, .L1993+12
+ ldr r8, .L2012+12
bl FtlGetLastWrittenPage
mov r7, r5
uxth r4, r0
adds r0, r0, #1
- strh r0, [r5, #1066] @ movhi
-.L1977:
+ strh r0, [r5, #1062] @ movhi
+.L1996:
sxth r3, r4
cmp r3, #0
- blt .L1982
- ldrh r2, [r5, #1064]
+ blt .L2001
+ ldrh r2, [r5, #1060]
movs r1, #1
- ldr r0, .L1993+8
+ ldr r0, .L2012+8
orr r3, r3, r2, lsl #10
- str r3, [r5, #4052]
- ldr r3, [r5, #756]
- mov r2, r1
str r3, [r5, #4056]
+ ldr r3, [r5, #1776]
+ mov r2, r1
+ str r3, [r5, #4060]
bl FlashReadPages
- ldr r3, [r5, #4048]
+ ldr r3, [r5, #4052]
adds r3, r3, #1
- beq .L1978
- ldr r3, [r7, #756]
+ beq .L1997
+ ldr r3, [r7, #1776]
ldr r3, [r3]
cmp r3, r8
- bne .L1978
- ldr r3, [r7, #1796]
+ bne .L1997
+ ldr r3, [r7, #1800]
ldrh r2, [r3]
movw r3, #61604
cmp r2, r3
- bne .L1978
-.L1982:
- ldr r4, .L1993+4
+ bne .L1997
+.L2001:
+ ldr r4, .L2012+4
movs r2, #48
- ldr r1, [r5, #4056]
- add r0, r4, #1012
- ldr r7, .L1993
+ ldr r1, [r5, #4060]
+ add r0, r4, #760
+ ldr r7, .L2012
bl ftl_memcpy
- ldrh r2, [r6, #2836]
- ldr r1, [r5, #4056]
- ldr r0, [r5, #768]
+ ldrh r2, [r6, #2848]
+ ldr r1, [r5, #4060]
+ ldr r0, [r5, #816]
adds r1, r1, #48
lsls r2, r2, #1
bl ftl_memcpy
- ldrh r2, [r6, #2836]
- ldr r3, [r5, #4056]
+ ldrh r2, [r6, #2848]
+ ldr r3, [r5, #4060]
add r1, r2, #24
- ldr r0, [r5, #944]
+ ldr r0, [r5, #992]
ubfx r1, r1, #1, #30
lsrs r2, r2, #3
adds r2, r2, #4
add r1, r3, r1, lsl #2
bl ftl_memcpy
- ldrh r3, [r6, #2944]
- cbz r3, .L1980
- ldrh r2, [r7, #2836]
- ldr r1, [r4, #4056]
- ldr r0, [r4, #1848]
+ ldrh r3, [r6, #2952]
+ cbz r3, .L1999
+ ldrh r2, [r7, #2848]
+ ldr r1, [r4, #4060]
+ ldr r0, [r4, #1852]
lsrs r3, r2, #3
add r3, r3, r2, lsl #1
- ldrh r2, [r7, #2936]
+ ldrh r2, [r7, #2948]
adds r3, r3, #52
ubfx r3, r3, #2, #14
lsls r2, r2, #2
add r1, r1, r3, lsl #2
bl ftl_memcpy
- b .L1980
-.L1978:
+ b .L1999
+.L1997:
subs r4, r4, #1
uxth r4, r4
- b .L1977
-.L1980:
- ldr r2, [r5, #1012]
- ldr r3, .L1993+12
- ldr r4, .L1993+4
+ b .L1996
+.L1999:
+ ldr r2, [r5, #760]
+ ldr r3, .L2012+12
+ ldr r4, .L2012+4
cmp r2, r3
- bne .L1983
- ldrb r0, [r4, #1022] @ zero_extendqisi2
- ldrh r1, [r6, #2850]
- ldrh r2, [r4, #1020]
+ bne .L2002
+ ldrb r0, [r4, #770] @ zero_extendqisi2
+ ldrh r1, [r6, #2862]
+ ldrh r2, [r4, #768]
cmp r0, r1
- ldr r3, .L1993
- strh r2, [r4, #1070] @ movhi
- bne .L1983
- ldrh r1, [r3, #2898]
- ldrh r0, [r3, #2904]
- str r2, [r4, #4084]
+ ldr r3, .L2012
+ strh r2, [r4, #1066] @ movhi
+ bne .L2002
+ ldrh r1, [r3, #2910]
+ ldrh r0, [r3, #2916]
+ str r2, [r4, #4088]
muls r1, r2, r1
- str r1, [r3, #2960]
+ str r1, [r3, #2968]
muls r1, r0, r1
- ldrh r0, [r3, #2974]
- str r1, [r3, #2940]
- ldr r1, [r3, #2840]
+ ldrh r0, [r3, #2978]
+ str r1, [r3, #1896]
+ ldr r1, [r3, #2852]
subs r0, r1, r0
- ldrh r1, [r3, #2828]
+ ldrh r1, [r3, #2840]
subs r0, r0, r2
bl __aeabi_uidiv
- ldrh r3, [r4, #1028]
- ldrh r1, [r4, #1026]
+ ldrh r3, [r4, #776]
+ ldrh r1, [r4, #774]
lsrs r2, r3, #6
- strh r2, [r4, #790] @ movhi
- ldrh r2, [r4, #1030]
+ strh r2, [r4, #838] @ movhi
+ ldrh r2, [r4, #778]
and r3, r3, #63
- strb r3, [r4, #794]
- ldrb r3, [r4, #1023] @ zero_extendqisi2
- strh r2, [r4, #836] @ movhi
- ldrh r2, [r4, #1032]
- strb r3, [r4, #796]
+ strb r3, [r4, #842]
+ ldrb r3, [r4, #771] @ zero_extendqisi2
+ strh r2, [r4, #884] @ movhi
+ ldrh r2, [r4, #780]
+ strb r3, [r4, #844]
movw r3, #65535
- strh r1, [r4, #788] @ movhi
- strh r3, [r4, #1076] @ movhi
+ strh r1, [r4, #836] @ movhi
+ strh r3, [r4, #1072] @ movhi
movs r3, #0
- strh r3, [r4, #1078] @ movhi
- strb r3, [r4, #1082]
- strb r3, [r4, #1084]
- str r3, [r4, #972]
- strh r0, [r4, #1060] @ movhi
- lsrs r0, r2, #6
- and r2, r2, #63
- strb r2, [r4, #842]
- ldrb r2, [r4, #1024] @ zero_extendqisi2
- strh r0, [r4, #838] @ movhi
- strb r2, [r4, #844]
- ldrh r2, [r4, #1034]
- strh r2, [r4, #884] @ movhi
- ldrh r2, [r4, #1036]
+ strh r3, [r4, #1074] @ movhi
+ strb r3, [r4, #1078]
+ strb r3, [r4, #1080]
+ str r3, [r4, #1016]
+ strh r0, [r4, #1056] @ movhi
lsrs r0, r2, #6
and r2, r2, #63
strb r2, [r4, #890]
- ldrb r2, [r4, #1025] @ zero_extendqisi2
+ ldrb r2, [r4, #772] @ zero_extendqisi2
strh r0, [r4, #886] @ movhi
strb r2, [r4, #892]
- str r3, [r4, #960]
- ldr r2, [r4, #1044]
- str r3, [r4, #952]
- str r3, [r4, #968]
- str r3, [r4, #996]
+ ldrh r2, [r4, #782]
+ strh r2, [r4, #932] @ movhi
+ ldrh r2, [r4, #784]
+ lsrs r0, r2, #6
+ and r2, r2, #63
+ strb r2, [r4, #938]
+ ldrb r2, [r4, #773] @ zero_extendqisi2
+ strh r0, [r4, #934] @ movhi
+ strb r2, [r4, #940]
str r3, [r4, #1004]
- str r3, [r4, #964]
- ldr r3, [r4, #1052]
- str r2, [r4, #992]
- ldr r2, [r4, #984]
+ ldr r2, [r4, #792]
+ str r3, [r4, #996]
+ str r3, [r4, #1012]
+ str r3, [r4, #1040]
+ str r3, [r4, #1048]
+ str r3, [r4, #1008]
+ ldr r3, [r4, #800]
+ str r2, [r4, #1036]
+ ldr r2, [r4, #1028]
cmp r3, r2
- ldr r2, [r5, #988]
+ ldr r2, [r5, #1032]
it hi
- strhi r3, [r4, #984]
- ldr r3, [r5, #1048]
+ strhi r3, [r4, #1028]
+ ldr r3, [r5, #796]
cmp r3, r2
itt hi
- ldrhi r2, .L1993+4
- strhi r3, [r2, #988]
+ ldrhi r2, .L2012+4
+ strhi r3, [r2, #1032]
movw r3, #65535
cmp r1, r3
- beq .L1986
- ldr r0, .L1993+16
+ beq .L2005
+ ldr r0, .L2012+16
bl make_superblock
-.L1986:
- ldrh r2, [r5, #836]
+.L2005:
+ ldrh r2, [r5, #884]
movw r3, #65535
cmp r2, r3
- beq .L1987
- ldr r0, .L1993+20
+ beq .L2006
+ ldr r0, .L2012+20
bl make_superblock
-.L1987:
- ldrh r2, [r5, #884]
+.L2006:
+ ldrh r2, [r5, #932]
movw r3, #65535
cmp r2, r3
- beq .L1988
- ldr r0, .L1993+24
+ beq .L2007
+ ldr r0, .L2012+24
bl make_superblock
-.L1988:
- ldrh r2, [r5, #1076]
+.L2007:
+ ldrh r2, [r5, #1072]
movw r3, #65535
cmp r2, r3
- beq .L1989
- ldr r0, .L1993+28
+ beq .L2008
+ ldr r0, .L2012+28
bl make_superblock
-.L1989:
+.L2008:
movs r0, #0
pop {r4, r5, r6, r7, r8, pc}
-.L1994:
+.L2013:
.align 2
-.L1993:
+.L2012:
.word .LANCHOR0
.word .LANCHOR2
- .word .LANCHOR2+4048
+ .word .LANCHOR2+4052
.word 1179929683
- .word .LANCHOR2+788
.word .LANCHOR2+836
.word .LANCHOR2+884
- .word .LANCHOR2+1076
+ .word .LANCHOR2+932
+ .word .LANCHOR2+1072
.fnend
.size FtlLoadSysInfo, .-FtlLoadSysInfo
.align 1
@@ -12378,67 +12492,65 @@ FtlGcScanTempBlk:
.fnstart
@ args = 0, pretend = 0, frame = 24
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L2029
+ ldr r3, .L2048
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.pad #28
sub sp, sp, #28
- ldrh r4, [r3, #3000]
+ ldrh r4, [r3, #3064]
movw r3, #65535
mov r5, r0
str r1, [sp, #12]
cmp r4, r3
- beq .L2018
- cbnz r4, .L1996
- b .L1997
-.L2018:
+ beq .L2037
+ cbnz r4, .L2015
+ b .L2016
+.L2037:
movs r4, #0
-.L1996:
- ldr r3, .L2029+4
+.L2015:
+ ldr r3, .L2048+4
ldr r2, [sp, #12]
- ldrh r3, [r3, #2898]
+ ldrh r3, [r3, #2910]
cmp r2, r3
- bne .L1998
-.L1997:
+ bne .L2017
+.L2016:
bl FtlGcPageVarInit
-.L1998:
- ldr r7, .L2029+8
+.L2017:
+ ldr r7, .L2048+8
mov r10, #0
mov r3, #-1
str r3, [sp, #4]
- mov r9, r7
-.L2012:
+.L2031:
ldrh r1, [r5]
movw r3, #65535
movs r2, #0
strb r2, [r5, #8]
cmp r1, r3
- beq .L1999
-.L2000:
-.L2015:
- ldr r3, .L2029+4
+ beq .L2018
+.L2019:
+ ldr r9, .L2048+4
+.L2034:
+ ldr r3, [r7, #1664]
movs r2, #0
- ldr fp, [r7, #1764]
+ ldrh r8, [r9, #2840]
mov ip, #36
+ ldr fp, [r7, #1764]
mov r6, r2
- movw lr, #65535
- ldrh r8, [r3, #2828]
- ldr r3, [r7, #1668]
str r3, [sp, #16]
- ldr r3, .L2029+4
- ldrh r3, [r3, #2910]
+ movw lr, #65535
+ ldrh r3, [r9, #2922]
str r3, [sp, #20]
add r3, r5, #14
str r3, [sp, #8]
-.L2001:
+.L2020:
uxth r3, r2
cmp r3, r8
- bcs .L2027
+ bcs .L2046
ldr r1, [sp, #8]
ldrh r3, [r1, #2]!
cmp r3, lr
str r1, [sp, #8]
- beq .L2002
+ beq .L2021
mla r1, ip, r6, fp
orr r3, r4, r3, lsl #10
str r3, [r1, #4]
@@ -12455,22 +12567,22 @@ FtlGcScanTempBlk:
ldr r3, [sp, #16]
add r0, r0, r3
str r0, [r1, #12]
-.L2002:
+.L2021:
adds r2, r2, #1
- b .L2001
-.L2027:
+ b .L2020
+.L2046:
ldr r0, [r7, #1764]
mov r1, r6
movs r2, #0
mov fp, #0
bl FlashReadPages
-.L2005:
+.L2024:
uxth r3, fp
cmp r3, r6
- bcs .L2028
+ bcs .L2047
movs r3, #36
mul r8, r3, fp
- ldr r3, .L2029+8
+ ldr r3, .L2048+8
ldr ip, [r3, #1764]
add r1, ip, r8
str r1, [sp, #16]
@@ -12480,111 +12592,110 @@ FtlGcScanTempBlk:
str r3, [sp, #8]
bl P2V_plane
ldr ip, [sp, #20]
- mov r2, r0
ldr r3, [sp, #8]
+ mov r2, r0
ldr r0, [ip, r8]
- cbnz r0, .L2006
+ cbnz r0, .L2025
ldr r1, [sp, #16]
movw r0, #65535
add fp, fp, #1
ldr lr, [r1, #12]
ldrh r1, [lr]
cmp r1, r0
- bne .L2007
- ldr r3, .L2029+8
+ bne .L2026
+ ldr r3, .L2048+8
movs r1, #1
- str r1, [r3, #1924]
- b .L1999
-.L2007:
+ str r1, [r3, #1928]
+ b .L2018
+.L2026:
ldr r0, [lr, #12]
mov r1, r3
ldr r2, [lr, #8]
bl FtlGcUpdatePage
- b .L2005
-.L2006:
+ b .L2024
+.L2025:
mov r2, r3
- ldr r0, .L2029+12
ldrh r1, [r5]
+ ldr r0, .L2048+12
bl printk
- ldr r2, [r9, #948]
+ ldr r2, .L2048+4
ldrh r3, [r5]
- cbnz r2, .L2008
- ldr r2, .L2029+4
+ ldr r1, [r2, #2832]
+ cbnz r1, .L2027
ldrb r2, [r2, #76] @ zero_extendqisi2
- cbz r2, .L2009
-.L2008:
- ldr r2, [r7, #748]
+ cbz r2, .L2028
+.L2027:
+ ldr r2, [r7, #752]
ldrh r2, [r2, r3, lsl #1]
cmp r2, #119
- bls .L2010
-.L2009:
+ bls .L2029
+.L2028:
ldr r2, [r7, #1764]
ldr r2, [r2, r8]
adds r2, r2, #1
- bne .L2011
-.L2010:
+ bne .L2030
+.L2029:
ldr r2, [r7, #1764]
add r8, r8, r2
ldr r2, [r8, #4]
str r2, [sp, #4]
-.L2011:
- ldr r2, [r9, #768]
+.L2030:
+ ldr r2, .L2048+8
movs r4, #0
+ ldr r2, [r2, #816]
strh r4, [r2, r3, lsl #1] @ movhi
ldrh r0, [r5]
bl INSERT_FREE_LIST
movw r3, #65535
strh r3, [r5] @ movhi
bl FtlGcPageVarInit
- b .L2012
-.L2028:
+ b .L2031
+.L2047:
ldr r3, [sp, #12]
add r10, r10, #1
adds r4, r4, #1
cmp r10, r3
uxth r4, r4
- bcs .L2014
-.L2016:
- ldr r3, .L2029+4
- ldrh r3, [r3, #2898]
+ bcs .L2033
+.L2035:
+ ldrh r3, [r9, #2910]
cmp r3, r4
- bhi .L2015
+ bhi .L2034
movs r2, #0
- b .L1999
-.L2014:
- ldr r2, .L2029
+ b .L2018
+.L2033:
+ ldr r2, .L2048
movw r1, #65535
- ldrh r3, [r2, #3000]
+ ldrh r3, [r2, #3064]
cmp r3, r1
- beq .L2016
+ beq .L2035
add r3, r3, r10
- strh r3, [r2, #3000] @ movhi
- ldr r3, .L2029+4
- ldrh r3, [r3, #2898]
+ strh r3, [r2, #3064] @ movhi
+ ldrh r3, [r9, #2910]
cmp r3, r4
- bls .L2016
- b .L2017
-.L1999:
- ldr r3, .L2029
+ bls .L2035
+ b .L2036
+.L2018:
+ ldr r3, .L2048
movw r1, #65535
strh r4, [r5, #2] @ movhi
mov r0, r5
strb r2, [r5, #6]
- strh r1, [r3, #3000] @ movhi
+ strh r1, [r3, #3064] @ movhi
mov r1, r4
bl ftl_sb_update_avl_pages
-.L2017:
+.L2036:
ldr r0, [sp, #4]
add sp, sp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L2030:
+.L2049:
.align 2
-.L2029:
+.L2048:
.word .LANCHOR1
.word .LANCHOR0
.word .LANCHOR2
- .word .LC105
+ .word .LC108
.fnend
.size FtlGcScanTempBlk, .-FtlGcScanTempBlk
.align 1
@@ -12600,7 +12711,7 @@ FlashProgPages:
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.pad #76
sub sp, sp, #76
- ldr r5, .L2086
+ ldr r5, .L2105
mov r4, r0
str r1, [sp, #8]
mov r9, r2
@@ -12609,13 +12720,13 @@ FlashProgPages:
ldrb r7, [r5] @ zero_extendqisi2
ldrb r6, [r6, #19] @ zero_extendqisi2
str r6, [sp, #16]
- ldr r6, .L2086+4
+ ldr r6, .L2105+4
ldrb r6, [r6, #265] @ zero_extendqisi2
str r6, [sp, #12]
- cbz r7, .L2032
+ cbz r7, .L2051
bl FlashProgSlc2KPages
- b .L2033
-.L2046:
+ b .L2052
+.L2065:
movs r3, #36
add r2, sp, #28
mov r1, r9
@@ -12628,37 +12739,37 @@ FlashProgPages:
mov r0, fp
add r3, sp, #32
bl LogAddr2PhyAddr
- ldrb r2, [r5, #1616] @ zero_extendqisi2
ldr r3, [sp, #32]
- mov r10, r0
+ ldrb r2, [r5, #1616] @ zero_extendqisi2
cmp r3, r2
- bcc .L2034
+ mov r10, r0
+ bcc .L2053
mov r3, #-1
str r3, [r4, r8]
-.L2035:
+.L2054:
adds r7, r7, #1
-.L2032:
+.L2051:
ldr r3, [sp, #8]
- ldr r6, .L2086
+ ldr r6, .L2105
cmp r7, r3
- bcc .L2046
- b .L2084
-.L2034:
+ bcc .L2065
+ b .L2103
+.L2053:
add r3, r5, r3, lsl #4
- ldrb r1, [r5, #2820] @ zero_extendqisi2
+ ldrb r1, [r5, #2828] @ zero_extendqisi2
ldr r3, [r3, #1668]
cmp r1, #0
it eq
moveq r10, #0
- cbz r3, .L2037
+ cbz r3, .L2056
cmp r2, #1
- bne .L2038
+ bne .L2057
ldr r0, [r5, #1828]
bl NandcIqrWaitFlashReady
-.L2038:
+.L2057:
ldrb r0, [sp, #32] @ zero_extendqisi2
bl FlashWaitCmdDone
-.L2037:
+.L2056:
ldr r3, [sp, #32]
movs r0, #0
add r2, r5, r3, lsl #4
@@ -12668,11 +12779,11 @@ FlashProgPages:
str fp, [r2, #1668]
str r0, [r2, #1664]
cmp r10, #0
- beq .L2039
+ beq .L2058
add r2, r8, #36
add r2, r2, r4
str r2, [r1, #4]
-.L2039:
+.L2058:
adds r2, r5, r3
add r3, r5, r3, lsl #4
ldrb r6, [r2, #1620] @ zero_extendqisi2
@@ -12680,13 +12791,13 @@ FlashProgPages:
mov r0, r6
ldrb r3, [r5, #1616] @ zero_extendqisi2
cmp r3, #1
- bne .L2040
+ bne .L2059
bl NandcWaitFlashReady
- b .L2041
-.L2040:
+ b .L2060
+.L2059:
bl NandcFlashCs
- mov r0, r6
ldr r3, [sp, #32]
+ mov r0, r6
ldr r1, [sp, #28]
add r3, r5, r3, lsl #2
ldr r2, [r3, #1628]
@@ -12696,139 +12807,139 @@ FlashProgPages:
bl FlashWaitReadyEN
mov r0, r6
bl NandcFlashDeCs
-.L2041:
+.L2060:
ldr r3, [sp, #16]
subs r3, r3, #1
cmp r3, #6
- bhi .L2042
+ bhi .L2061
adds r3, r5, r6
- ldrb r3, [r3, #2756] @ zero_extendqisi2
- cbz r3, .L2042
+ ldrb r3, [r3, #2760] @ zero_extendqisi2
+ cbz r3, .L2061
mov r0, r6
- ldrb r1, [r5, #1903] @ zero_extendqisi2
- ldr r2, .L2086+8
+ ldrb r1, [r5, #1907] @ zero_extendqisi2
+ ldr r2, .L2105+8
movs r3, #0
bl HynixSetRRPara
-.L2042:
+.L2061:
mov r0, r6
bl NandcFlashCs
cmp r9, #1
mov r0, r6
- bne .L2043
+ bne .L2062
ldrb r3, [r5, #76] @ zero_extendqisi2
- cbz r3, .L2043
+ cbz r3, .L2062
bl flash_enter_slc_mode
- b .L2044
-.L2043:
+ b .L2063
+.L2062:
bl flash_exit_slc_mode
-.L2044:
+.L2063:
mov r0, r6
ldr r1, [sp, #28]
bl FlashProgFirstCmd
ldr r3, [fp, #12]
mov r0, r6
movs r1, #1
- str r3, [sp]
ldr r2, [sp, #12]
+ str r3, [sp]
ldr r3, [fp, #8]
bl NandcXferData
cmp r10, #0
- beq .L2045
+ beq .L2064
mov r0, r6
ldr r1, [sp, #28]
bl FlashProgDpFirstCmd
- mov r0, r6
- add r8, r8, #36
- add r8, r8, r4
ldr r3, [sp, #32]
ldr r1, [sp, #28]
+ mov r0, r6
+ add r8, r8, #36
add r3, r5, r3, lsl #2
+ add r8, r8, r4
ldr r2, [r3, #1628]
adds r2, r2, #0
it ne
movne r2, #1
bl FlashWaitReadyEN
+ ldr r3, [sp, #28]
ldr r1, [r5, #4]
mov r0, r6
- ldr r3, [sp, #28]
add r1, r1, r3
bl FlashProgDpSecondCmd
ldr r3, [r8, #12]
mov r0, r6
movs r1, #1
- str r3, [sp]
ldr r2, [sp, #12]
+ str r3, [sp]
ldr r3, [r8, #8]
bl NandcXferData
-.L2045:
+.L2064:
mov r0, r6
ldr r1, [sp, #28]
bl FlashProgSecondCmd
mov r0, r6
bl NandcFlashDeCs
add r7, r7, r10
- b .L2035
-.L2084:
+ b .L2054
+.L2103:
ldr r0, [r6, #1828]
movs r5, #0
bl NandcIqrWaitFlashReady
addw r8, r6, #1660
mov r7, r6
-.L2047:
+.L2066:
ldrb r3, [r6, #1616] @ zero_extendqisi2
cmp r5, r3
- bcs .L2085
+ bcs .L2104
uxtb r0, r5
bl FlashWaitCmdDone
cmp r9, #1
- bne .L2048
+ bne .L2067
ldrb r3, [r7, #76] @ zero_extendqisi2
- cbz r3, .L2048
+ cbz r3, .L2067
lsls r3, r5, #4
ldrb r0, [r8, r3] @ zero_extendqisi2
bl flash_exit_slc_mode
-.L2048:
+.L2067:
adds r5, r5, #1
- b .L2047
-.L2085:
+ b .L2066
+.L2104:
ldr r3, [sp, #20]
- cbnz r3, .L2050
-.L2058:
+ cbnz r3, .L2069
+.L2077:
movs r0, #0
- b .L2033
-.L2050:
- ldr r7, .L2086+12
+ b .L2052
+.L2069:
+ ldr r7, .L2105+12
mov r8, #0
mov r10, r7
-.L2051:
+.L2070:
ldr r3, [sp, #8]
cmp r8, r3
- beq .L2058
+ beq .L2077
ldr r3, [r4]
adds r3, r3, #1
- bne .L2052
+ bne .L2071
ldr r1, [r4, #4]
- ldr r0, .L2086+16
+ ldr r0, .L2105+16
bl printk
- b .L2053
-.L2052:
+ b .L2072
+.L2071:
ldr r3, [sp, #8]
mov r1, r9
add r2, sp, #28
mov r0, r4
rsb r3, r8, r3
mov r6, r4
+ add r5, sp, #36
uxtb r3, r3
str r3, [sp]
add r3, sp, #32
bl LogAddr2PhyAddr
- ldr r2, [r7, #4020]
+ ldr r2, [r7, #4024]
movs r3, #0
str r3, [r2]
- ldr r2, [r7, #4024]
+ ldr r2, [r7, #4028]
str r3, [r2]
ldmia r6!, {r0, r1, r2, r3}
- add r5, sp, #36
stmia r5!, {r0, r1, r2, r3}
ldmia r6!, {r0, r1, r2, r3}
stmia r5!, {r0, r1, r2, r3}
@@ -12837,63 +12948,63 @@ FlashProgPages:
movs r1, #1
mov r2, r9
str r3, [r5]
- ldr r3, [r7, #4020]
- str r3, [sp, #44]
ldr r3, [r7, #4024]
+ str r3, [sp, #44]
+ ldr r3, [r7, #4028]
str r3, [sp, #48]
bl FlashReadPages
ldr r5, [sp, #36]
adds r3, r5, #1
- bne .L2054
- ldr r0, .L2086+20
+ bne .L2073
+ ldr r0, .L2105+20
ldr r1, [r4, #4]
bl printk
str r5, [r4]
-.L2054:
+.L2073:
ldr r3, [r4, #12]
- cbz r3, .L2055
+ cbz r3, .L2074
ldr r2, [r3]
- ldr r3, [r10, #4024]
+ ldr r3, [r10, #4028]
ldr r3, [r3]
cmp r2, r3
- beq .L2055
- ldr r0, .L2086+24
+ beq .L2074
+ ldr r0, .L2105+24
ldr r1, [r4, #4]
bl printk
mov r3, #-1
str r3, [r4]
-.L2055:
+.L2074:
ldr r3, [r4, #8]
- cbz r3, .L2053
+ cbz r3, .L2072
ldr r2, [r3]
- ldr r3, [r10, #4020]
+ ldr r3, [r10, #4024]
ldr r3, [r3]
cmp r2, r3
- beq .L2053
- ldr r0, .L2086+28
+ beq .L2072
+ ldr r0, .L2105+28
ldr r1, [r4, #4]
bl printk
mov r3, #-1
str r3, [r4]
-.L2053:
+.L2072:
add r8, r8, #1
adds r4, r4, #36
- b .L2051
-.L2033:
+ b .L2070
+.L2052:
add sp, sp, #76
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L2087:
+.L2106:
.align 2
-.L2086:
+.L2105:
.word .LANCHOR0
.word .LANCHOR1
- .word .LANCHOR0+1906
+ .word .LANCHOR0+1910
.word .LANCHOR2
- .word .LC101
- .word .LC102
- .word .LC103
.word .LC104
+ .word .LC105
+ .word .LC106
+ .word .LC107
.fnend
.size FlashProgPages, .-FlashProgPages
.align 1
@@ -12905,16 +13016,16 @@ FlashTestBlk:
.fnstart
@ args = 0, pretend = 0, frame = 104
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L2091
+ ldr r3, .L2110
push {r4, r5, lr}
.save {r4, r5, lr}
mov r4, r0
- ldr r2, [r3, #4004]
+ ldr r2, [r3, #4008]
.pad #108
sub sp, sp, #108
cmp r0, r2
- bcc .L2090
- ldr r5, [r3, #4012]
+ bcc .L2109
+ ldr r5, [r3, #4016]
add r0, sp, #40
movs r1, #165
movs r2, #32
@@ -12927,35 +13038,35 @@ FlashTestBlk:
movs r2, #8
bl memset
movs r1, #1
- mov r2, r1
add r0, sp, #4
str r4, [sp, #8]
+ mov r2, r1
bl FlashEraseBlocks
movs r1, #1
+ add r0, sp, #4
mov r2, r1
mov r3, r1
- add r0, sp, #4
bl FlashProgPages
- movs r1, #0
- movs r2, #1
ldr r4, [sp, #4]
add r0, sp, #4
+ movs r1, #0
adds r4, r4, #0
+ mov r2, #1
it ne
movne r4, #1
negs r4, r4
bl FlashEraseBlocks
- b .L2089
-.L2090:
+ b .L2108
+.L2109:
movs r4, #0
-.L2089:
+.L2108:
mov r0, r4
add sp, sp, #108
@ sp needed
pop {r4, r5, pc}
-.L2092:
+.L2111:
.align 2
-.L2091:
+.L2110:
.word .LANCHOR2
.fnend
.size FlashTestBlk, .-FlashTestBlk
@@ -12972,11 +13083,11 @@ FlashMakeFactorBbt:
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.pad #84
sub sp, sp, #84
- ldr r5, .L2151
+ ldr r5, .L2170
movs r1, #1
- ldr r4, .L2151+4
- ldr r0, .L2151+8
- ldr r3, [r5, #4016]
+ ldr r4, .L2170+4
+ ldr r0, .L2170+8
+ ldr r3, [r5, #4020]
ldrh r8, [r4, #1876]
str r3, [sp, #20]
ldrh r3, [r4, #1878]
@@ -12988,7 +13099,7 @@ FlashMakeFactorBbt:
ldrh r3, [r4, #4]
str r3, [sp, #16]
ldrb r3, [r4] @ zero_extendqisi2
- ldr r4, .L2151+4
+ ldr r4, .L2170+4
cmp r3, #1
itttt eq
ldreq r3, [sp, #16]
@@ -12996,46 +13107,46 @@ FlashMakeFactorBbt:
uxtheq r3, r3
streq r3, [sp, #16]
bl printk
- ldr r0, [r5, #4016]
+ ldr r0, [r5, #4020]
+ ldr r5, .L2170
mov r1, #4096
- ldr r5, .L2151
bl __memzero
lsr r3, r8, #4
str r3, [sp, #28]
movs r3, #0
str r3, [sp, #8]
-.L2095:
+.L2114:
ldrb r7, [sp, #8] @ zero_extendqisi2
ldrb r3, [r4, #1616] @ zero_extendqisi2
cmp r3, r7
- bls .L2147
+ bls .L2166
add r3, r5, r7, lsl #1
- ldrh r6, [r3, #4032]
+ ldrh r6, [r3, #4036]
cmp r6, #0
- bne .L2125
+ bne .L2144
ldrh r2, [r4, #1884]
mov r1, r6
- ldr r0, [r5, #3984]
+ ldr r0, [r5, #3988]
mov r9, r6
lsls r2, r2, #9
bl ftl_memset
adds r3, r4, r7
+ str r6, [sp, #4]
ldrb r10, [r3, #1620] @ zero_extendqisi2
lsls r3, r7, #2
add fp, r4, r3
- str r6, [sp, #4]
str r3, [sp, #32]
-.L2097:
+.L2116:
ldrh r3, [sp, #4]
cmp r3, r8
str r3, [sp, #12]
- bcs .L2107
+ bcs .L2126
movs r3, #255
strb r3, [sp, #42]
strb r3, [sp, #43]
ldr r3, [sp, #24]
lsls r1, r3, #31
- bpl .L2099
+ bpl .L2118
ldr r3, [fp, #1628]
add r2, sp, #42
mov r0, r10
@@ -13044,9 +13155,9 @@ FlashMakeFactorBbt:
mov r1, r3
bl FlashReadSpare
ldrb r2, [r4] @ zero_extendqisi2
- cmp r2, #1
ldr r3, [sp, #36]
- bne .L2099
+ cmp r2, #1
+ bne .L2118
ldr r1, [r4, #4]
add r2, sp, #43
mov r0, r10
@@ -13056,10 +13167,10 @@ FlashMakeFactorBbt:
ldrb r2, [sp, #43] @ zero_extendqisi2
ands r3, r3, r2
strb r3, [sp, #42]
-.L2099:
+.L2118:
ldr r3, [sp, #24]
lsls r2, r3, #30
- bpl .L2101
+ bpl .L2120
ldr r3, [r4, #1788]
mov r0, r10
add r2, sp, #43
@@ -13069,51 +13180,51 @@ FlashMakeFactorBbt:
add r1, r1, r3
add r1, r1, r6
bl FlashReadSpare
-.L2101:
+.L2120:
ldr r3, [r4, #1788]
ldrb r2, [r3, #7] @ zero_extendqisi2
ldrb r3, [sp, #42] @ zero_extendqisi2
cmp r2, #1
- beq .L2102
+ beq .L2121
cmp r2, #8
- bne .L2103
-.L2102:
- cbz r3, .L2124
+ bne .L2122
+.L2121:
+ cbz r3, .L2143
ldrb r0, [sp, #43] @ zero_extendqisi2
clz r0, r0
lsrs r0, r0, #5
- b .L2104
-.L2103:
+ b .L2123
+.L2122:
cmp r3, #255
- bne .L2124
+ bne .L2143
ldrb r0, [sp, #43] @ zero_extendqisi2
subs r0, r0, #255
it ne
movne r0, #1
- b .L2104
-.L2124:
+ b .L2123
+.L2143:
movs r0, #1
-.L2104:
+.L2123:
ldr r3, [sp, #24]
lsls r3, r3, #29
- bpl .L2105
- ldr r3, .L2151+4
+ bpl .L2124
+ ldr r3, .L2170+4
mov r0, r10
ldr r2, [sp, #32]
add r3, r3, r2
ldr r1, [r3, #1628]
add r1, r1, r6
bl SandiskProgTestBadBlock
-.L2105:
- cbz r0, .L2106
+.L2124:
+ cbz r0, .L2125
mov r1, r7
ldr r2, [sp, #4]
- ldr r0, .L2151+12
+ ldr r0, .L2170+12
add r9, r9, #1
bl printk
- ldr r2, [r5, #3984]
- uxth r9, r9
ldr r3, [sp, #12]
+ ldr r2, [r5, #3988]
+ uxth r9, r9
and r0, r3, #31
lsrs r1, r3, #5
movs r3, #1
@@ -13125,47 +13236,47 @@ FlashMakeFactorBbt:
ldrb r3, [r4, #1616] @ zero_extendqisi2
muls r3, r2, r3
cmp r9, r3
- bgt .L2107
-.L2106:
+ bgt .L2126
+.L2125:
ldr r3, [sp, #4]
adds r3, r3, #1
str r3, [sp, #4]
ldr r3, [sp, #16]
add r6, r6, r3
- b .L2097
-.L2107:
+ b .L2116
+.L2126:
mov r2, r9
- ldr r0, .L2151+16
+ ldr r0, .L2170+16
mov r1, r7
bl printk
ldrb r3, [r4, #1616] @ zero_extendqisi2
ldr r2, [sp, #28]
muls r3, r2, r3
cmp r9, r3
- blt .L2109
+ blt .L2128
ldrh r2, [r4, #1884]
movs r1, #0
- ldr r0, [r5, #3984]
+ ldr r0, [r5, #3988]
lsls r2, r2, #9
bl ftl_memset
-.L2109:
+.L2128:
cmp r7, #0
- bne .L2111
- ldrh r10, [r5, #4004]
+ bne .L2130
+ ldrh r10, [r5, #4008]
mov r9, #1
mov r6, r7
-.L2112:
- ldr r3, .L2151+4
+.L2131:
+ ldr r3, .L2170+4
ldrb r3, [r3, #1] @ zero_extendqisi2
cmp r3, r10
- bls .L2148
+ bls .L2167
mov r0, r10
bl FlashTestBlk
- cbz r0, .L2113
+ cbz r0, .L2132
mov r1, r10
- ldr r0, .L2151+20
+ ldr r0, .L2170+20
bl printk
- ldr r2, [r5, #3984]
+ ldr r2, [r5, #3988]
lsr r0, r10, #5
adds r6, r6, #1
and r3, r10, #31
@@ -13174,116 +13285,116 @@ FlashMakeFactorBbt:
lsl r3, r9, r3
orrs r3, r3, r1
str r3, [r2, r0, lsl #2]
-.L2113:
+.L2132:
add r10, r10, #1
uxth r10, r10
- b .L2112
-.L2148:
+ b .L2131
+.L2167:
add fp, r8, #-1
sub r9, r8, #50
mov r10, #1
uxth fp, fp
-.L2115:
+.L2134:
cmp fp, r9
- ble .L2149
+ ble .L2168
mov r0, fp
bl FlashTestBlk
- cbz r0, .L2116
+ cbz r0, .L2135
mov r1, fp
- ldr r0, .L2151+20
+ ldr r0, .L2170+20
bl printk
- ldr r2, [r5, #3984]
+ ldr r2, [r5, #3988]
lsr r0, fp, #5
and r3, fp, #31
lsl r3, r10, r3
ldr r1, [r2, r0, lsl #2]
orrs r3, r3, r1
str r3, [r2, r0, lsl #2]
-.L2116:
+.L2135:
add fp, fp, #-1
uxth fp, fp
- b .L2115
-.L2149:
- ldr r3, .L2151+4
- ldr r2, [r5, #4004]
+ b .L2134
+.L2168:
+ ldr r3, .L2170+4
+ ldr r2, [r5, #4008]
ldrb r3, [r3, #1] @ zero_extendqisi2
subs r3, r3, r2
cmp r6, r3
- bcc .L2111
+ bcc .L2130
ldrh r2, [r4, #1884]
movs r1, #0
- ldr r0, [r5, #3984]
+ ldr r0, [r5, #3988]
lsls r2, r2, #9
bl ftl_memset
-.L2111:
+.L2130:
ldrb r6, [sp, #8] @ zero_extendqisi2
add r10, r8, #-1
add r9, r5, r7, lsl #1
uxth r10, r10
mul r6, r8, r6
-.L2119:
+.L2138:
mov r1, r7
- ldr r0, .L2151+24
+ ldr r0, .L2170+24
mov r2, r10
bl printk
- ldr r1, [r5, #3984]
-.L2120:
+ ldr r1, [r5, #3988]
+.L2139:
lsr r3, r10, #5
and r2, r10, #31
ldr r3, [r1, r3, lsl #2]
lsrs r3, r3, r2
ands r3, r3, #1
- beq .L2150
+ beq .L2169
add r10, r10, #-1
uxth r10, r10
- b .L2120
-.L2150:
+ b .L2139
+.L2169:
ldr r1, [sp, #20]
movw r2, #61664
- strh r10, [r9, #4032] @ movhi
+ strh r10, [r9, #4036] @ movhi
add r0, sp, #44
strh r2, [r1] @ movhi
strh r10, [r1, #2] @ movhi
strh r3, [r1, #8] @ movhi
movs r1, #1
- ldr r3, [r5, #3984]
+ ldr r3, [r5, #3988]
mov r2, r1
str r3, [sp, #52]
- ldr r3, [r5, #4016]
+ ldr r3, [r5, #4020]
str r3, [sp, #56]
add r3, r10, r6
lsls r3, r3, #10
str r3, [sp, #48]
bl FlashEraseBlocks
movs r1, #1
+ add r0, sp, #44
mov r3, r1
mov r2, r1
- add r0, sp, #44
bl FlashProgPages
ldr r3, [sp, #44]
- cbz r3, .L2125
+ cbz r3, .L2144
add r10, r10, #-1
uxth r10, r10
- b .L2119
-.L2125:
+ b .L2138
+.L2144:
ldr r3, [sp, #8]
adds r3, r3, #1
str r3, [sp, #8]
- b .L2095
-.L2147:
+ b .L2114
+.L2166:
add sp, sp, #84
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L2152:
+.L2171:
.align 2
-.L2151:
+.L2170:
.word .LANCHOR2
.word .LANCHOR0
- .word .LC106
- .word .LC107
- .word .LC108
.word .LC109
.word .LC110
+ .word .LC111
+ .word .LC112
+ .word .LC113
.fnend
.size FlashMakeFactorBbt, .-FlashMakeFactorBbt
.align 1
@@ -13293,256 +13404,272 @@ FlashMakeFactorBbt:
.type FtlLowFormatEraseBlock, %function
FtlLowFormatEraseBlock:
.fnstart
- @ args = 0, pretend = 0, frame = 16
+ @ args = 0, pretend = 0, frame = 24
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
- .pad #20
- sub sp, sp, #20
- ldr r4, .L2205
- str r0, [sp, #8]
- str r1, [sp, #4]
- ldr r2, [r4, #740]
+ .pad #28
+ sub sp, sp, #28
+ ldr r7, .L2224
+ str r0, [sp, #4]
+ str r1, [sp]
+ ldrb r3, [r7, #2828] @ zero_extendqisi2
+ str r3, [sp, #16]
+ ldr r3, .L2224+4
+ ldr r2, [r3, #744]
+ mov fp, r3
cmp r2, #0
- bne .L2182
- ldr r3, .L2205+4
- mov r9, #36
- mov r10, r2
+ bne .L2201
+ ldrb r3, [r7, #76] @ zero_extendqisi2
+ mov r8, #36
+ mov r9, r2
mov r5, r2
- mov r7, r2
- mov fp, r4
- ldrb r1, [r3, #76] @ zero_extendqisi2
- mov r6, r3
- str r0, [r3, #2964]
- str r1, [sp, #12]
-.L2155:
- ldrh r1, [r6, #2828]
- uxth r3, r10
- cmp r1, r3
- bls .L2200
- mul r1, r9, r3
- ldr r0, [r4, #744]
- movs r2, #0
- str r2, [r0, r1]
- ldr r2, .L2205+4
- ldr r1, [sp, #8]
- add r3, r3, r2
- ldrb r0, [r3, #2856] @ zero_extendqisi2
+ mov r4, r2
+ mov r10, fp
+ str r3, [sp, #8]
+ str r0, [fp, #1752]
+.L2174:
+ ldrh r0, [r7, #2840]
+ uxth r1, r9
+ ldr r3, .L2224
+ cmp r0, r1
+ bls .L2219
+ mul r6, r8, r1
+ ldr r0, [fp, #748]
+ movs r3, #0
+ str r3, [r0, r6]
+ ldr r3, .L2224
+ add r1, r1, r3
+ ldrb r0, [r1, #2868] @ zero_extendqisi2
+ ldr r1, [sp, #4]
bl V2P_block
- ldr r3, [sp, #4]
- mov r8, r0
- cbz r3, .L2156
+ ldr r3, [sp]
+ mov r6, r0
+ cbz r3, .L2175
bl IsBlkInVendorPart
- cbnz r0, .L2157
-.L2156:
- mov r0, r8
+ cbnz r0, .L2176
+.L2175:
+ mov r0, r6
bl FtlBbmIsBadBlock
- cbnz r0, .L2158
- ldr r1, [r4, #744]
- lsl r3, r8, #10
- mla r1, r9, r5, r1
- str r3, [r1, #4]
- str r0, [r1, #8]
- ldrh r3, [r6, #2910]
- muls r3, r5, r3
- ldr r0, [fp, #1800]
+ cbnz r0, .L2177
+ ldr r3, [fp, #748]
+ lsls r6, r6, #10
+ ldrh r1, [r7, #2922]
+ muls r1, r5, r1
it mi
- addmi r3, r3, #3
+ addmi r1, r1, #3
+ mla lr, r8, r5, r3
adds r5, r5, #1
- bic r3, r3, #3
- add r3, r3, r0
- str r3, [r1, #12]
+ bic r1, r1, #3
uxth r5, r5
- b .L2157
-.L2158:
- adds r7, r7, #1
- uxth r7, r7
-.L2157:
- add r10, r10, #1
- b .L2155
-.L2200:
- mov r8, r7
- cbnz r5, .L2161
- mov r0, r7
- b .L2154
-.L2161:
- ldr r3, [sp, #12]
+ str r0, [lr, #8]
+ ldr r0, [r10, #1804]
+ str r6, [lr, #4]
+ add r1, r1, r0
+ str r1, [lr, #12]
+ b .L2176
+.L2177:
+ adds r4, r4, #1
+ uxth r4, r4
+.L2176:
+ add r9, r9, #1
+ b .L2174
+.L2219:
+ cmp r5, #0
+ beq .L2200
+ ldr r2, [sp, #8]
+ mov r8, #0
+ ldr r0, [fp, #748]
+ mov r9, #36
+ adds r6, r2, #0
mov r2, r5
- ldr r0, [r4, #744]
- movs r7, #0
- adds r9, r3, #0
- mov r10, #36
it ne
- movne r9, #1
- mov r1, r9
+ movne r6, #1
+ strb r8, [r3, #2828]
+ str r3, [sp, #8]
+ mov r1, r6
bl FlashEraseBlocks
-.L2162:
- uxth r3, r7
- cmp r3, r5
- bcs .L2201
- mul r3, r10, r7
- ldr r2, [r4, #744]
- adds r0, r2, r3
- ldr r3, [r2, r3]
- adds r3, r3, #1
- bne .L2163
+ ldrb r2, [sp, #16] @ zero_extendqisi2
+ ldr r3, [sp, #8]
+ strb r2, [r3, #2828]
+.L2181:
+ uxth r2, r8
+ cmp r2, r5
+ bcs .L2220
+ mul r2, r9, r8
+ ldr r1, [fp, #748]
+ adds r0, r1, r2
+ ldr r2, [r1, r2]
+ adds r2, r2, #1
+ bne .L2182
ldr r0, [r0, #4]
- add r8, r8, #1
+ adds r4, r4, #1
ubfx r0, r0, #10, #16
- uxth r8, r8
+ uxth r4, r4
bl FtlBbmMapBadBlock
-.L2163:
- adds r7, r7, #1
- b .L2162
-.L2201:
- ldr r3, [sp, #4]
- cbnz r3, .L2165
+.L2182:
+ add r8, r8, #1
+ b .L2181
+.L2220:
+ ldr r3, [sp]
+ cbnz r3, .L2184
movs r3, #6
- uxth r5, r9
+ uxth r6, r6
str r3, [sp, #12]
- mov fp, #1
- b .L2166
-.L2165:
- ldrb r3, [r6, #76] @ zero_extendqisi2
- ldrh fp, [r6, #2900]
- cbnz r3, .L2183
- lsr r3, fp, #2
- movs r5, #1
+ movs r3, #1
+ str r3, [sp, #8]
+ b .L2185
+.L2184:
+ ldrh r3, [r7, #2912]
+ str r3, [sp, #8]
+ ldrb r3, [r7, #76] @ zero_extendqisi2
+ cbnz r3, .L2202
+ ldr r3, [sp, #8]
+ movs r6, #1
+ lsrs r3, r3, #2
str r3, [sp, #12]
- b .L2166
-.L2183:
- movs r5, #1
- str r5, [sp, #12]
-.L2166:
+ b .L2185
+.L2202:
+ movs r6, #1
+ str r6, [sp, #12]
+.L2185:
+ ldr r8, .L2224+4
movs r7, #0
-.L2176:
- mov r9, #0
- mov r6, r9
-.L2167:
- ldr r3, .L2205+4
- ldrh r2, [r3, #2828]
- uxth r3, r9
- cmp r2, r3
- bls .L2202
+ mov r10, r8
+.L2195:
+ mov fp, #0
+ mov r5, fp
+.L2186:
+ ldr r9, .L2224
+ uxth r3, fp
+ ldrh r1, [r9, #2840]
+ cmp r1, r3
+ bls .L2221
movs r2, #36
- ldr r1, [r4, #744]
- movs r0, #0
- muls r2, r3, r2
- str r0, [r1, r2]
- ldr r2, .L2205+4
- ldr r1, [sp, #8]
+ ldr r0, [r8, #748]
+ mul r1, r2, r3
+ movs r2, #0
+ str r2, [r0, r1]
+ ldr r2, .L2224
+ ldr r1, [sp, #4]
add r3, r3, r2
- ldrb r0, [r3, #2856] @ zero_extendqisi2
+ ldrb r0, [r3, #2868] @ zero_extendqisi2
bl V2P_block
- ldr r3, [sp, #4]
- mov r10, r0
- cbz r3, .L2168
+ ldr r3, [sp]
+ mov r9, r0
+ cbz r3, .L2187
bl IsBlkInVendorPart
- cbnz r0, .L2169
-.L2168:
- mov r0, r10
+ cbnz r0, .L2188
+.L2187:
+ mov r0, r9
bl FtlBbmIsBadBlock
- cbnz r0, .L2169
- ldr r2, [r4, #744]
+ cbnz r0, .L2188
+ ldr r1, [r10, #748]
movs r3, #36
- ldr r1, .L2205
- mla r2, r3, r6, r2
- add r3, r7, r10, lsl #10
- ldr r1, [r1, #1792]
- str r3, [r2, #4]
- ldr r3, [r4, #1788]
- str r3, [r2, #8]
- ldr r3, .L2205+4
- ldrh r3, [r3, #2910]
- muls r3, r6, r3
- add r6, r6, #1
+ ldr r0, [r8, #1796]
+ mla r1, r3, r5, r1
+ add r3, r7, r9, lsl #10
+ str r3, [r1, #4]
+ ldr r3, [r10, #1792]
+ str r3, [r1, #8]
+ ldr r3, .L2224
+ ldrh r3, [r3, #2922]
+ muls r3, r5, r3
+ add r5, r5, #1
it mi
addmi r3, r3, #3
bic r3, r3, #3
- uxth r6, r6
- add r3, r3, r1
- str r3, [r2, #12]
-.L2169:
- add r9, r9, #1
- b .L2167
-.L2202:
- cmp r6, #0
- beq .L2181
- ldr r0, [r4, #744]
- mov r1, r6
- mov r2, r5
+ uxth r5, r5
+ add r3, r3, r0
+ str r3, [r1, #12]
+.L2188:
+ add fp, fp, #1
+ b .L2186
+.L2221:
+ cmp r5, #0
+ beq .L2200
+ mov r2, r6
movs r3, #1
+ ldr r0, [r8, #748]
+ mov r1, r5
+ mov fp, #0
+ strb fp, [r9, #2828]
bl FlashProgPages
- mov r9, #0
- mov r10, #36
-.L2173:
- uxth r3, r9
- cmp r3, r6
- bcs .L2203
- mul r3, r10, r9
- ldr r2, [r4, #744]
- adds r0, r2, r3
- ldr r3, [r2, r3]
- cbz r3, .L2174
+ ldrb r3, [sp, #16] @ zero_extendqisi2
+ movs r2, #36
+ strb r3, [r9, #2828]
+ ldr r9, .L2224+4
+.L2192:
+ uxth r3, fp
+ cmp r3, r5
+ bcs .L2222
+ mul r3, r2, fp
+ ldr r1, [r10, #748]
+ adds r0, r1, r3
+ ldr r3, [r1, r3]
+ cbz r3, .L2193
ldr r0, [r0, #4]
- add r8, r8, #1
+ adds r4, r4, #1
+ str r2, [sp, #20]
ubfx r0, r0, #10, #16
- uxth r8, r8
+ uxth r4, r4
bl FtlBbmMapBadBlock
-.L2174:
- add r9, r9, #1
- b .L2173
-.L2203:
+ ldr r2, [sp, #20]
+.L2193:
+ add fp, fp, #1
+ b .L2192
+.L2222:
ldr r3, [sp, #12]
add r7, r7, r3
+ ldr r3, [sp, #8]
uxth r7, r7
- cmp r7, fp
- bcc .L2176
+ cmp r7, r3
+ bcc .L2195
movs r7, #0
- mov r9, #36
-.L2177:
+ mov r8, #36
+.L2196:
uxth r3, r7
- cmp r3, r6
- bcs .L2204
- ldr r3, [sp, #4]
- cbz r3, .L2178
- mul r3, r9, r7
- ldr r2, [r4, #744]
+ cmp r3, r5
+ bcs .L2223
+ ldr r3, [sp]
+ cbz r3, .L2197
+ mul r3, r8, r7
+ ldr r2, [r9, #748]
adds r1, r2, r3
ldr r3, [r2, r3]
- cbnz r3, .L2178
+ cbnz r3, .L2197
ldr r0, [r1, #4]
movs r1, #1
ubfx r0, r0, #10, #16
bl FtlFreeSysBlkQueueIn
-.L2178:
+.L2197:
adds r7, r7, #1
- b .L2177
-.L2204:
- ldr r3, [sp, #8]
- cmp r3, #63
- bls .L2180
+ b .L2196
+.L2223:
ldr r3, [sp, #4]
- cbz r3, .L2181
-.L2180:
- ldr r0, [r4, #744]
- mov r1, r5
- mov r2, r6
+ cmp r3, #63
+ bls .L2199
+ ldr r3, [sp]
+ cbz r3, .L2200
+.L2199:
+ ldr r0, [r9, #748]
+ mov r1, r6
+ mov r2, r5
bl FlashEraseBlocks
-.L2181:
- mov r0, r8
- b .L2154
-.L2182:
+.L2200:
+ mov r0, r4
+ b .L2173
+.L2201:
movs r0, #0
-.L2154:
- add sp, sp, #20
+.L2173:
+ add sp, sp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L2206:
+.L2225:
.align 2
-.L2205:
- .word .LANCHOR2
+.L2224:
.word .LANCHOR0
+ .word .LANCHOR2
.fnend
.size FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock
.align 1
@@ -13557,144 +13684,144 @@ FtlBbmTblFlush:
push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.pad #12
- ldr r4, .L2219
- ldr r5, [r4, #740]
+ ldr r4, .L2238
+ ldr r5, [r4, #744]
cmp r5, #0
- bne .L2209
- ldr r7, .L2219+4
+ bne .L2228
+ ldr r7, .L2238+4
mov r1, r5
- ldr r0, [r4, #756]
- ldr r3, [r4, #1796]
- add r8, r7, #2992
- ldrh r2, [r7, #2908]
- str r0, [r4, #4056]
- str r3, [r4, #4060]
+ ldr r0, [r4, #1776]
+ ldr r3, [r4, #1800]
+ addw r8, r7, #2996
+ ldrh r2, [r7, #2920]
+ str r0, [r4, #4060]
+ str r3, [r4, #4064]
bl ftl_memset
-.L2210:
- ldrh r3, [r7, #2850]
- ldr r6, .L2219+4
+.L2229:
+ ldrh r3, [r7, #2862]
+ ldr r6, .L2238+4
cmp r5, r3
- bge .L2218
- ldrh r2, [r4, #1860]
- ldr r3, [r4, #4056]
+ bge .L2237
+ ldrh r2, [r4, #1864]
+ ldr r3, [r4, #4060]
ldr r1, [r8, #4]!
mul r0, r2, r5
lsls r2, r2, #2
adds r5, r5, #1
add r0, r3, r0, lsl #2
bl ftl_memcpy
- b .L2210
-.L2218:
- ldr r8, [r4, #4060]
+ b .L2229
+.L2237:
+ ldr r8, [r4, #4064]
movs r1, #255
movs r2, #16
mov r9, #0
- ldr r10, .L2219
+ ldr r10, .L2238
mov r5, r6
mov r0, r8
mov fp, r9
bl memset
movw r3, #61649
strh r3, [r8] @ movhi
- ldr r3, [r6, #2976]
+ ldr r3, [r6, #2980]
str r3, [r8, #4]
- ldrh r3, [r6, #2968]
- strh r3, [r8, #2] @ movhi
ldrh r3, [r6, #2972]
+ strh r3, [r8, #2] @ movhi
+ ldrh r3, [r6, #2976]
strh r3, [r8, #8] @ movhi
- ldrh r3, [r6, #2974]
+ ldrh r3, [r6, #2978]
strh r3, [r8, #10] @ movhi
- ldr r3, [r6, #2824]
+ ldr r3, [r6, #2836]
strh r3, [r8, #12] @ movhi
-.L2212:
- ldr r3, [r4, #756]
+.L2231:
+ ldr r3, [r4, #1776]
movs r6, #0
- ldrh r1, [r7, #2968]
- ldrh r2, [r7, #2970]
- str r3, [r4, #4056]
- ldr r3, [r4, #1796]
- str r6, [r4, #4048]
+ ldrh r1, [r7, #2972]
+ ldrh r2, [r7, #2974]
str r3, [r4, #4060]
+ ldr r3, [r4, #1800]
+ str r6, [r4, #4052]
+ str r3, [r4, #4064]
orr r3, r2, r1, lsl #10
ldrh r0, [r8, #10]
- str r3, [r4, #4052]
- ldrh r3, [r7, #2972]
+ str r3, [r4, #4056]
+ ldrh r3, [r7, #2976]
str r0, [sp]
- ldr r0, .L2219+8
+ ldr r0, .L2238+8
bl printk
movs r1, #1
- ldr r0, .L2219+12
+ ldr r0, .L2238+12
mov r2, r1
mov r3, r1
bl FlashProgPages
- ldrh r3, [r7, #2900]
- ldrh r2, [r7, #2970]
+ ldrh r3, [r7, #2912]
+ ldrh r2, [r7, #2974]
subs r3, r3, #1
cmp r2, r3
- blt .L2213
- ldr r3, [r5, #2976]
+ blt .L2232
+ ldr r3, [r5, #2980]
movs r1, #1
- ldrh r2, [r5, #2968]
+ ldrh r2, [r5, #2972]
adds r3, r3, #1
- ldr r0, [r10, #744]
- str r3, [r5, #2976]
+ ldr r0, [r10, #748]
+ str r3, [r5, #2980]
str r3, [r8, #4]
- ldrh r3, [r5, #2972]
+ ldrh r3, [r5, #2976]
strh r2, [r8, #8] @ movhi
- strh r2, [r5, #2972] @ movhi
+ strh r2, [r5, #2976] @ movhi
mov r2, r1
- strh r3, [r5, #2968] @ movhi
+ strh r3, [r5, #2972] @ movhi
lsls r3, r3, #10
- str r3, [r10, #4052]
+ str r3, [r10, #4056]
str r3, [r0, #4]
- strh r6, [r5, #2970] @ movhi
+ strh r6, [r5, #2974] @ movhi
bl FlashEraseBlocks
movs r1, #1
- ldr r0, .L2219+12
+ ldr r0, .L2238+12
mov r2, r1
mov r3, r1
bl FlashProgPages
-.L2213:
- ldrh r3, [r7, #2970]
- ldr r6, .L2219
+.L2232:
+ ldrh r3, [r7, #2974]
+ ldr r6, .L2238
adds r3, r3, #1
- strh r3, [r7, #2970] @ movhi
- ldr r3, [r4, #4048]
+ strh r3, [r7, #2974] @ movhi
+ ldr r3, [r4, #4052]
adds r3, r3, #1
- bne .L2214
+ bne .L2233
add r9, r9, #1
- ldr r0, .L2219+16
- ldr r1, [r10, #4052]
+ ldr r0, .L2238+16
+ ldr r1, [r10, #4056]
uxth r9, r9
bl printk
cmp r9, #3
- bls .L2212
- ldr r0, .L2219+20
+ bls .L2231
+ ldr r0, .L2238+20
mov r2, r9
- ldr r1, [r6, #4052]
+ ldr r1, [r6, #4056]
bl printk
movs r3, #1
- str r3, [r6, #740]
- b .L2209
-.L2214:
+ str r3, [r6, #744]
+ b .L2228
+.L2233:
cmp fp, #0
- bne .L2209
+ bne .L2228
mov fp, #1
- b .L2212
-.L2209:
+ b .L2231
+.L2228:
movs r0, #0
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L2220:
+.L2239:
.align 2
-.L2219:
+.L2238:
.word .LANCHOR2
.word .LANCHOR0
- .word .LC111
- .word .LANCHOR2+4048
- .word .LC112
- .word .LC113
+ .word .LC114
+ .word .LANCHOR2+4052
+ .word .LC115
+ .word .LC116
.fnend
.size FtlBbmTblFlush, .-FtlBbmTblFlush
.align 1
@@ -13709,97 +13836,97 @@ allocate_data_superblock:
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r5, r0
- ldr r4, .L2277
+ ldr r4, .L2296
.pad #20
sub sp, sp, #20
- ldr r3, [r4, #740]
+ ldr r3, [r4, #744]
cmp r3, #0
- bne .L2222
- ldr r10, .L2277+16
- mov r7, r4
-.L2223:
- ldr r3, .L2277+4
+ bne .L2241
+ ldr r10, .L2296+16
+ mov r8, r4
+.L2242:
+ ldr r3, .L2296+4
ldrb r2, [r5, #8] @ zero_extendqisi2
cmp r5, r3
- bne .L2224
- ldrh lr, [r7, #784]
- ldr r6, [r7, #1652]
- lsr r1, lr, #1
- mul r0, r6, lr
+ bne .L2243
+ ldrh r7, [r8, #832]
+ ldr r6, [r8, #1648]
+ lsrs r1, r7, #1
+ mul r0, r6, r7
adds r3, r1, #1
add r3, r3, r0, lsr #2
- ldr r0, [r7, #948]
+ ldr r0, [r10, #2832]
uxth r3, r3
- cbz r0, .L2247
- ldr r0, [r7, #1008]
+ cbz r0, .L2266
+ ldr r0, [r8, #1052]
cmp r0, #29
- bhi .L2247
+ bhi .L2266
cmp r0, #2
- bls .L2252
- tst lr, #1
- beq .L2225
- cbz r6, .L2249
- b .L2225
-.L2224:
+ bls .L2271
+ lsls r3, r7, #31
+ bpl .L2244
+ cbz r6, .L2268
+ b .L2244
+.L2243:
cmp r2, #1
- bne .L2252
- ldrh r3, [r10, #2848]
+ bne .L2271
+ ldrh r3, [r10, #2860]
cmp r3, #1
- beq .L2252
+ beq .L2271
ldrb r3, [r10, #76] @ zero_extendqisi2
- cbnz r3, .L2252
- ldrh r0, [r7, #784]
- ldr r3, [r7, #948]
+ cbnz r3, .L2271
+ ldrh r0, [r8, #832]
+ ldr r3, [r10, #2832]
lsrs r1, r0, #3
- cbz r3, .L2225
- ldr r3, [r7, #1008]
+ cbz r3, .L2244
+ ldr r3, [r8, #1052]
cmp r3, #1
- bhi .L2225
+ bhi .L2244
rsb r0, r0, r0, lsl #3
ubfx r1, r0, #3, #16
- b .L2225
-.L2247:
+ b .L2244
+.L2266:
mov r1, r3
-.L2225:
- cbz r1, .L2226
+.L2244:
+ cbz r1, .L2245
subs r1, r1, #1
uxth r1, r1
- b .L2226
-.L2249:
+ b .L2245
+.L2268:
mov r1, r6
- b .L2226
-.L2252:
+ b .L2245
+.L2271:
movs r1, #0
-.L2226:
- ldr r0, .L2277+8
+.L2245:
+ ldr r0, .L2296+8
bl List_pop_index_node
- ldrh r3, [r4, #784]
+ ldrh r3, [r4, #832]
subs r3, r3, #1
- strh r3, [r4, #784] @ movhi
+ strh r3, [r4, #832] @ movhi
uxth r6, r0
mov r0, r5
strh r6, [r5] @ movhi
bl make_superblock
ldrb r3, [r5, #7] @ zero_extendqisi2
- cbz r3, .L2227
- ldr r0, [r7, #744]
+ cbz r3, .L2246
+ ldr r0, [r8, #748]
movs r2, #36
- ldrh ip, [r10, #2828]
- mov r8, #0
+ ldrh r7, [r10, #2840]
add lr, r5, #14
- ldr r9, .L2277+16
+ ldr r9, .L2296+16
mov r3, r0
- mla r1, r2, ip, r0
- mov ip, r8
+ mla r1, r2, r7, r0
+ movs r7, #0
+ mov ip, r7
str r1, [sp]
- b .L2228
-.L2227:
- ldr r3, [r7, #768]
- b .L2272
-.L2228:
+ b .L2247
+.L2246:
+ ldr r3, [r8, #816]
+ b .L2291
+.L2247:
ldr r1, [sp]
cmp r3, r1
- beq .L2274
+ beq .L2293
str ip, [r3, #8]
movw fp, #65535
str ip, [r3, #12]
@@ -13808,122 +13935,122 @@ allocate_data_superblock:
cmp r1, fp
itttt ne
lslne r1, r1, #10
- mlane fp, r2, r8, r0
- addne r8, r8, #1
- uxthne r8, r8
+ mlane fp, r2, r7, r0
+ addne r7, r7, #1
+ uxthne r7, r7
it ne
strne r1, [fp, #4]
- b .L2228
-.L2274:
- ldr r3, [r4, #948]
- cbz r3, .L2232
- ldr r3, .L2277+12
+ b .L2247
+.L2293:
+ ldr r3, [r9, #2832]
+ cbz r3, .L2251
+ ldr r3, .L2296+12
cmp r5, r3
- bne .L2232
- ldr r3, [r7, #748]
+ bne .L2251
+ ldr r3, [r8, #752]
ldrh r3, [r3, r6, lsl #1]
cmp r3, #30
itt hi
movhi r3, #0
- strbhi r3, [r7, #796]
-.L2232:
+ strbhi r3, [r8, #844]
+.L2251:
ldrb r3, [r5, #8] @ zero_extendqisi2
- ldr r2, [r4, #748]
- cbnz r3, .L2233
+ ldr r2, [r4, #752]
+ cbnz r3, .L2252
ldrh r1, [r2, r6, lsl #1]
- cbz r1, .L2253
- ldrh r3, [r9, #2888]
+ cbz r1, .L2272
+ ldrh r3, [r9, #2900]
add r3, r3, r1
uxth r3, r3
- b .L2234
-.L2253:
+ b .L2253
+.L2272:
movs r3, #2
-.L2234:
+.L2253:
strh r3, [r2, r6, lsl #1] @ movhi
mov r0, r6
- ldr r3, [r4, #992]
+ ldr r3, [r4, #1036]
movs r1, #0
adds r3, r3, #1
- str r3, [r4, #992]
+ str r3, [r4, #1036]
bl ftl_set_blk_mode
- b .L2235
-.L2233:
+ b .L2254
+.L2252:
ldrh r3, [r2, r6, lsl #1]
lsrs r0, r6, #5
and r1, r6, #31
adds r3, r3, #1
strh r3, [r2, r6, lsl #1] @ movhi
- ldr r3, [r4, #996]
- ldr r2, [r4, #944]
+ ldr r3, [r4, #1040]
+ ldr r2, [r4, #992]
adds r3, r3, #1
- str r3, [r4, #996]
+ str r3, [r4, #1040]
movs r3, #1
lsls r3, r3, r1
ldr r1, [r2, r0, lsl #2]
orrs r3, r3, r1
str r3, [r2, r0, lsl #2]
-.L2235:
- ldr r3, [r4, #748]
- ldr r2, [r4, #1004]
- ldr r0, [r4, #992]
+.L2254:
+ ldr r3, [r4, #752]
+ ldr r2, [r4, #1048]
+ ldr r0, [r4, #1036]
ldrh r3, [r3, r6, lsl #1]
- ldrh r1, [r9, #2836]
+ ldrh r1, [r9, #2848]
cmp r3, r2
- ldrh r2, [r9, #2888]
+ ldrh r2, [r9, #2900]
it hi
- strhi r3, [r7, #1004]
- ldr r3, [r4, #996]
+ strhi r3, [r8, #1048]
+ ldr r3, [r4, #1040]
mla r0, r0, r2, r3
bl __aeabi_uidiv
- ldr r2, [r4, #1816]
- ldr r1, [r4, #744]
+ ldr r2, [r4, #1820]
+ ldr r1, [r4, #748]
ldr r3, [r2, #16]
adds r3, r3, #1
str r3, [r2, #16]
movs r3, #36
adds r2, r1, #4
- mla r3, r3, r8, r1
+ mla r3, r3, r7, r1
adds r3, r3, #40
- str r0, [r4, #1000]
-.L2237:
+ str r0, [r4, #1044]
+.L2256:
adds r2, r2, #36
cmp r2, r3
- beq .L2275
+ beq .L2294
ldr r1, [r2, #-36]
bic r1, r1, #1020
bic r1, r1, #3
str r1, [r2, #-36]
- b .L2237
-.L2275:
+ b .L2256
+.L2294:
ldrb r3, [r9, #76] @ zero_extendqisi2
- cbz r3, .L2239
+ cbz r3, .L2258
ldrb r3, [r5, #8] @ zero_extendqisi2
- mov r2, r8
- ldr r0, [r4, #744]
+ mov r2, r7
+ ldr r0, [r4, #748]
cmp r3, #1
ite eq
moveq r1, #0
movne r1, #1
bl FlashEraseBlocks
-.L2239:
+.L2258:
ldrb r1, [r5, #8] @ zero_extendqisi2
- mov r2, r8
- ldr r0, [r4, #744]
+ mov r2, r7
+ ldr r0, [r4, #748]
mov fp, #0
bl FlashEraseBlocks
add r1, r5, #16
mov ip, #36
mov r2, fp
-.L2241:
+.L2260:
uxth r3, fp
- cmp r3, r8
- bcs .L2276
+ cmp r3, r7
+ bcs .L2295
mul r3, ip, fp
- ldr lr, [r4, #744]
+ ldr lr, [r4, #748]
add r0, lr, r3
ldr r3, [lr, r3]
cmp r3, #-1
- bne .L2242
+ bne .L2261
ldr r0, [r0, #4]
adds r2, r2, #1
str ip, [sp, #12]
@@ -13940,51 +14067,51 @@ allocate_data_superblock:
ldrb r3, [r5, #7] @ zero_extendqisi2
subs r3, r3, #1
strb r3, [r5, #7]
-.L2242:
+.L2261:
add fp, fp, #1
adds r1, r1, #2
- b .L2241
-.L2276:
- cbz r2, .L2244
+ b .L2260
+.L2295:
+ cbz r2, .L2263
mov r0, r6
bl update_multiplier_value
bl FtlBbmTblFlush
-.L2244:
+.L2263:
ldrb r3, [r5, #7] @ zero_extendqisi2
- cbnz r3, .L2245
- ldr r3, [r4, #768]
-.L2272:
+ cbnz r3, .L2264
+ ldr r3, [r4, #816]
+.L2291:
movw r2, #65535
strh r2, [r3, r6, lsl #1] @ movhi
- b .L2223
-.L2245:
- ldrh r2, [r9, #2898]
+ b .L2242
+.L2264:
+ ldrh r2, [r9, #2910]
strh r6, [r5] @ movhi
smulbb r3, r2, r3
movs r2, #0
strh r2, [r5, #2] @ movhi
strb r2, [r5, #6]
- ldr r2, [r4, #984]
+ ldr r2, [r4, #1028]
uxth r3, r3
strh r3, [r5, #4] @ movhi
str r2, [r5, #12]
adds r2, r2, #1
- str r2, [r4, #984]
- ldr r2, [r4, #768]
+ str r2, [r4, #1028]
+ ldr r2, [r4, #816]
ldrh r1, [r5]
strh r3, [r2, r1, lsl #1] @ movhi
-.L2222:
+.L2241:
movs r0, #0
add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L2278:
+.L2297:
.align 2
-.L2277:
+.L2296:
.word .LANCHOR2
- .word .LANCHOR2+884
- .word .LANCHOR2+780
- .word .LANCHOR2+788
+ .word .LANCHOR2+932
+ .word .LANCHOR2+828
+ .word .LANCHOR2+836
.word .LANCHOR0
.fnend
.size allocate_data_superblock, .-allocate_data_superblock
@@ -14000,77 +14127,77 @@ FtlGcFreeBadSuperBlk:
push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.pad #12
- ldr r5, .L2292
+ ldr r5, .L2311
str r0, [sp]
- ldrh r3, [r5, #1698]
+ ldrh r3, [r5, #1694]
cmp r3, #0
- beq .L2281
- ldr r7, .L2292+4
+ beq .L2300
+ ldr r7, .L2311+4
mov r10, #0
mov r8, r5
-.L2280:
- ldrh r2, [r7, #2828]
+.L2299:
+ ldrh r2, [r7, #2840]
uxth r3, r10
cmp r2, r3
- bls .L2289
+ bls .L2308
add r3, r3, r7
ldr r1, [sp]
mov fp, #0
- ldrb r0, [r3, #2856] @ zero_extendqisi2
+ ldrb r0, [r3, #2868] @ zero_extendqisi2
bl V2P_block
- ldr r2, .L2292+8
+ ldr r2, .L2311+8
mov r9, r0
-.L2282:
- ldrh r3, [r5, #1698]
+.L2301:
+ ldrh r3, [r5, #1694]
uxth r4, fp
cmp r3, r4
- bls .L2290
+ bls .L2309
lsls r6, r4, #1
add r3, r8, r6
- ldrh r3, [r3, #1700]
+ ldrh r3, [r3, #1696]
cmp r3, r9
- bne .L2283
+ bne .L2302
mov r1, r9
- ldr r0, .L2292+12
+ ldr r0, .L2311+12
str r2, [sp, #4]
bl printk
mov r0, r9
bl FtlBbmMapBadBlock
bl FtlBbmTblFlush
- ldrh r1, [r8, #1698]
ldr r2, [sp, #4]
+ ldrh r1, [r8, #1694]
adds r3, r2, r6
-.L2284:
+.L2303:
cmp r4, r1
- bcs .L2291
+ bcs .L2310
ldrh r0, [r3, #2]
adds r4, r4, #1
uxth r4, r4
strh r0, [r3], #2 @ movhi
- b .L2284
-.L2291:
+ b .L2303
+.L2310:
subs r1, r1, #1
- strh r1, [r5, #1698] @ movhi
-.L2283:
+ strh r1, [r5, #1694] @ movhi
+.L2302:
add fp, fp, #1
- b .L2282
-.L2290:
+ b .L2301
+.L2309:
add r10, r10, #1
- b .L2280
-.L2289:
+ b .L2299
+.L2308:
bl FtlGcReFreshBadBlk
-.L2281:
+.L2300:
movs r0, #0
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L2293:
+.L2312:
.align 2
-.L2292:
+.L2311:
.word .LANCHOR2
.word .LANCHOR0
- .word .LANCHOR2+1700
- .word .LC114
+ .word .LANCHOR2+1696
+ .word .LC117
.fnend
.size FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk
.align 1
@@ -14082,53 +14209,53 @@ update_vpc_list:
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r2, .L2303
+ ldr r2, .L2322
push {r3, r4, r5, lr}
.save {r3, r4, r5, lr}
mov r4, r0
- ldr r3, [r2, #768]
+ ldr r3, [r2, #816]
mov r5, r2
ldrh r3, [r3, r0, lsl #1]
- cbnz r3, .L2295
- ldrh r1, [r2, #1076]
+ cbnz r3, .L2314
+ ldrh r1, [r2, #1072]
cmp r1, r0
- bne .L2296
+ bne .L2315
movw r3, #65535
- strh r3, [r2, #1076] @ movhi
- b .L2297
-.L2296:
- ldrh r1, [r2, #788]
- cmp r1, r0
- beq .L2302
+ strh r3, [r2, #1072] @ movhi
+ b .L2316
+.L2315:
ldrh r1, [r2, #836]
cmp r1, r0
- beq .L2302
- ldrh r2, [r2, #884]
+ beq .L2321
+ ldrh r1, [r2, #884]
+ cmp r1, r0
+ beq .L2321
+ ldrh r2, [r2, #932]
cmp r2, r0
- beq .L2302
-.L2297:
+ beq .L2321
+.L2316:
mov r1, r4
- ldr r0, .L2303+4
+ ldr r0, .L2322+4
bl List_remove_node
- ldrh r3, [r5, #776]
+ ldrh r3, [r5, #824]
mov r0, r4
subs r3, r3, #1
- strh r3, [r5, #776] @ movhi
+ strh r3, [r5, #824] @ movhi
bl free_data_superblock
mov r0, r4
bl FtlGcFreeBadSuperBlk
movs r0, #1
pop {r3, r4, r5, pc}
-.L2295:
+.L2314:
bl List_update_data_list
-.L2302:
+.L2321:
movs r0, #0
pop {r3, r4, r5, pc}
-.L2304:
+.L2323:
.align 2
-.L2303:
+.L2322:
.word .LANCHOR2
- .word .LANCHOR2+764
+ .word .LANCHOR2+812
.fnend
.size update_vpc_list, .-update_vpc_list
.align 1
@@ -14145,45 +14272,45 @@ decrement_vpc_count:
movw r3, #65535
cmp r0, r3
mov r5, r0
- ldr r3, .L2311
- beq .L2306
- ldr r2, [r3, #768]
+ ldr r3, .L2330
+ beq .L2325
+ ldr r2, [r3, #816]
ldrh r4, [r2, r0, lsl #1]
- cbnz r4, .L2307
+ cbnz r4, .L2326
mov r1, r5
mov r2, r4
- ldr r0, .L2311+4
+ ldr r0, .L2330+4
bl printk
mov r0, r4
pop {r3, r4, r5, pc}
-.L2307:
+.L2326:
subs r4, r4, #1
strh r4, [r2, r0, lsl #1] @ movhi
-.L2306:
- ldrh r0, [r3, #1916]
+.L2325:
+ ldrh r0, [r3, #1920]
movw r3, #65535
- ldr r4, .L2311
+ ldr r4, .L2330
cmp r0, r3
- bne .L2309
- strh r5, [r4, #1916] @ movhi
- b .L2310
-.L2309:
+ bne .L2328
+ strh r5, [r4, #1920] @ movhi
+ b .L2329
+.L2328:
cmp r0, r5
- beq .L2310
+ beq .L2329
bl update_vpc_list
- strh r5, [r4, #1916] @ movhi
+ strh r5, [r4, #1920] @ movhi
adds r0, r0, #0
it ne
movne r0, #1
pop {r3, r4, r5, pc}
-.L2310:
+.L2329:
movs r0, #0
pop {r3, r4, r5, pc}
-.L2312:
+.L2331:
.align 2
-.L2311:
+.L2330:
.word .LANCHOR2
- .word .LC115
+ .word .LC118
.fnend
.size decrement_vpc_count, .-decrement_vpc_count
.align 1
@@ -14200,22 +14327,22 @@ FtlSlcSuperblockCheck:
mov r4, r0
ldrh r3, [r0, #4]
cmp r3, #0
- beq .L2313
+ beq .L2332
ldrh r3, [r0]
movw r5, #65535
cmp r3, r5
- beq .L2313
+ beq .L2332
ldrb r3, [r0, #6] @ zero_extendqisi2
movs r7, #0
- ldr r6, .L2325
+ ldr r6, .L2344
adds r3, r3, #8
ldrh r3, [r0, r3, lsl #1]
-.L2317:
+.L2336:
cmp r3, r5
- bne .L2324
-.L2319:
+ bne .L2343
+.L2338:
ldrb r3, [r4, #6] @ zero_extendqisi2
- ldrh r2, [r6, #2828]
+ ldrh r2, [r6, #2840]
adds r3, r3, #1
uxtb r3, r3
strb r3, [r4, #6]
@@ -14228,18 +14355,18 @@ FtlSlcSuperblockCheck:
ldrb r3, [r4, #6] @ zero_extendqisi2
adds r3, r3, #8
ldrh r3, [r4, r3, lsl #1]
- b .L2317
-.L2324:
+ b .L2336
+.L2343:
ldrb r1, [r4, #8] @ zero_extendqisi2
cmp r1, #1
- bne .L2320
+ bne .L2339
ldrb r3, [r6, #76] @ zero_extendqisi2
- cbnz r3, .L2320
+ cbnz r3, .L2339
ldrh r3, [r4, #2]
add r3, r6, r3, lsl #1
ldrh r3, [r3, #592]
cmp r3, r5
- bne .L2320
+ bne .L2339
ldrh r3, [r4, #4]
ldrh r0, [r4]
subs r3, r3, #1
@@ -14247,39 +14374,39 @@ FtlSlcSuperblockCheck:
bl decrement_vpc_count
ldrh r2, [r4, #4]
cmp r2, #0
- bne .L2319
+ bne .L2338
ldrh r3, [r4, #2]
strb r2, [r4, #6]
adds r3, r3, #1
strh r3, [r4, #2] @ movhi
pop {r3, r4, r5, r6, r7, pc}
-.L2320:
- ldr r2, .L2325
+.L2339:
+ ldr r2, .L2344
ldrb r3, [r2, #76] @ zero_extendqisi2
- cbz r3, .L2313
+ cbz r3, .L2332
cmp r1, #1
- bne .L2313
+ bne .L2332
ldrh r1, [r4, #2]
- ldrh r3, [r2, #2900]
+ ldrh r3, [r2, #2912]
cmp r1, r3
- bcc .L2313
- ldr r3, .L2325+4
+ bcc .L2332
+ ldr r3, .L2344+4
ldrh r0, [r4]
ldrh r5, [r4, #4]
- ldr r1, [r3, #768]
+ ldr r1, [r3, #816]
ldrh r3, [r1, r0, lsl #1]
subs r3, r3, r5
strh r3, [r1, r0, lsl #1] @ movhi
- ldrh r2, [r2, #2898]
+ ldrh r2, [r2, #2910]
movs r3, #0
strh r3, [r4, #4] @ movhi
strb r3, [r4, #6]
strh r2, [r4, #2] @ movhi
-.L2313:
+.L2332:
pop {r3, r4, r5, r6, r7, pc}
-.L2326:
+.L2345:
.align 2
-.L2325:
+.L2344:
.word .LANCHOR0
.word .LANCHOR2
.fnend
@@ -14301,15 +14428,15 @@ get_new_active_ppa:
strb r6, [r0, #10]
movw r8, #65535
adds r3, r3, #8
- ldr r5, .L2344
+ ldr r5, .L2363
ldrh r2, [r0, r3, lsl #1]
-.L2328:
+.L2347:
cmp r2, r8
- ldr r7, .L2344
- bne .L2343
-.L2329:
+ ldr r7, .L2363
+ bne .L2362
+.L2348:
ldrb r3, [r4, #6] @ zero_extendqisi2
- ldrh r2, [r5, #2828]
+ ldrh r2, [r5, #2840]
adds r3, r3, #1
uxtb r3, r3
strb r3, [r4, #6]
@@ -14322,34 +14449,34 @@ get_new_active_ppa:
ldrb r3, [r4, #6] @ zero_extendqisi2
adds r3, r3, #8
ldrh r2, [r4, r3, lsl #1]
- b .L2328
-.L2343:
+ b .L2347
+.L2362:
ldrb r3, [r4, #8] @ zero_extendqisi2
ldrh r1, [r4, #2]
cmp r3, #1
ldrh r3, [r4, #4]
- bne .L2331
+ bne .L2350
ldrb r0, [r5, #76] @ zero_extendqisi2
- cbnz r0, .L2331
+ cbnz r0, .L2350
add r0, r5, r1, lsl #1
ldrh r0, [r0, #592]
cmp r0, r8
- bne .L2331
+ bne .L2350
subs r3, r3, #1
ldrh r0, [r4]
strh r3, [r4, #4] @ movhi
bl decrement_vpc_count
- b .L2329
-.L2331:
+ b .L2348
+.L2350:
movw r6, #65535
orr r5, r1, r2, lsl #10
mov r8, r6
subs r3, r3, #1
strh r3, [r4, #4] @ movhi
-.L2332:
+.L2351:
ldrb r3, [r4, #6] @ zero_extendqisi2
- ldrh r1, [r7, #2828]
-.L2334:
+ ldrh r1, [r7, #2840]
+.L2353:
adds r3, r3, #1
uxtb r3, r3
cmp r3, r1
@@ -14361,52 +14488,52 @@ get_new_active_ppa:
add r2, r3, #8
ldrh r2, [r4, r2, lsl #1]
cmp r2, r6
- beq .L2334
+ beq .L2353
strb r3, [r4, #6]
ldrb r3, [r4, #8] @ zero_extendqisi2
cmp r3, #1
- bne .L2339
+ bne .L2358
ldrb r3, [r7, #76] @ zero_extendqisi2
- cbnz r3, .L2336
+ cbnz r3, .L2355
ldrh r2, [r4, #2]
- ldr r3, .L2344
+ ldr r3, .L2363
add r3, r3, r2, lsl #1
ldrh r3, [r3, #592]
cmp r3, r8
- bne .L2336
+ bne .L2355
ldrh r3, [r4, #4]
- cbz r3, .L2336
+ cbz r3, .L2355
subs r3, r3, #1
ldrh r0, [r4]
strh r3, [r4, #4] @ movhi
bl decrement_vpc_count
- b .L2332
-.L2336:
+ b .L2351
+.L2355:
ldrb r3, [r7, #76] @ zero_extendqisi2
- ldr r2, .L2344
- cbz r3, .L2339
+ ldr r2, .L2363
+ cbz r3, .L2358
ldrh r1, [r4, #2]
- ldrh r3, [r2, #2900]
+ ldrh r3, [r2, #2912]
cmp r1, r3
- bcc .L2339
- ldr r3, .L2344+4
+ bcc .L2358
+ ldr r3, .L2363+4
ldrh r0, [r4]
ldrh r6, [r4, #4]
- ldr r1, [r3, #768]
+ ldr r1, [r3, #816]
ldrh r3, [r1, r0, lsl #1]
subs r3, r3, r6
strh r3, [r1, r0, lsl #1] @ movhi
- ldrh r2, [r2, #2898]
+ ldrh r2, [r2, #2910]
movs r3, #0
strh r3, [r4, #4] @ movhi
strb r3, [r4, #6]
strh r2, [r4, #2] @ movhi
-.L2339:
+.L2358:
mov r0, r5
pop {r4, r5, r6, r7, r8, pc}
-.L2345:
+.L2364:
.align 2
-.L2344:
+.L2363:
.word .LANCHOR0
.word .LANCHOR2
.fnend
@@ -14422,190 +14549,190 @@ FtlVpcTblFlush:
@ frame_needed = 0, uses_anonymous_args = 0
push {r3, r4, r5, r6, r7, r8, r9, lr}
.save {r3, r4, r5, r6, r7, r8, r9, lr}
- ldr r4, .L2365
- ldr r3, [r4, #740]
+ ldr r4, .L2384
+ ldr r3, [r4, #744]
cmp r3, #0
- bne .L2348
- ldr r2, [r4, #756]
+ bne .L2367
+ ldr r2, [r4, #1776]
movs r1, #255
- ldr r7, [r4, #1796]
- ldr r5, .L2365+4
- str r2, [r4, #4056]
- ldrh r2, [r4, #1064]
- str r7, [r4, #4060]
+ ldr r7, [r4, #1800]
+ ldr r5, .L2384+4
+ str r2, [r4, #4060]
+ ldrh r2, [r4, #1060]
+ str r7, [r4, #4064]
str r3, [r7, #12]
strh r2, [r7, #2] @ movhi
movw r2, #61604
strh r2, [r7] @ movhi
- ldr r2, [r4, #1072]
+ ldr r2, [r4, #1068]
str r3, [r7, #8]
- ldr r3, .L2365+8
+ ldr r3, .L2384+8
str r2, [r7, #4]
- ldrh r2, [r4, #790]
- str r3, [r4, #1012]
- ldr r3, .L2365+12
- str r3, [r4, #1016]
- ldrh r3, [r4, #1070]
- strh r3, [r4, #1020] @ movhi
- ldrh r3, [r5, #2850]
- strb r3, [r4, #1022]
- ldrh r3, [r4, #788]
- strh r3, [r4, #1026] @ movhi
- ldrb r3, [r4, #794] @ zero_extendqisi2
- orr r3, r3, r2, lsl #6
- strh r3, [r4, #1028] @ movhi
- ldrb r3, [r4, #796] @ zero_extendqisi2
ldrh r2, [r4, #838]
- strb r3, [r4, #1023]
+ str r3, [r4, #760]
+ ldr r3, .L2384+12
+ str r3, [r4, #764]
+ ldrh r3, [r4, #1066]
+ strh r3, [r4, #768] @ movhi
+ ldrh r3, [r5, #2862]
+ strb r3, [r4, #770]
ldrh r3, [r4, #836]
- strh r3, [r4, #1030] @ movhi
+ strh r3, [r4, #774] @ movhi
ldrb r3, [r4, #842] @ zero_extendqisi2
orr r3, r3, r2, lsl #6
- strh r3, [r4, #1032] @ movhi
+ strh r3, [r4, #776] @ movhi
ldrb r3, [r4, #844] @ zero_extendqisi2
- strb r3, [r4, #1024]
- ldrh r3, [r4, #884]
- strh r3, [r4, #1034] @ movhi
ldrh r2, [r4, #886]
+ strb r3, [r4, #771]
+ ldrh r3, [r4, #884]
+ strh r3, [r4, #778] @ movhi
ldrb r3, [r4, #890] @ zero_extendqisi2
- ldr r0, [r4, #4056]
orr r3, r3, r2, lsl #6
- strh r3, [r4, #1036] @ movhi
+ strh r3, [r4, #780] @ movhi
ldrb r3, [r4, #892] @ zero_extendqisi2
- ldrh r2, [r5, #2908]
- strb r3, [r4, #1025]
- ldr r3, [r4, #992]
- str r3, [r4, #1044]
- ldr r3, [r4, #984]
- str r3, [r4, #1052]
- ldr r3, [r4, #988]
- str r3, [r4, #1048]
+ strb r3, [r4, #772]
+ ldrh r3, [r4, #932]
+ strh r3, [r4, #782] @ movhi
+ ldrh r2, [r4, #934]
+ ldrb r3, [r4, #938] @ zero_extendqisi2
+ ldr r0, [r4, #4060]
+ orr r3, r3, r2, lsl #6
+ strh r3, [r4, #784] @ movhi
+ ldrb r3, [r4, #940] @ zero_extendqisi2
+ ldrh r2, [r5, #2920]
+ strb r3, [r4, #773]
+ ldr r3, [r4, #1036]
+ str r3, [r4, #792]
+ ldr r3, [r4, #1028]
+ str r3, [r4, #800]
+ ldr r3, [r4, #1032]
+ str r3, [r4, #796]
bl ftl_memset
- add r1, r4, #1012
+ add r1, r4, #760
movs r2, #48
- ldr r0, [r4, #4056]
+ ldr r0, [r4, #4060]
bl ftl_memcpy
- ldrh r2, [r5, #2836]
- ldr r0, [r4, #4056]
- ldr r1, [r4, #768]
+ ldrh r2, [r5, #2848]
+ ldr r0, [r4, #4060]
+ ldr r1, [r4, #816]
lsls r2, r2, #1
adds r0, r0, #48
bl ftl_memcpy
- ldrh r2, [r5, #2836]
- ldr r0, [r4, #4056]
+ ldrh r2, [r5, #2848]
+ ldr r0, [r4, #4060]
add r3, r2, #24
- ldr r1, [r4, #944]
+ ldr r1, [r4, #992]
ubfx r3, r3, #1, #30
lsrs r2, r2, #3
adds r2, r2, #4
add r0, r0, r3, lsl #2
bl ftl_memcpy
- ldrh r3, [r5, #2944]
- cbz r3, .L2349
- ldrh r2, [r5, #2836]
- ldr r0, [r4, #4056]
- ldr r1, [r4, #1844]
+ ldrh r3, [r5, #2952]
+ cbz r3, .L2368
+ ldrh r2, [r5, #2848]
+ ldr r0, [r4, #4060]
+ ldr r1, [r4, #1848]
lsrs r3, r2, #3
add r3, r3, r2, lsl #1
- ldrh r2, [r5, #2936]
+ ldrh r2, [r5, #2948]
adds r3, r3, #52
ubfx r3, r3, #2, #14
lsls r2, r2, #2
add r0, r0, r3, lsl #2
bl ftl_memcpy
-.L2349:
+.L2368:
movs r0, #0
- ldr r6, .L2365
+ ldr r6, .L2384
bl FtlUpdateVaildLpn
mov r8, #0
movw r9, #65535
-.L2350:
- ldr r3, [r4, #756]
+.L2369:
+ ldr r3, [r4, #1776]
movs r1, #1
- ldrh r2, [r4, #1064]
- ldr r0, .L2365+16
- str r3, [r4, #4056]
- ldr r3, [r4, #1796]
+ ldrh r2, [r4, #1060]
+ ldr r0, .L2384+16
str r3, [r4, #4060]
- ldrh r3, [r4, #1066]
+ ldr r3, [r4, #1800]
+ str r3, [r4, #4064]
+ ldrh r3, [r4, #1062]
orr r3, r3, r2, lsl #10
mov r2, r1
- str r3, [r4, #4052]
+ str r3, [r4, #4056]
mov r3, r1
bl FlashProgPages
- ldrh r3, [r5, #2900]
- ldrh r2, [r4, #1066]
+ ldrh r3, [r5, #2912]
+ ldrh r2, [r4, #1062]
subs r3, r3, #1
cmp r2, r3
- blt .L2351
- ldrh r3, [r6, #1064]
- ldrh r9, [r6, #1068]
- strh r3, [r6, #1068] @ movhi
+ blt .L2370
+ ldrh r3, [r6, #1060]
+ ldrh r9, [r6, #1064]
+ strh r3, [r6, #1064] @ movhi
movs r3, #0
- strh r3, [r6, #1066] @ movhi
+ strh r3, [r6, #1062] @ movhi
bl FtlFreeSysBlkQueueOut
- ldr r3, [r6, #984]
+ ldr r3, [r6, #1028]
movs r1, #1
adds r2, r3, #1
- str r2, [r6, #984]
- str r3, [r6, #1072]
+ str r2, [r6, #1028]
+ str r3, [r6, #1068]
lsls r2, r0, #10
- strh r0, [r6, #1064] @ movhi
- str r2, [r6, #4052]
+ strh r0, [r6, #1060] @ movhi
+ str r2, [r6, #4056]
mov r2, r1
str r3, [r7, #4]
mov r3, r1
strh r0, [r7, #2] @ movhi
- ldr r0, .L2365+16
+ ldr r0, .L2384+16
bl FlashProgPages
-.L2351:
- ldrh r3, [r4, #1066]
- ldr r2, [r4, #4048]
+.L2370:
+ ldrh r3, [r4, #1062]
+ ldr r2, [r4, #4052]
adds r3, r3, #1
adds r1, r2, #1
uxth r3, r3
- strh r3, [r4, #1066] @ movhi
- bne .L2352
+ strh r3, [r4, #1062] @ movhi
+ bne .L2371
cmp r3, #1
add r8, r8, #1
it eq
- ldrheq r3, [r5, #2900]
+ ldrheq r3, [r5, #2912]
uxth r8, r8
itt eq
addeq r3, r3, #-1
- strheq r3, [r6, #1066] @ movhi
+ strheq r3, [r6, #1062] @ movhi
cmp r8, #3
- bls .L2350
- ldr r0, .L2365+20
+ bls .L2369
+ ldr r0, .L2384+20
mov r2, r8
- ldr r1, [r4, #4052]
+ ldr r1, [r4, #4056]
bl printk
movs r3, #1
- str r3, [r4, #740]
- b .L2348
-.L2352:
+ str r3, [r4, #744]
+ b .L2367
+.L2371:
cmp r3, #1
- beq .L2350
+ beq .L2369
cmp r2, #256
- beq .L2350
+ beq .L2369
movw r3, #65535
cmp r9, r3
- beq .L2348
+ beq .L2367
mov r0, r9
movs r1, #1
bl FtlFreeSysBlkQueueIn
-.L2348:
+.L2367:
movs r0, #0
pop {r3, r4, r5, r6, r7, r8, r9, pc}
-.L2366:
+.L2385:
.align 2
-.L2365:
+.L2384:
.word .LANCHOR2
.word .LANCHOR0
.word 1179929683
- .word 1342177351
- .word .LANCHOR2+4048
- .word .LC116
+ .word 1342177352
+ .word .LANCHOR2+4052
+ .word .LC119
.fnend
.size FtlVpcTblFlush, .-FtlVpcTblFlush
.align 1
@@ -14620,37 +14747,37 @@ FtlSuperblockPowerLostFix:
push {r4, r5, r6, r7, r8, r9, r10, lr}
.save {r4, r5, r6, r7, r8, r9, r10, lr}
mov r4, r0
- ldr r7, .L2381
+ ldr r7, .L2400
.pad #40
sub sp, sp, #40
ldrb r3, [r7, #76] @ zero_extendqisi2
- cbz r3, .L2376
+ cbz r3, .L2395
ldrb r5, [r0, #8] @ zero_extendqisi2
cmp r5, #1
- bne .L2376
+ bne .L2395
ldrh r6, [r0, #4]
- b .L2368
-.L2376:
+ b .L2387
+.L2395:
movs r5, #0
movs r6, #12
-.L2368:
- ldr r10, .L2381+4
+.L2387:
+ ldr r10, .L2400+4
mov r8, #-1
mov r9, #0
-.L2369:
+.L2388:
adds r6, r6, #-1
- bcc .L2371
+ bcc .L2390
ldrh r3, [r4, #4]
- cbnz r3, .L2370
-.L2371:
- ldr r3, .L2381+4
+ cbnz r3, .L2389
+.L2390:
+ ldr r3, .L2400+4
ldrh r1, [r4]
ldrh r0, [r4, #4]
- ldr r2, [r3, #768]
+ ldr r2, [r3, #816]
ldrh r3, [r2, r1, lsl #1]
subs r3, r3, r0
strh r3, [r2, r1, lsl #1] @ movhi
- ldrh r3, [r7, #2898]
+ ldrh r3, [r7, #2910]
strh r3, [r4, #2] @ movhi
movs r3, #0
strb r3, [r4, #6]
@@ -14658,16 +14785,16 @@ FtlSuperblockPowerLostFix:
add sp, sp, #40
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, pc}
-.L2370:
+.L2389:
mov r0, r4
bl get_new_active_ppa
str r0, [sp, #8]
adds r0, r0, #1
- beq .L2371
- ldr r2, [r10, #1796]
- movs r1, #1
- ldr r3, [r10, #756]
+ beq .L2390
+ ldr r2, [r10, #1800]
add r0, sp, #4
+ ldr r3, [r10, #1776]
+ movs r1, #1
str r8, [sp, #20]
str r2, [sp, #16]
str r3, [sp, #12]
@@ -14676,22 +14803,22 @@ FtlSuperblockPowerLostFix:
ldrh r3, [r4]
strh r9, [r2] @ movhi
strh r3, [r2, #2] @ movhi
- ldr r3, [r10, #988]
+ ldr r3, [r10, #1032]
str r3, [r2, #4]
adds r3, r3, #1
adds r2, r3, #1
mov r2, r5
it eq
moveq r3, #0
- str r3, [r10, #988]
+ str r3, [r10, #1032]
movs r3, #0
bl FlashProgPages
ldrh r0, [r4]
bl decrement_vpc_count
- b .L2369
-.L2382:
+ b .L2388
+.L2401:
.align 2
-.L2381:
+.L2400:
.word .LANCHOR0
.word .LANCHOR2
.fnend
@@ -14716,49 +14843,49 @@ ftl_map_blk_gc:
sub r3, ip, #4
ldrh r1, [r4, #40]
cmp r2, r3
- ldr r7, .L2404
- bge .L2384
+ ldr r7, .L2423
+ bge .L2403
movw r3, #65535
cmp r1, r3
- beq .L2386
+ beq .L2405
ldrh r2, [r4, #2]
- ldrh r3, [r7, #2900]
+ ldrh r3, [r7, #2912]
cmp r2, r3
- bcc .L2386
-.L2384:
+ bcc .L2405
+.L2403:
movw r3, #65535
cmp r1, r3
uxth r5, r0
- beq .L2388
+ beq .L2407
ldrh r3, [r4, #2]
- ldrh r2, [r7, #2900]
+ ldrh r2, [r7, #2912]
cmp r2, r3
- bhi .L2388
+ bhi .L2407
movs r2, #0
-.L2389:
+.L2408:
uxth lr, r2
cmp lr, ip
- bcs .L2390
+ bcs .L2409
adds r2, r2, #1
add r0, r6, r2, lsl #1
ldrh r0, [r0, #-2]
cmp r0, r1
- bne .L2389
+ bne .L2408
mov r5, lr
-.L2390:
- ldr r0, .L2404+4
+.L2409:
+ ldr r0, .L2423+4
ldrh r2, [r6, lr, lsl #1]
bl printk
movw r3, #65535
strh r3, [r4, #40] @ movhi
-.L2388:
+.L2407:
ldrh r9, [r6, r5, lsl #1]
lsls r2, r5, #1
cmp r9, #0
- beq .L2386
+ beq .L2405
ldr r3, [r4, #32]
cmp r3, #0
- bne .L2386
+ bne .L2405
movs r1, #1
str r1, [r4, #32]
strh r3, [r6, r2] @ movhi
@@ -14766,76 +14893,76 @@ ftl_map_blk_gc:
ldrh r2, [r4, #2]
subs r3, r3, #1
strh r3, [r4, #8] @ movhi
- ldrh r3, [r7, #2900]
+ ldrh r3, [r7, #2912]
cmp r2, r3
- bcc .L2392
+ bcc .L2411
mov r0, r4
bl ftl_map_blk_alloc_new_blk
-.L2392:
- ldr r5, .L2404+8
+.L2411:
+ ldr r5, .L2423+8
mov r10, #0
-.L2393:
+.L2412:
ldrh r3, [r4, #6]
uxth r6, r10
cmp r3, r6
- bls .L2403
+ bls .L2422
ldr r3, [r8, r6, lsl #2]
cmp r9, r3, lsr #10
- bne .L2394
- ldr r3, [r5, #1776]
+ bne .L2413
+ ldr r3, [r5, #1780]
movs r1, #1
- ldr fp, [r5, #1796]
- ldr r0, .L2404+12
+ ldr fp, [r5, #1800]
+ ldr r0, .L2423+12
mov r2, r1
- str r3, [r5, #4056]
- str fp, [r5, #4060]
+ str r3, [r5, #4060]
+ str fp, [r5, #4064]
ldr r3, [r8, r6, lsl #2]
- str r3, [r5, #4052]
+ str r3, [r5, #4056]
bl FlashReadPages
- ldr r3, [r5, #4048]
+ ldr r3, [r5, #4052]
adds r3, r3, #1
- bne .L2395
+ bne .L2414
movs r3, #0
- ldr r0, .L2404+16
+ ldr r0, .L2423+16
str r3, [r8, r6, lsl #2]
- ldr r1, [r5, #4052]
+ ldr r1, [r5, #4056]
ldrh r2, [fp, #8]
bl printk
movs r3, #1
- str r3, [r5, #740]
- b .L2394
-.L2395:
+ str r3, [r5, #744]
+ b .L2413
+.L2414:
mov r0, r4
mov r1, r6
- ldr r2, [r5, #4056]
+ ldr r2, [r5, #4060]
bl FtlMapWritePage
-.L2394:
+.L2413:
add r10, r10, #1
- b .L2393
-.L2403:
+ b .L2412
+.L2422:
mov r0, r9
movs r1, #1
bl FtlFreeSysBlkQueueIn
movs r3, #0
str r3, [r4, #32]
-.L2386:
+.L2405:
ldrh r2, [r4, #2]
- ldrh r3, [r7, #2900]
+ ldrh r3, [r7, #2912]
cmp r2, r3
- bcc .L2397
+ bcc .L2416
mov r0, r4
bl ftl_map_blk_alloc_new_blk
-.L2397:
+.L2416:
movs r0, #0
pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L2405:
+.L2424:
.align 2
-.L2404:
+.L2423:
.word .LANCHOR0
- .word .LC117
+ .word .LC120
.word .LANCHOR2
- .word .LANCHOR2+4048
- .word .LC118
+ .word .LANCHOR2+4052
+ .word .LC121
.fnend
.size ftl_map_blk_gc, .-ftl_map_blk_gc
.align 1
@@ -14850,16 +14977,16 @@ Ftl_write_map_blk_to_last_page:
push {r4, r5, r6, r7, r8, lr}
.save {r4, r5, r6, r7, r8, lr}
mov r4, r0
- ldr r5, .L2413
+ ldr r5, .L2432
ldr r7, [r0, #12]
ldr r8, [r0, #24]
- ldr r6, [r5, #740]
+ ldr r6, [r5, #744]
cmp r6, #0
- bne .L2407
+ bne .L2426
ldrh r3, [r0]
movw r2, #65535
cmp r3, r2
- bne .L2408
+ bne .L2427
ldrh r3, [r0, #8]
adds r3, r3, #1
strh r3, [r0, #8] @ movhi
@@ -14870,53 +14997,53 @@ Ftl_write_map_blk_to_last_page:
adds r3, r3, #1
strh r6, [r4] @ movhi
str r3, [r4, #28]
- b .L2407
-.L2408:
+ b .L2426
+.L2427:
ldrh r7, [r7, r3, lsl #1]
movs r1, #255
ldrh r3, [r0, #2]
ldr r2, [r0, #28]
orr r3, r3, r7, lsl #10
- str r3, [r5, #4052]
- ldr r3, [r5, #756]
str r3, [r5, #4056]
- ldr r3, [r5, #1796]
+ ldr r3, [r5, #1776]
str r3, [r5, #4060]
+ ldr r3, [r5, #1800]
+ str r3, [r5, #4064]
str r2, [r3, #4]
movw r2, #64245
strh r2, [r3, #8] @ movhi
ldrh r2, [r0, #4]
strh r7, [r3, #2] @ movhi
strh r2, [r3] @ movhi
- ldr r3, .L2413+4
- ldr r0, [r5, #756]
- ldrh r2, [r3, #2900]
+ ldr r3, .L2432+4
+ ldr r0, [r5, #1776]
+ ldrh r2, [r3, #2912]
lsls r2, r2, #3
bl ftl_memset
mov r3, r6
-.L2409:
+.L2428:
ldrh r1, [r4, #6]
uxth r2, r6
cmp r1, r2
- bls .L2412
+ bls .L2431
ldr r1, [r8, r2, lsl #2]
cmp r7, r1, lsr #10
- bne .L2410
+ bne .L2429
adds r3, r3, #1
- ldr r1, [r5, #756]
+ ldr r1, [r5, #1776]
uxth r3, r3
str r2, [r1, r3, lsl #3]
ldr r1, [r8, r2, lsl #2]
- ldr r2, [r5, #756]
+ ldr r2, [r5, #1776]
add r2, r2, r3, lsl #3
str r1, [r2, #4]
-.L2410:
+.L2429:
adds r6, r6, #1
- b .L2409
-.L2412:
+ b .L2428
+.L2431:
movs r1, #1
movs r3, #0
- ldr r0, .L2413+8
+ ldr r0, .L2432+8
mov r2, r1
bl FlashProgPages
ldrh r3, [r4, #2]
@@ -14924,15 +15051,15 @@ Ftl_write_map_blk_to_last_page:
adds r3, r3, #1
strh r3, [r4, #2] @ movhi
bl ftl_map_blk_gc
-.L2407:
+.L2426:
movs r0, #0
pop {r4, r5, r6, r7, r8, pc}
-.L2414:
+.L2433:
.align 2
-.L2413:
+.L2432:
.word .LANCHOR2
.word .LANCHOR0
- .word .LANCHOR2+4048
+ .word .LANCHOR2+4052
.fnend
.size Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page
.align 1
@@ -14948,48 +15075,48 @@ FtlMapWritePage:
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.pad #12
mov r5, r0
- ldr r4, .L2436
+ ldr r4, .L2455
mov r7, r1
str r2, [sp, #4]
- ldr r6, [r4, #740]
+ ldr r6, [r4, #744]
cmp r6, #0
- bne .L2431
- ldr r8, .L2436+16
+ bne .L2450
+ ldr r8, .L2455+16
mov fp, r4
mov r10, r8
-.L2417:
- ldr r3, [r4, #968]
+.L2436:
+ ldr r3, [r4, #1012]
adds r3, r3, #1
- str r3, [r4, #968]
- ldrh r3, [r8, #2900]
+ str r3, [r4, #1012]
+ ldrh r3, [r8, #2912]
ldrh r2, [r5, #2]
subs r3, r3, #1
cmp r2, r3
- bge .L2418
+ bge .L2437
ldrh r2, [r5]
movw r3, #65535
cmp r2, r3
- bne .L2419
-.L2418:
+ bne .L2438
+.L2437:
mov r0, r5
bl Ftl_write_map_blk_to_last_page
-.L2419:
+.L2438:
ldrh r2, [r5]
movs r1, #16
ldr r3, [r5, #12]
- ldr r0, [r4, #1796]
+ ldr r0, [r4, #1800]
ldrh r9, [r3, r2, lsl #1]
ldrh r3, [r5, #2]
- str r0, [r4, #4060]
+ str r0, [r4, #4064]
orr r3, r3, r9, lsl #10
- str r3, [r4, #4052]
- ldr r3, [sp, #4]
str r3, [r4, #4056]
+ ldr r3, [sp, #4]
+ str r3, [r4, #4060]
bl __memzero
- ldr r3, [r4, #4060]
+ ldr r3, [r4, #4064]
movs r1, #1
ldr r2, [r5, #28]
- ldr r0, .L2436+4
+ ldr r0, .L2455+4
strh r7, [r3, #8] @ movhi
str r2, [r3, #4]
ldrh r2, [r5, #4]
@@ -15002,136 +15129,59 @@ FtlMapWritePage:
adds r3, r3, #1
uxth r3, r3
strh r3, [r5, #2] @ movhi
- ldr r2, [r4, #4048]
+ ldr r2, [r4, #4052]
adds r1, r2, #1
- bne .L2420
- ldr r0, .L2436+8
+ bne .L2439
+ ldr r0, .L2455+8
adds r6, r6, #1
- ldr r1, [fp, #4052]
+ ldr r1, [fp, #4056]
bl printk
ldrh r3, [r5, #2]
uxth r6, r6
cmp r3, #2
ittt ls
- ldrhls r3, [r10, #2900]
+ ldrhls r3, [r10, #2912]
addls r3, r3, #-1
strhls r3, [r5, #2] @ movhi
cmp r6, #3
- bls .L2417
- ldr r0, .L2436+12
+ bls .L2436
+ ldr r0, .L2455+12
mov r2, r6
- ldr r1, [r4, #4052]
+ ldr r1, [r4, #4056]
bl printk
movs r3, #1
- str r3, [r4, #740]
- b .L2431
-.L2420:
- cbz r2, .L2423
+ str r3, [r4, #744]
+ b .L2450
+.L2439:
+ cbz r2, .L2442
cmp r3, #1
strh r9, [r5, #40] @ movhi
- beq .L2417
+ beq .L2436
cmp r2, #256
- b .L2435
-.L2423:
+ b .L2454
+.L2442:
cmp r3, #1
-.L2435:
- beq .L2417
- ldr r2, [r4, #4052]
+.L2454:
+ beq .L2436
+ ldr r2, [r4, #4056]
ldr r3, [r5, #24]
str r2, [r3, r7, lsl #2]
-.L2431:
+.L2450:
movs r0, #0
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L2437:
+.L2456:
.align 2
-.L2436:
+.L2455:
.word .LANCHOR2
- .word .LANCHOR2+4048
- .word .LC119
- .word .LC120
+ .word .LANCHOR2+4052
+ .word .LC122
+ .word .LC123
.word .LANCHOR0
.fnend
.size FtlMapWritePage, .-FtlMapWritePage
.align 1
- .global load_l2p_region
- .thumb
- .thumb_func
- .type load_l2p_region, %function
-load_l2p_region:
- .fnstart
- @ args = 0, pretend = 0, frame = 0
- @ frame_needed = 0, uses_anonymous_args = 0
- push {r4, r5, r6, r7, r8, lr}
- .save {r4, r5, r6, r7, r8, lr}
- mov r7, r0
- ldr r8, .L2442+8
- ldr r3, [r8, #1844]
- mov r5, r8
- ldr r6, [r3, r0, lsl #2]
- movs r3, #12
- cbnz r6, .L2439
- mul r4, r3, r1
- ldr r3, [r8, #932]
- movs r1, #255
- add r3, r3, r4
- ldr r0, [r3, #8]
- ldr r3, .L2442
- ldrh r2, [r3, #2908]
- bl ftl_memset
- ldr r3, [r8, #932]
- strh r7, [r3, r4] @ movhi
- ldr r3, [r8, #932]
- add r4, r4, r3
- str r6, [r4, #4]
- b .L2440
-.L2439:
- mul r4, r3, r1
- ldr r3, [r8, #932]
- movs r1, #1
- add r0, r8, #4048
- str r6, [r8, #4052]
- add r3, r3, r4
- mov r2, r1
- ldr r3, [r3, #8]
- str r3, [r8, #4056]
- ldr r3, [r8, #1796]
- str r3, [r8, #4060]
- bl FlashReadPages
- ldr r3, [r8, #4048]
- cmp r3, #256
- bne .L2441
- mov r2, r6
- mov r1, r7
- ldr r0, .L2442+4
- lsrs r6, r6, #10
- bl printk
- ldr r3, [r8, #932]
- strh r6, [r8, #1904] @ movhi
- add r0, r8, #1864
- add r3, r3, r4
- mov r1, r7
- ldr r2, [r3, #8]
- bl FtlMapWritePage
-.L2441:
- ldr r3, [r5, #932]
- movs r1, #0
- adds r2, r3, r4
- str r1, [r2, #4]
- strh r7, [r3, r4] @ movhi
-.L2440:
- movs r0, #0
- pop {r4, r5, r6, r7, r8, pc}
-.L2443:
- .align 2
-.L2442:
- .word .LANCHOR0
- .word .LC121
- .word .LANCHOR2
- .fnend
- .size load_l2p_region, .-load_l2p_region
- .align 1
.global flush_l2p_region
.thumb
.thumb_func
@@ -15143,203 +15193,28 @@ flush_l2p_region:
push {r3, r4, r5, lr}
.save {r3, r4, r5, lr}
movs r4, #12
- ldr r5, .L2445
+ ldr r5, .L2458
muls r4, r0, r4
- add r0, r5, #1864
- ldr r3, [r5, #932]
+ addw r0, r5, #1868
+ ldr r3, [r5, #980]
adds r2, r3, r4
ldrh r1, [r3, r4]
ldr r2, [r2, #8]
bl FtlMapWritePage
- ldr r3, [r5, #932]
+ ldr r3, [r5, #980]
movs r0, #0
add r4, r4, r3
ldr r3, [r4, #4]
bic r3, r3, #-2147483648
str r3, [r4, #4]
pop {r3, r4, r5, pc}
-.L2446:
+.L2459:
.align 2
-.L2445:
+.L2458:
.word .LANCHOR2
.fnend
.size flush_l2p_region, .-flush_l2p_region
.align 1
- .global log2phys
- .thumb
- .thumb_func
- .type log2phys, %function
-log2phys:
- .fnstart
- @ args = 0, pretend = 0, frame = 0
- @ frame_needed = 0, uses_anonymous_args = 0
- push {r4, r5, r6, r7, r8, r9, r10, lr}
- .save {r4, r5, r6, r7, r8, r9, r10, lr}
- movs r3, #1
- ldr r5, .L2461
- mov r9, r2
- mov r8, r1
- movs r1, #12
- ldrh r4, [r5, #2906]
- ldrh r2, [r5, #2938]
- adds r4, r4, #7
- lsr r7, r0, r4
- lsls r3, r3, r4
- ldr r4, .L2461+4
- subs r3, r3, #1
- ands r0, r0, r3
- uxth r7, r7
- movs r3, #0
- ldr r10, [r4, #932]
- uxth r6, r0
-.L2448:
- uxth r5, r3
- cmp r5, r2
- bcs .L2460
- adds r3, r3, #1
- mla r0, r1, r3, r10
- ldrh r0, [r0, #-12]
- cmp r0, r7
- bne .L2448
-.L2449:
- movs r3, #12
- cmp r9, #0
- bne .L2450
- ldr r2, [r4, #932]
- mla r3, r3, r5, r2
- ldr r3, [r3, #8]
- ldr r3, [r3, r6, lsl #2]
- str r3, [r8]
- b .L2451
-.L2450:
- muls r3, r5, r3
- ldr r2, [r4, #932]
- ldr r1, [r8]
- add r2, r2, r3
- ldr r2, [r2, #8]
- str r1, [r2, r6, lsl #2]
- ldr r2, [r4, #932]
- strh r7, [r4, #936] @ movhi
- add r3, r3, r2
- ldr r2, [r3, #4]
- orr r2, r2, #-2147483648
- str r2, [r3, #4]
-.L2451:
- ldr r2, [r4, #932]
- movs r3, #12
- mla r5, r3, r5, r2
- ldr r3, [r5, #4]
- adds r2, r3, #1
- beq .L2457
- adds r3, r3, #1
- str r3, [r5, #4]
- b .L2457
-.L2460:
- bl select_l2p_ram_region
- movs r3, #12
- muls r3, r0, r3
- mov r5, r0
- add r2, r10, r3
- ldrh r1, [r10, r3]
- movw r3, #65535
- cmp r1, r3
- beq .L2454
- ldr r3, [r2, #4]
- cmp r3, #0
- bge .L2454
- bl flush_l2p_region
-.L2454:
- mov r0, r7
- mov r1, r5
- bl load_l2p_region
- b .L2449
-.L2457:
- movs r0, #0
- pop {r4, r5, r6, r7, r8, r9, r10, pc}
-.L2462:
- .align 2
-.L2461:
- .word .LANCHOR0
- .word .LANCHOR2
- .fnend
- .size log2phys, .-log2phys
- .align 1
- .global FtlReUsePrevPpa
- .thumb
- .thumb_func
- .type FtlReUsePrevPpa, %function
-FtlReUsePrevPpa:
- .fnstart
- @ args = 0, pretend = 0, frame = 8
- @ frame_needed = 0, uses_anonymous_args = 0
- push {r0, r1, r2, r4, r5, r6, r7, lr}
- .save {r4, r5, r6, r7, lr}
- .pad #12
- mov r6, r0
- ubfx r0, r1, #10, #16
- str r1, [sp, #4]
- bl P2V_block_in_plane
- ldr r5, .L2472
- ldr r4, [r5, #768]
- ldrh r3, [r4, r0, lsl #1]
- cbnz r3, .L2464
- ldr r4, [r5, #780]
- cbz r4, .L2465
- ldr r1, [r5, #760]
- mov lr, #6
- ldr r2, .L2472+4
- movw ip, #65535
- subs r4, r4, r1
- ldrh r7, [r5, #784]
- asrs r4, r4, #1
- muls r4, r2, r4
- uxth r4, r4
-.L2466:
- uxth r2, r3
- cmp r2, r7
- bcs .L2465
- cmp r4, r0
- bne .L2467
- mov r1, r4
- ldr r0, .L2472+8
- bl List_remove_node
- ldrh r3, [r5, #784]
- mov r0, r4
- subs r3, r3, #1
- strh r3, [r5, #784] @ movhi
- bl INSERT_DATA_LIST
- ldr r2, [r5, #768]
- ldrh r3, [r2, r4, lsl #1]
- adds r3, r3, #1
- strh r3, [r2, r4, lsl #1] @ movhi
- b .L2465
-.L2467:
- mul r4, lr, r4
- adds r3, r3, #1
- ldrh r4, [r1, r4]
- cmp r4, ip
- bne .L2466
- b .L2465
-.L2464:
- adds r3, r3, #1
- strh r3, [r4, r0, lsl #1] @ movhi
-.L2465:
- mov r0, r6
- add r1, sp, #4
- movs r2, #1
- bl log2phys
- add sp, sp, #12
- @ sp needed
- pop {r4, r5, r6, r7, pc}
-.L2473:
- .align 2
-.L2472:
- .word .LANCHOR2
- .word -1431655765
- .word .LANCHOR2+780
- .fnend
- .size FtlReUsePrevPpa, .-FtlReUsePrevPpa
- .align 1
.global FtlMapTblRecovery
.thumb
.thumb_func
@@ -15358,7 +15233,7 @@ FtlMapTblRecovery:
movs r1, #0
ldr r10, [r0, #24]
movs r6, #0
- ldr r5, .L2520
+ ldr r5, .L2508
str r3, [sp, #12]
lsl r2, fp, #2
ldrh r3, [r0, #8]
@@ -15366,122 +15241,122 @@ FtlMapTblRecovery:
mov r0, r10
str r3, [sp, #8]
bl ftl_memset
- ldr r3, [r5, #756]
- ldr r7, [r5, #1796]
+ ldr r3, [r5, #1776]
+ ldr r7, [r5, #1800]
str r6, [r4, #32]
- str r3, [r5, #4056]
+ str r3, [r5, #4060]
movw r3, #65535
- str r7, [r5, #4060]
+ str r7, [r5, #4064]
str r6, [r4, #28]
strh r3, [r4] @ movhi
strh r3, [r4, #2] @ movhi
movs r3, #1
str r3, [r4, #36]
-.L2475:
+.L2461:
uxth ip, r6
ldr r3, [sp, #8]
sxth r9, ip
cmp r9, r3
- bge .L2492
+ bge .L2478
ldr r3, [sp, #8]
subs r2, r3, #1
cmp r9, r2
lsl r2, r9, #1
- bne .L2476
+ bne .L2462
ldrh r0, [r8, r9, lsl #1]
movs r1, #1
str ip, [sp, #8]
add r6, r8, r2
bl FtlGetLastWrittenPage
- adds r3, r0, #1
ldr ip, [sp, #8]
- strh r3, [r4, #2] @ movhi
- sxth r0, r0
- ldr r3, [sp, #12]
strh ip, [r4] @ movhi
mov ip, #0
+ adds r3, r0, #1
+ strh r3, [r4, #2] @ movhi
+ ldr r3, [sp, #12]
+ sxth r0, r0
ldr r3, [r3, r9, lsl #2]
add r9, r0, #1
str r3, [r4, #28]
- ldr r3, .L2520
-.L2477:
+ ldr r3, .L2508
+.L2463:
sxth r2, ip
cmp r2, r9
- bge .L2492
+ bge .L2478
ldrh r1, [r6]
- ldr r0, .L2520+4
+ ldr r0, .L2508+4
str r3, [sp, #12]
orr r2, r2, r1, lsl #10
movs r1, #1
- str r2, [r5, #4052]
+ str r2, [r5, #4056]
mov r2, r1
str ip, [sp, #8]
bl FlashReadPages
- ldr r2, [r5, #4048]
- adds r2, r2, #1
+ ldr r2, [r5, #4052]
ldr ip, [sp, #8]
+ adds r2, r2, #1
ldr r3, [sp, #12]
- beq .L2478
+ beq .L2464
ldrh r2, [r7, #8]
cmp r2, fp
- bcs .L2479
+ bcs .L2465
ldrh r0, [r7]
ldrh r1, [r4, #4]
cmp r0, r1
- bne .L2479
- ldr r1, [r3, #4052]
+ bne .L2465
+ ldr r1, [r3, #4056]
str r1, [r10, r2, lsl #2]
- b .L2479
-.L2478:
+ b .L2465
+.L2464:
ldrh r2, [r6]
strh r2, [r4, #40] @ movhi
-.L2479:
+.L2465:
add ip, ip, #1
- b .L2477
-.L2492:
- ldr r3, .L2520+8
- ldr r10, .L2520+12
+ b .L2463
+.L2478:
+ ldr r3, .L2508+8
+ ldr r10, .L2508+12
cmp r4, r3
- bne .L2482
- b .L2517
-.L2476:
- ldr r1, [r5, #756]
+ bne .L2468
+ b .L2505
+.L2462:
+ ldr r1, [r5, #1776]
add r3, r8, r2
str r3, [sp, #16]
- ldr r3, .L2520+12
- str r1, [r5, #4056]
+ ldr r3, .L2508+12
+ str r1, [r5, #4060]
ldrh r1, [r8, r9, lsl #1]
- ldrh r2, [r3, #2900]
- ldr r0, .L2520+4
+ ldrh r2, [r3, #2912]
+ ldr r0, .L2508+4
subs r2, r2, #1
orr r2, r2, r1, lsl #10
movs r1, #1
- str r2, [r5, #4052]
+ str r2, [r5, #4056]
mov r2, r1
bl FlashReadPages
- ldr r2, [r5, #4048]
+ ldr r2, [r5, #4052]
adds r2, r2, #1
- beq .L2506
+ beq .L2493
ldrh r1, [r7]
ldrh r2, [r4, #4]
cmp r1, r2
- bne .L2506
+ bne .L2493
ldrh r1, [r7, #8]
movw r2, #64245
cmp r1, r2
- bne .L2506
+ bne .L2493
movs r0, #0
mov ip, #8
mov r9, #4
-.L2484:
- ldr r3, .L2520+12
+.L2470:
+ ldr r3, .L2508+12
uxth r2, r0
sxth lr, r2
- ldrh r1, [r3, #2900]
+ ldrh r1, [r3, #2912]
subs r1, r1, #1
cmp lr, r1
- bge .L2487
- ldr r1, [r5, #756]
+ bge .L2473
+ ldr r1, [r5, #1776]
adds r0, r0, #1
ldrh lr, [r1, lr, lsl #3]
cmp lr, fp
@@ -15489,152 +15364,151 @@ FtlMapTblRecovery:
smlabbcc r2, r2, ip, r9
ldrcc r2, [r1, r2]
strcc r2, [r10, lr, lsl #2]
- b .L2484
-.L2506:
- ldr r3, .L2520
+ b .L2470
+.L2493:
+ ldr r3, .L2508
mov r9, #0
-.L2514:
- ldr r1, .L2520+12
+.L2502:
+ ldr r1, .L2508+12
sxth r2, r9
- ldrh r1, [r1, #2900]
+ ldrh r1, [r1, #2912]
cmp r2, r1
- bge .L2487
+ bge .L2473
ldr r1, [sp, #16]
- ldr r0, .L2520+4
+ ldr r0, .L2508+4
str r3, [sp, #20]
ldrh r1, [r1]
orr r2, r2, r1, lsl #10
movs r1, #1
- str r2, [r3, #4052]
+ str r2, [r3, #4056]
mov r2, r1
bl FlashReadPages
ldr r3, [sp, #20]
- ldr r2, [r3, #4048]
+ ldr r2, [r3, #4052]
adds r2, r2, #1
- beq .L2488
+ beq .L2474
ldrh r2, [r7, #8]
cmp r2, fp
- bcs .L2488
+ bcs .L2474
ldrh r1, [r4, #4]
ldrh r0, [r7]
cmp r0, r1
itt eq
- ldreq r1, [r3, #4052]
+ ldreq r1, [r3, #4056]
streq r1, [r10, r2, lsl #2]
-.L2488:
+.L2474:
add r9, r9, #1
- b .L2514
-.L2487:
+ b .L2502
+.L2473:
adds r6, r6, #1
- b .L2475
-.L2503:
- ldr r2, [r5, #1848]
+ b .L2461
+.L2490:
+ ldr r3, [r5, #1852]
lsl r7, r9, #2
- ldr r3, [r2, r9, lsl #2]
- subs r1, r3, #1
+ ldr r2, [r3, r9, lsl #2]
+ subs r1, r2, #1
adds r1, r1, #3
- bls .L2518
-.L2497:
+ bls .L2506
+.L2483:
add r9, r9, #1
-.L2495:
- ldrh r3, [r10, #2936]
+.L2481:
+ ldrh r3, [r10, #2948]
cmp r9, r3
- bcc .L2503
-.L2482:
+ bcc .L2490
+.L2468:
mov r0, r4
bl ftl_free_no_use_map_blk
ldrh r2, [r4, #2]
- ldrh r3, [r10, #2900]
+ ldrh r3, [r10, #2912]
cmp r2, r3
- bne .L2494
+ bne .L2480
mov r0, r4
bl ftl_map_blk_alloc_new_blk
- b .L2494
-.L2517:
- ldrh r3, [r10, #2944]
+ b .L2480
+.L2505:
+ ldrh r3, [r10, #2952]
cmp r3, #0
- beq .L2482
+ beq .L2468
mov r9, #0
- sub r6, r4, #1864
- b .L2495
-.L2518:
- ldr r1, [r6, #1844]
+ subw r6, r4, #1868
+ b .L2481
+.L2506:
+ ldr r1, [r6, #1848]
ldr r1, [r1, r9, lsl #2]
- cmp r3, r1
- beq .L2497
- ldr r3, [r6, #756]
+ cmp r2, r1
+ beq .L2483
+ ldr r2, [r6, #1776]
movs r1, #1
- ldr r0, .L2520+4
- str r3, [r6, #4056]
- ldr r3, [r6, #1796]
- str r3, [r6, #4060]
- ldr r2, [r2, r7]
- str r3, [sp, #8]
- str r2, [r6, #4052]
+ ldr fp, [r6, #1800]
+ ldr r0, .L2508+4
+ str r2, [r6, #4060]
mov r2, r1
+ str fp, [r6, #4064]
+ ldr r3, [r3, r7]
+ str r3, [r6, #4056]
bl FlashReadPages
- ldr r2, [r6, #4048]
- adds r2, r2, #1
- ldr r3, [sp, #8]
- beq .L2510
- ldrh r1, [r3]
- ldrh r2, [r6, #1868]
- cmp r1, r2
- bne .L2510
- ldr fp, [r3, #4]
- b .L2499
-.L2510:
- mov fp, #0
-.L2499:
- ldr r2, [r5, #1844]
+ ldr r3, [r6, #4052]
+ adds r3, r3, #1
+ beq .L2483
+ ldrh r2, [fp]
+ ldrh r3, [r6, #1872]
+ cmp r2, r3
+ bne .L2483
+ ldr r2, [r6, #1848]
+ ldr r3, [fp, #4]
+ ldr r1, [r2, r7]
+ str r1, [r6, #4056]
+ ldr r2, [r2, r7]
+ cbnz r2, .L2485
+ str r2, [fp, #4]
+ b .L2486
+.L2485:
movs r1, #1
- ldr r0, .L2520+4
+ ldr r0, .L2508+4
str r3, [sp, #8]
- ldr r2, [r2, r7]
- str r2, [r5, #4052]
mov r2, r1
bl FlashReadPages
ldr r3, [sp, #8]
- ldr r1, [r3, #4]
- cmp fp, r1
- bls .L2497
- ldr r2, [r6, #1848]
- ldr r3, [r6, #1844]
- str r1, [sp]
- ldr r1, [r2, r7]
- ldr r0, .L2520+16
- ldr r2, [r3, r7]
- mov r3, fp
+.L2486:
+ ldr r0, [fp, #4]
+ cmp r3, r0
+ bls .L2483
+ ldr r1, [r5, #1852]
+ ldr r2, [r5, #1848]
+ str r0, [sp]
+ ldr r1, [r1, r7]
+ ldr r2, [r2, r7]
+ ldr r0, .L2508+16
bl printk
- ldr r3, [r6, #1848]
+ ldr r3, [r5, #1852]
ldr r2, [r3, r7]
- ldr r3, [r6, #1844]
+ ldr r3, [r5, #1848]
str r2, [r3, r7]
movs r2, #0
- ldr r3, [r6, #1848]
+ ldr r3, [r5, #1852]
ldr r0, [r3, r7]
- ldrh r3, [r6, #1908]
+ ldrh r3, [r5, #1912]
ubfx r0, r0, #10, #16
-.L2500:
+.L2487:
sxth r1, r2
cmp r1, r3
- bge .L2519
+ bge .L2507
ldrh r1, [r8, r1, lsl #1]
adds r2, r2, #1
cmp r1, r0
- bne .L2500
- b .L2497
-.L2519:
- ldr r2, [r10, #2928]
+ bne .L2487
+ b .L2483
+.L2507:
+ ldr r2, [r10, #2940]
cmp r3, r2
- bcs .L2497
+ bcs .L2483
strh r0, [r8, r3, lsl #1] @ movhi
- ldrh r3, [r5, #1908]
+ ldrh r3, [r5, #1912]
adds r3, r3, #1
- strh r3, [r5, #1908] @ movhi
+ strh r3, [r5, #1912] @ movhi
bl remove_from_free_sys_Queue
- b .L2497
-.L2494:
+ b .L2483
+.L2480:
mov r0, r4
bl ftl_map_blk_gc
mov r0, r4
@@ -15643,14 +15517,14 @@ FtlMapTblRecovery:
add sp, sp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L2521:
+.L2509:
.align 2
-.L2520:
+.L2508:
.word .LANCHOR2
- .word .LANCHOR2+4048
- .word .LANCHOR2+1864
+ .word .LANCHOR2+4052
+ .word .LANCHOR2+1868
.word .LANCHOR0
- .word .LC122
+ .word .LC124
.fnend
.size FtlMapTblRecovery, .-FtlMapTblRecovery
.align 1
@@ -15664,40 +15538,42 @@ FtlLoadVonderInfo:
@ frame_needed = 0, uses_anonymous_args = 0
push {r3, lr}
.save {r3, lr}
- movw r2, #4098
- ldr r3, .L2523
- ldr r0, .L2523+4
- ldrh r1, [r3, #2920]
+ movw r2, #4102
+ ldr r3, .L2511
+ ldr r0, .L2511+4
+ ldrh r1, [r3, #2932]
strh r1, [r0, r2] @ movhi
- movw r2, #61574
- ldrh r1, [r3, #2946]
- strh r2, [r0, #4092] @ movhi
add r2, r0, #4096
+ movw r1, #61574
strh r1, [r2] @ movhi
- ldrh r2, [r3, #2922]
- strh r2, [r0, #4094] @ movhi
- ldr r2, [r3, #2948]
- movw r3, #4100
- str r2, [r0, r3]
+ movw r2, #4100
+ ldrh r1, [r3, #2954]
+ strh r1, [r0, r2] @ movhi
+ movw r2, #4098
+ ldrh r1, [r3, #2934]
+ strh r1, [r0, r2] @ movhi
+ ldr r2, [r3, #2956]
movw r3, #4104
- ldr r2, [r0, #1836]
str r2, [r0, r3]
movw r3, #4108
- ldr r2, [r0, #1832]
+ ldr r2, [r0, #1840]
str r2, [r0, r3]
movw r3, #4112
- ldr r2, [r0, #1840]
+ ldr r2, [r0, #1836]
str r2, [r0, r3]
- add r3, r0, #4128
- addw r0, r0, #4088
+ movw r3, #4116
+ ldr r2, [r0, #1844]
+ str r2, [r0, r3]
+ movw r3, #4132
movw r2, #65535
- strh r2, [r3] @ movhi
+ strh r2, [r0, r3] @ movhi
+ addw r0, r0, #4092
bl FtlMapTblRecovery
movs r0, #0
pop {r3, pc}
-.L2524:
+.L2512:
.align 2
-.L2523:
+.L2511:
.word .LANCHOR0
.word .LANCHOR2
.fnend
@@ -15714,17 +15590,246 @@ FtlLoadMapInfo:
push {r3, lr}
.save {r3, lr}
bl FtlL2PDataInit
- ldr r0, .L2526
+ ldr r0, .L2514
bl FtlMapTblRecovery
movs r0, #0
pop {r3, pc}
-.L2527:
+.L2515:
.align 2
-.L2526:
- .word .LANCHOR2+1864
+.L2514:
+ .word .LANCHOR2+1868
.fnend
.size FtlLoadMapInfo, .-FtlLoadMapInfo
.align 1
+ .global log2phys
+ .thumb
+ .thumb_func
+ .type log2phys, %function
+log2phys:
+ .fnstart
+ @ args = 0, pretend = 0, frame = 8
+ @ frame_needed = 0, uses_anonymous_args = 0
+ push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
+ .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
+ .pad #12
+ mov r8, #1
+ str r2, [sp]
+ mov r10, r1
+ ldr r2, .L2532
+ movs r3, #0
+ ldr r1, .L2532+4
+ ldrh r4, [r2, #2918]
+ str r2, [sp, #4]
+ mov fp, r1
+ adds r4, r4, #7
+ lsl r5, r8, r4
+ lsr r6, r0, r4
+ subs r4, r5, #1
+ ands r0, r0, r4
+ ldr r4, [r1, #980]
+ uxth r6, r6
+ uxth r7, r0
+ ldrh r0, [r2, #2950]
+ movs r2, #12
+.L2517:
+ uxth r8, r3
+ cmp r8, r0
+ bcs .L2531
+ adds r3, r3, #1
+ mla r1, r2, r3, r4
+ ldrh r1, [r1, #-12]
+ cmp r1, r6
+ bne .L2517
+.L2518:
+ ldr r2, [sp]
+ movs r3, #12
+ cbnz r2, .L2519
+ ldr r2, [fp, #980]
+ mla r3, r3, r8, r2
+ ldr r3, [r3, #8]
+ ldr r3, [r3, r7, lsl #2]
+ str r3, [r10]
+ b .L2520
+.L2519:
+ mul r3, r3, r8
+ ldr r2, [fp, #980]
+ ldr r1, [r10]
+ add r2, r2, r3
+ ldr r2, [r2, #8]
+ str r1, [r2, r7, lsl #2]
+ ldr r2, [fp, #980]
+ strh r6, [fp, #984] @ movhi
+ add r3, r3, r2
+ ldr r2, [r3, #4]
+ orr r2, r2, #-2147483648
+ str r2, [r3, #4]
+.L2520:
+ ldr r2, [fp, #980]
+ movs r3, #12
+ mla r8, r3, r8, r2
+ ldr r3, [r8, #4]
+ adds r2, r3, #1
+ beq .L2528
+ adds r3, r3, #1
+ str r3, [r8, #4]
+ b .L2528
+.L2531:
+ bl select_l2p_ram_region
+ movs r5, #12
+ movw r2, #65535
+ muls r5, r0, r5
+ mov r8, r0
+ adds r3, r4, r5
+ ldrh r1, [r4, r5]
+ cmp r1, r2
+ beq .L2523
+ ldr r3, [r3, #4]
+ cmp r3, #0
+ bge .L2523
+ bl flush_l2p_region
+.L2523:
+ ldr r3, [fp, #1848]
+ ldr r4, .L2532+4
+ ldr r9, [r3, r6, lsl #2]
+ cmp r9, #0
+ bne .L2524
+ ldr r2, [r4, #980]
+ movs r1, #255
+ ldr r3, [sp, #4]
+ add r2, r2, r5
+ ldr r0, [r2, #8]
+ ldrh r2, [r3, #2920]
+ bl ftl_memset
+ ldr r2, [r4, #980]
+ strh r6, [r2, r5] @ movhi
+ ldr r2, [r4, #980]
+ add r5, r5, r2
+ str r9, [r5, #4]
+ b .L2518
+.L2524:
+ ldr r2, [r4, #980]
+ movs r1, #1
+ addw r0, r4, #4052
+ str r9, [r4, #4056]
+ add r2, r2, r5
+ ldr r2, [r2, #8]
+ str r2, [r4, #4060]
+ ldr r2, [r4, #1800]
+ str r2, [r4, #4064]
+ mov r2, r1
+ bl FlashReadPages
+ ldr r2, [r4, #4052]
+ cmp r2, #256
+ bne .L2525
+ mov r1, r6
+ mov r2, r9
+ ldr r0, .L2532+8
+ bl printk
+ lsr r3, r9, #10
+ strh r3, [r4, #1908] @ movhi
+ addw r0, r4, #1868
+ ldr r3, [r4, #980]
+ mov r1, r6
+ add r3, r3, r5
+ ldr r2, [r3, #8]
+ bl FtlMapWritePage
+.L2525:
+ ldr r3, [fp, #980]
+ movs r1, #0
+ adds r2, r3, r5
+ str r1, [r2, #4]
+ strh r6, [r3, r5] @ movhi
+ b .L2518
+.L2528:
+ movs r0, #0
+ add sp, sp, #12
+ @ sp needed
+ pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
+.L2533:
+ .align 2
+.L2532:
+ .word .LANCHOR0
+ .word .LANCHOR2
+ .word .LC125
+ .fnend
+ .size log2phys, .-log2phys
+ .align 1
+ .global FtlReUsePrevPpa
+ .thumb
+ .thumb_func
+ .type FtlReUsePrevPpa, %function
+FtlReUsePrevPpa:
+ .fnstart
+ @ args = 0, pretend = 0, frame = 8
+ @ frame_needed = 0, uses_anonymous_args = 0
+ push {r0, r1, r2, r4, r5, r6, r7, lr}
+ .save {r4, r5, r6, r7, lr}
+ .pad #12
+ mov r6, r0
+ ubfx r0, r1, #10, #16
+ str r1, [sp, #4]
+ bl P2V_block_in_plane
+ ldr r5, .L2543
+ ldr r4, [r5, #816]
+ ldrh r3, [r4, r0, lsl #1]
+ cbnz r3, .L2535
+ ldr r4, [r5, #828]
+ cbz r4, .L2536
+ ldr r1, [r5, #808]
+ mov lr, #6
+ ldr r2, .L2543+4
+ movw ip, #65535
+ subs r4, r4, r1
+ ldrh r7, [r5, #832]
+ asrs r4, r4, #1
+ muls r4, r2, r4
+ uxth r4, r4
+.L2537:
+ uxth r2, r3
+ cmp r2, r7
+ bcs .L2536
+ cmp r4, r0
+ bne .L2538
+ mov r1, r4
+ ldr r0, .L2543+8
+ bl List_remove_node
+ ldrh r3, [r5, #832]
+ mov r0, r4
+ subs r3, r3, #1
+ strh r3, [r5, #832] @ movhi
+ bl INSERT_DATA_LIST
+ ldr r2, [r5, #816]
+ ldrh r3, [r2, r4, lsl #1]
+ adds r3, r3, #1
+ strh r3, [r2, r4, lsl #1] @ movhi
+ b .L2536
+.L2538:
+ mul r4, lr, r4
+ adds r3, r3, #1
+ ldrh r4, [r1, r4]
+ cmp r4, ip
+ bne .L2537
+ b .L2536
+.L2535:
+ adds r3, r3, #1
+ strh r3, [r4, r0, lsl #1] @ movhi
+.L2536:
+ mov r0, r6
+ add r1, sp, #4
+ movs r2, #1
+ bl log2phys
+ add sp, sp, #12
+ @ sp needed
+ pop {r4, r5, r6, r7, pc}
+.L2544:
+ .align 2
+.L2543:
+ .word .LANCHOR2
+ .word -1431655765
+ .word .LANCHOR2+828
+ .fnend
+ .size FtlReUsePrevPpa, .-FtlReUsePrevPpa
+ .align 1
.global FtlReadRefresh
.thumb
.thumb_func
@@ -15733,36 +15838,36 @@ FtlReadRefresh:
.fnstart
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L2543
+ ldr r3, .L2560
push {r4, r5, r6, r7, lr}
.save {r4, r5, r6, r7, lr}
.pad #44
sub sp, sp, #44
- ldr r2, [r3, #1208]
+ ldr r2, [r3, #1204]
mov r4, r3
- ldr r5, .L2543+4
+ ldr r5, .L2560+4
cmp r2, #0
- beq .L2529
- ldr r1, [r3, #1212]
- ldr r2, [r5, #2960]
+ beq .L2546
+ ldr r1, [r3, #1208]
+ ldr r2, [r5, #2968]
cmp r1, r2
- bcs .L2530
+ bcs .L2547
mov r6, #2048
mov r7, r3
-.L2535:
- ldr r0, [r4, #1212]
- ldr r3, [r5, #2960]
+.L2552:
+ ldr r0, [r4, #1208]
+ ldr r3, [r5, #2968]
cmp r0, r3
- bcs .L2532
+ bcs .L2549
mov r1, sp
movs r2, #0
bl log2phys
- ldr r3, [r7, #1212]
- adds r3, r3, #1
- str r3, [r7, #1212]
ldr r2, [sp]
+ ldr r3, [r7, #1208]
adds r1, r2, #1
- beq .L2533
+ add r3, r3, #1
+ str r3, [r7, #1208]
+ beq .L2550
add r0, sp, #40
str r2, [sp, #8]
movs r1, #1
@@ -15774,64 +15879,64 @@ FtlReadRefresh:
bl FlashReadPages
ldr r3, [sp, #4]
cmp r3, #256
- bne .L2532
+ bne .L2549
ldr r0, [sp]
ubfx r0, r0, #10, #16
bl P2V_block_in_plane
bl FtlGcRefreshBlock
- b .L2532
-.L2533:
+ b .L2549
+.L2550:
subs r6, r6, #1
- bne .L2535
-.L2532:
+ bne .L2552
+.L2549:
mov r0, #-1
- b .L2537
-.L2530:
- ldr r2, [r3, #952]
+ b .L2554
+.L2547:
+ ldr r2, [r3, #996]
movs r0, #0
+ str r0, [r3, #1204]
str r0, [r3, #1208]
- str r0, [r3, #1212]
- str r2, [r3, #1204]
- b .L2537
-.L2529:
+ str r2, [r3, #1200]
+ b .L2554
+.L2546:
ldrb r2, [r5, #76] @ zero_extendqisi2
- ldr r1, [r3, #1004]
- ldr r3, [r3, #948]
- cbnz r2, .L2540
+ ldr r1, [r3, #1048]
+ ldr r3, [r5, #2832]
+ cbnz r2, .L2557
mov r2, #33554432
add r3, r3, r1, lsr #10
asrs r2, r2, r3
- b .L2538
-.L2540:
+ b .L2555
+.L2557:
mov r2, #4194304
-.L2538:
- ldr r1, [r4, #952]
- ldr r3, [r4, #1204]
+.L2555:
+ ldr r1, [r4, #996]
+ ldr r3, [r4, #1200]
add r0, r1, #1048576
cmp r3, r0
- bhi .L2539
+ bhi .L2556
add r3, r3, r2
cmp r3, r1
- bcc .L2539
- ldr r3, .L2543
- ldrb r3, [r3, #1040] @ zero_extendqisi2
- cbnz r3, .L2541
-.L2539:
+ bcc .L2556
+ ldr r3, .L2560
+ ldrb r3, [r3, #788] @ zero_extendqisi2
+ cbnz r3, .L2558
+.L2556:
movs r3, #1
movs r0, #0
- str r3, [r4, #1208]
- str r0, [r4, #1212]
- str r1, [r4, #1204]
- b .L2537
-.L2541:
+ str r3, [r4, #1204]
+ str r0, [r4, #1208]
+ str r1, [r4, #1200]
+ b .L2554
+.L2558:
movs r0, #0
-.L2537:
+.L2554:
add sp, sp, #44
@ sp needed
pop {r4, r5, r6, r7, pc}
-.L2544:
+.L2561:
.align 2
-.L2543:
+.L2560:
.word .LANCHOR2
.word .LANCHOR0
.fnend
@@ -15845,52 +15950,52 @@ FtlVendorPartWrite:
.fnstart
@ args = 0, pretend = 0, frame = 56
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L2558
+ ldr r3, .L2575
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r5, r0
mov r4, r1
add r0, r0, r1
- ldrh r1, [r3, #2892]
+ ldrh r1, [r3, #2904]
.pad #60
sub sp, sp, #60
mov r10, r2
- ldrh r2, [r3, #2906]
+ ldrh r2, [r3, #2918]
cmp r0, r1
str r3, [sp, #4]
- bhi .L2553
- ldr r7, .L2558+4
+ bhi .L2570
+ ldr r7, .L2575+4
lsr r6, r5, r2
mov fp, #0
lsls r3, r6, #2
str r3, [sp]
-.L2547:
+.L2564:
cmp r4, #0
- beq .L2557
- ldr r3, .L2558+4
+ beq .L2574
+ ldr r3, .L2575+4
mov r0, r5
ldr r2, [sp]
- ldr r3, [r3, #1840]
+ ldr r3, [r3, #1844]
ldr ip, [r3, r2]
ldr r3, [sp, #4]
str ip, [sp, #12]
- ldrh r2, [r3, #2904]
+ ldrh r2, [r3, #2916]
mov r1, r2
str r2, [sp, #8]
bl __aeabi_uidivmod
ldr r2, [sp, #8]
- mov r8, r1
ldr ip, [sp, #12]
subs r3, r2, r1
+ mov r8, r1
uxth r9, r3
cmp r9, r4
it hi
uxthhi r9, r4
cmp ip, #0
- beq .L2549
+ beq .L2566
cmp r9, r2
- beq .L2549
- ldr r2, [r7, #1780]
+ beq .L2566
+ ldr r2, [r7, #1784]
movs r1, #1
add r0, sp, #20
str ip, [sp, #24]
@@ -15899,16 +16004,16 @@ FtlVendorPartWrite:
str r2, [sp, #32]
mov r2, r1
bl FlashReadPages
- b .L2550
-.L2549:
+ b .L2567
+.L2566:
ldr r3, [sp, #4]
movs r1, #0
- ldr r0, [r7, #1780]
- ldrh r2, [r3, #2908]
+ ldr r0, [r7, #1784]
+ ldrh r2, [r3, #2920]
bl ftl_memset
-.L2550:
+.L2567:
lsl ip, r9, #9
- ldr r0, [r7, #1780]
+ ldr r0, [r7, #1784]
uxth r8, r8
mov r1, r10
mov r2, ip
@@ -15917,35 +16022,35 @@ FtlVendorPartWrite:
rsb r4, r9, r4
bl ftl_memcpy
mov r1, r6
- ldr r0, .L2558+8
+ ldr r0, .L2575+8
adds r6, r6, #1
- ldr r2, [r7, #1780]
+ ldr r2, [r7, #1784]
add r5, r5, r9
bl FtlMapWritePage
ldr r3, [sp]
- adds r0, r0, #1
ldr ip, [sp, #8]
- it eq
- moveq fp, #-1
adds r3, r3, #4
str r3, [sp]
add r10, r10, ip
- b .L2547
-.L2557:
+ adds r0, r0, #1
+ it eq
+ moveq fp, #-1
+ b .L2564
+.L2574:
mov r0, fp
- b .L2546
-.L2553:
+ b .L2563
+.L2570:
mov r0, #-1
-.L2546:
+.L2563:
add sp, sp, #60
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L2559:
+.L2576:
.align 2
-.L2558:
+.L2575:
.word .LANCHOR0
.word .LANCHOR2
- .word .LANCHOR2+4088
+ .word .LANCHOR2+4092
.fnend
.size FtlVendorPartWrite, .-FtlVendorPartWrite
.align 1
@@ -15958,53 +16063,53 @@ Ftl_save_ext_data:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r2, .L2562
- ldr r3, .L2562+4
- ldr r1, [r2, #1128]
+ ldr r2, .L2579
+ ldr r3, .L2579+4
+ ldr r1, [r2, #1124]
cmp r1, r3
- bne .L2560
- ldr r3, .L2562+8
+ bne .L2577
+ ldr r3, .L2579+8
movs r0, #0
movs r1, #1
- str r3, [r2, #1132]
- ldr r3, [r2, #976]
+ str r3, [r2, #1128]
+ ldr r3, [r2, #1020]
+ str r3, [r2, #1212]
+ ldr r3, [r2, #1024]
str r3, [r2, #1216]
- ldr r3, [r2, #980]
- str r3, [r2, #1220]
- ldr r3, [r2, #972]
+ ldr r3, [r2, #1016]
+ str r3, [r2, #1132]
+ ldr r3, [r2, #1004]
str r3, [r2, #1136]
- ldr r3, [r2, #960]
+ ldr r3, [r2, #996]
str r3, [r2, #1140]
- ldr r3, [r2, #952]
+ ldr r3, [r2, #1012]
str r3, [r2, #1144]
- ldr r3, [r2, #968]
- str r3, [r2, #1148]
- ldr r3, [r2, #996]
- str r3, [r2, #1156]
- ldr r3, [r2, #752]
- add r2, r2, #1128
+ ldr r3, [r2, #1040]
+ str r3, [r2, #1152]
+ ldr r3, [r2, #756]
+ addw r2, r2, #1124
str r3, [r2, #32]
- ldr r3, [r2, #-172]
+ ldr r3, [r2, #-124]
str r3, [r2, #36]
- ldr r3, [r2, #-164]
+ ldr r3, [r2, #-116]
str r3, [r2, #40]
- ldr r3, [r2, #-124]
+ ldr r3, [r2, #-76]
str r3, [r2, #44]
- ldr r3, [r2, #-120]
+ ldr r3, [r2, #-72]
str r3, [r2, #48]
ldr r3, [r2, #-4]
str r3, [r2, #60]
ldr r3, [r2, #612]
str r3, [r2, #64]
b FtlVendorPartWrite
-.L2560:
+.L2577:
bx lr
-.L2563:
+.L2580:
.align 2
-.L2562:
+.L2579:
.word .LANCHOR2
.word 1179929683
- .word 1342177351
+ .word 1342177352
.fnend
.size Ftl_save_ext_data, .-Ftl_save_ext_data
.align 1
@@ -16016,43 +16121,44 @@ FtlEctTblFlush:
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L2571
+ ldr r3, .L2588
push {r4, lr}
.save {r4, lr}
- ldr r2, [r3, #948]
- cbz r2, .L2569
- ldr r2, [r3, #1008]
+ ldr r2, [r3, #2832]
+ ldr r3, .L2588+4
+ cbz r2, .L2586
+ ldr r2, [r3, #1052]
cmp r2, #29
ite hi
movhi r1, #32
movls r1, #4
- b .L2565
-.L2569:
+ b .L2582
+.L2586:
movs r1, #32
-.L2565:
- ldr r4, .L2571+4
- ldrh r2, [r4, #-212]
+.L2582:
+ ldr r4, .L2588+8
+ ldrh r2, [r4, #-208]
cmp r2, #31
ittt ls
addls r2, r2, #1
movls r1, #1
- strhls r2, [r4, #-212] @ movhi
- cbnz r0, .L2567
- ldr r0, [r3, #1816]
+ strhls r2, [r4, #-208] @ movhi
+ cbnz r0, .L2584
+ ldr r0, [r3, #1820]
ldr r2, [r0, #20]
add r2, r2, r1
ldr r1, [r0, #16]
cmp r1, r2
- bcc .L2568
-.L2567:
- ldr r2, [r3, #1816]
+ bcc .L2585
+.L2584:
+ ldr r2, [r3, #1820]
movs r0, #64
ldr r1, [r2, #16]
str r1, [r2, #20]
- ldr r1, .L2571+8
+ ldr r1, .L2588+12
str r1, [r2]
- ldr r2, [r3, #1816]
- ldrh r1, [r3, #1808]
+ ldr r2, [r3, #1820]
+ ldrh r1, [r3, #1812]
lsls r3, r1, #9
str r3, [r2, #12]
ldr r3, [r2, #8]
@@ -16062,12 +16168,13 @@ FtlEctTblFlush:
str r3, [r2, #4]
bl FtlVendorPartWrite
bl Ftl_save_ext_data
-.L2568:
+.L2585:
movs r0, #0
pop {r4, pc}
-.L2572:
+.L2589:
.align 2
-.L2571:
+.L2588:
+ .word .LANCHOR0
.word .LANCHOR2
.word .LANCHOR4
.word 1112818501
@@ -16082,47 +16189,47 @@ FtlVendorPartRead:
.fnstart
@ args = 0, pretend = 0, frame = 56
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L2584
+ ldr r3, .L2601
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r7, r0
mov r5, r1
add r0, r0, r1
- ldrh r1, [r3, #2892]
+ ldrh r1, [r3, #2904]
.pad #60
sub sp, sp, #60
mov r8, r2
- ldrh r2, [r3, #2906]
+ ldrh r2, [r3, #2918]
cmp r0, r1
str r3, [sp, #8]
- bhi .L2582
+ bhi .L2599
lsr r6, r7, r2
- ldr r10, .L2584+12
+ ldr r10, .L2601+12
movs r3, #0
str r3, [sp]
lsl r9, r6, #2
mov fp, r10
-.L2575:
+.L2592:
cmp r5, #0
- beq .L2583
- ldr r3, [r10, #1840]
+ beq .L2600
+ ldr r3, [r10, #1844]
mov r0, r7
ldr ip, [r3, r9]
ldr r3, [sp, #8]
str ip, [sp, #12]
- ldrh r4, [r3, #2904]
+ ldrh r4, [r3, #2916]
mov r1, r4
bl __aeabi_uidivmod
- subs r3, r4, r1
ldr ip, [sp, #12]
+ subs r3, r4, r1
str r1, [sp, #4]
uxth r4, r3
cmp r4, r5
it hi
uxthhi r4, r5
cmp ip, #0
- beq .L2577
- ldr r2, [fp, #1780]
+ beq .L2594
+ ldr r2, [fp, #1784]
movs r1, #1
add r0, sp, #20
str ip, [sp, #24]
@@ -16135,56 +16242,56 @@ FtlVendorPartRead:
ldr r2, [sp, #20]
ldr r3, [sp]
adds r2, r2, #1
- ldr r2, [fp, #4048]
+ ldr r2, [fp, #4052]
it eq
moveq r3, #-1
ldr ip, [sp, #12]
cmp r2, #256
str r3, [sp]
- bne .L2579
+ bne .L2596
mov r1, r6
mov r2, ip
- ldr r0, .L2584+4
+ ldr r0, .L2601+4
bl printk
- ldr r0, .L2584+8
+ ldr r0, .L2601+8
mov r1, r6
- ldr r2, [r10, #1780]
+ ldr r2, [r10, #1784]
bl FtlMapWritePage
-.L2579:
+.L2596:
ldrh r2, [sp, #4]
mov r0, r8
- ldr r1, [fp, #1780]
+ ldr r1, [fp, #1784]
add r1, r1, r2, lsl #9
lsls r2, r4, #9
bl ftl_memcpy
- b .L2580
-.L2577:
+ b .L2597
+.L2594:
mov r0, r8
mov r1, ip
lsls r2, r4, #9
bl ftl_memset
-.L2580:
+.L2597:
adds r6, r6, #1
subs r5, r5, r4
add r7, r7, r4
add r8, r8, r4, lsl #9
add r9, r9, #4
- b .L2575
-.L2583:
+ b .L2592
+.L2600:
ldr r0, [sp]
- b .L2574
-.L2582:
+ b .L2591
+.L2599:
mov r0, #-1
-.L2574:
+.L2591:
add sp, sp, #60
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L2585:
+.L2602:
.align 2
-.L2584:
+.L2601:
.word .LANCHOR0
- .word .LC123
- .word .LANCHOR2+4088
+ .word .LC126
+ .word .LANCHOR2+4092
.word .LANCHOR2
.fnend
.size FtlVendorPartRead, .-FtlVendorPartRead
@@ -16200,33 +16307,33 @@ FtlLoadEctTbl:
push {r4, lr}
.save {r4, lr}
movs r0, #64
- ldr r4, .L2588
- ldr r2, [r4, #1816]
- ldrh r1, [r4, #1808]
+ ldr r4, .L2605
+ ldr r2, [r4, #1820]
+ ldrh r1, [r4, #1812]
bl FtlVendorPartRead
- ldr r3, [r4, #1816]
+ ldr r3, [r4, #1820]
ldr r2, [r3]
- ldr r3, .L2588+4
+ ldr r3, .L2605+4
cmp r2, r3
- beq .L2587
- ldr r1, .L2588+8
- ldr r0, .L2588+12
+ beq .L2604
+ ldr r1, .L2605+8
+ ldr r0, .L2605+12
bl printk
- ldrh r2, [r4, #1808]
- ldr r0, [r4, #1816]
+ ldrh r2, [r4, #1812]
+ ldr r0, [r4, #1820]
movs r1, #0
lsls r2, r2, #9
bl ftl_memset
-.L2587:
+.L2604:
movs r0, #0
pop {r4, pc}
-.L2589:
+.L2606:
.align 2
-.L2588:
+.L2605:
.word .LANCHOR2
.word 1112818501
- .word .LC124
- .word .LC74
+ .word .LC127
+ .word .LC77
.fnend
.size FtlLoadEctTbl, .-FtlLoadEctTbl
.align 1
@@ -16241,84 +16348,136 @@ Ftl_load_ext_data:
push {r3, r4, r5, lr}
.save {r3, r4, r5, lr}
movs r0, #0
- ldr r4, .L2594
+ ldr r4, .L2611
movs r1, #1
- ldr r5, .L2594+4
- add r2, r4, #1128
+ ldr r5, .L2611+4
+ addw r2, r4, #1124
bl FtlVendorPartRead
- ldr r3, [r4, #1128]
+ ldr r3, [r4, #1124]
cmp r3, r5
- beq .L2591
- add r0, r4, #1128
+ beq .L2608
+ addw r0, r4, #1124
mov r1, #512
bl __memzero
- str r5, [r4, #1128]
-.L2591:
- ldr r2, [r4, #1128]
- ldr r3, .L2594
+ str r5, [r4, #1124]
+.L2608:
+ ldr r2, [r4, #1124]
+ ldr r3, .L2611
cmp r2, r5
- bne .L2592
+ bne .L2609
+ ldr r2, [r3, #1212]
+ str r2, [r3, #1020]
ldr r2, [r3, #1216]
- str r2, [r3, #976]
- ldr r2, [r3, #1220]
- str r2, [r3, #980]
+ str r2, [r3, #1024]
+ ldr r2, [r3, #1132]
+ str r2, [r3, #1016]
ldr r2, [r3, #1136]
- str r2, [r3, #972]
+ str r2, [r3, #1004]
ldr r2, [r3, #1140]
- str r2, [r3, #960]
+ str r2, [r3, #996]
ldr r2, [r3, #1144]
- str r2, [r3, #952]
- ldr r2, [r3, #1148]
- str r2, [r3, #968]
+ str r2, [r3, #1012]
+ ldr r2, [r3, #1152]
+ str r2, [r3, #1040]
ldr r2, [r3, #1156]
- str r2, [r3, #996]
+ str r2, [r3, #756]
ldr r2, [r3, #1160]
- str r2, [r3, #752]
+ str r2, [r3, #1000]
ldr r2, [r3, #1164]
- str r2, [r3, #956]
+ str r2, [r3, #1008]
ldr r2, [r3, #1168]
- str r2, [r3, #964]
+ str r2, [r3, #1048]
ldr r2, [r3, #1172]
- str r2, [r3, #1004]
- ldr r2, [r3, #1176]
- str r2, [r3, #1008]
- ldr r2, [r3, #1188]
- str r2, [r3, #1124]
-.L2592:
+ str r2, [r3, #1052]
+ ldr r2, [r3, #1184]
+ str r2, [r3, #1120]
+.L2609:
movs r3, #0
- ldr r2, [r4, #1196]
- str r3, [r4, #1740]
- ldr r3, .L2594+8
+ ldr r2, [r4, #1192]
+ str r3, [r4, #1736]
+ ldr r3, .L2611+8
+ ldr r5, .L2611+12
cmp r2, r3
- bne .L2593
- ldr r3, .L2594
- movs r2, #1
- ldr r0, .L2594+12
- ldr r1, .L2594+16
- str r2, [r3, #948]
+ bne .L2610
+ ldr r0, .L2611+16
+ movs r3, #1
+ ldr r1, .L2611+20
+ str r3, [r5, #2832]
bl printk
-.L2593:
- ldr r3, .L2594+20
- ldr r2, [r4, #996]
- ldr r0, [r4, #992]
- ldrh r1, [r3, #2888]
- mla r0, r0, r1, r2
- ldrh r1, [r3, #2836]
+.L2610:
+ ldrh r2, [r5, #2900]
+ ldr r3, [r4, #1040]
+ ldr r0, [r4, #1036]
+ ldrh r1, [r5, #2848]
+ mla r0, r0, r2, r3
bl __aeabi_uidiv
- str r0, [r4, #1000]
+ str r0, [r4, #1044]
pop {r3, r4, r5, pc}
-.L2595:
+.L2612:
.align 2
-.L2594:
+.L2611:
.word .LANCHOR2
.word 1179929683
.word 305432421
- .word .LC74
- .word .LC125
.word .LANCHOR0
+ .word .LC77
+ .word .LC128
.fnend
.size Ftl_load_ext_data, .-Ftl_load_ext_data
.align 1
+ .global ftl_vendor_read
+ .thumb
+ .thumb_func
+ .type ftl_vendor_read, %function
+ftl_vendor_read:
+ .fnstart
+ @ args = 0, pretend = 0, frame = 0
+ @ frame_needed = 0, uses_anonymous_args = 0
+ @ link register save eliminated.
+ add r0, r0, #256
+ b FtlVendorPartRead
+ .fnend
+ .size ftl_vendor_read, .-ftl_vendor_read
+ .align 1
+ .global FlashBootVendorRead
+ .thumb
+ .thumb_func
+ .type FlashBootVendorRead, %function
+FlashBootVendorRead:
+ .fnstart
+ @ args = 0, pretend = 0, frame = 0
+ @ frame_needed = 0, uses_anonymous_args = 0
+ push {r4, r5, r6, lr}
+ .save {r4, r5, r6, lr}
+ mov r6, r0
+ mov r5, r1
+ mov r4, r2
+ bl rknand_device_lock
+ mov r2, r4
+ mov r1, r5
+ mov r0, r6
+ bl ftl_vendor_read
+ mov r4, r0
+ bl rknand_device_unlock
+ mov r0, r4
+ pop {r4, r5, r6, pc}
+ .fnend
+ .size FlashBootVendorRead, .-FlashBootVendorRead
+ .align 1
+ .global ftl_sys_read
+ .thumb
+ .thumb_func
+ .type ftl_sys_read, %function
+ftl_sys_read:
+ .fnstart
+ @ args = 0, pretend = 0, frame = 0
+ @ frame_needed = 0, uses_anonymous_args = 0
+ @ link register save eliminated.
+ add r0, r0, #512
+ b FtlVendorPartRead
+ .fnend
+ .size ftl_sys_read, .-ftl_sys_read
+ .align 1
.global StorageSysDataLoad
.thumb
.thumb_func
@@ -16337,8 +16496,8 @@ StorageSysDataLoad:
bl rknand_device_lock
mov r2, r4
movs r1, #1
- add r0, r5, #512
- bl FtlVendorPartRead
+ mov r0, r5
+ bl ftl_sys_read
mov r4, r0
bl rknand_device_unlock
mov r0, r4
@@ -16360,42 +16519,42 @@ FtlMapBlkWriteDumpData:
ldr r2, [r0, #36]
ldrh r5, [r0, #6]
ldr r3, [r0, #24]
- cbz r2, .L2597
- ldr r4, .L2603
+ cbz r2, .L2617
+ ldr r4, .L2623
movs r2, #0
str r2, [r0, #36]
- ldr r2, [r4, #740]
- cbnz r2, .L2597
+ ldr r2, [r4, #744]
+ cbnz r2, .L2617
subs r5, r5, #1
- ldr r0, [r4, #1776]
- ldr r2, [r4, #1796]
+ ldr r0, [r4, #1780]
+ ldr r2, [r4, #1800]
uxth r5, r5
- str r0, [r4, #4056]
- str r2, [r4, #4060]
+ str r0, [r4, #4060]
+ str r2, [r4, #4064]
ldr r3, [r3, r5, lsl #2]
- str r3, [r4, #4052]
- cbz r3, .L2601
+ str r3, [r4, #4056]
+ cbz r3, .L2621
movs r1, #1
- add r0, r4, #4048
+ addw r0, r4, #4052
mov r2, r1
bl FlashReadPages
- b .L2602
-.L2601:
- ldr r3, .L2603+4
+ b .L2622
+.L2621:
+ ldr r3, .L2623+4
movs r1, #255
- ldrh r2, [r3, #2908]
+ ldrh r2, [r3, #2920]
bl ftl_memset
-.L2602:
+.L2622:
mov r0, r6
mov r1, r5
- ldr r2, [r4, #4056]
+ ldr r2, [r4, #4060]
pop {r4, r5, r6, lr}
b FtlMapWritePage
-.L2597:
+.L2617:
pop {r4, r5, r6, pc}
-.L2604:
+.L2624:
.align 2
-.L2603:
+.L2623:
.word .LANCHOR2
.word .LANCHOR0
.fnend
@@ -16417,60 +16576,60 @@ FtlRecoverySuperblock:
sub sp, sp, #68
mov r4, r0
cmp r3, r7
- beq .L2749
+ beq .L2769
ldrh r3, [r0, #2]
movs r5, #0
- ldr r6, .L2765
+ ldr r6, .L2785
str r3, [sp, #12]
ldrb r3, [r0, #6] @ zero_extendqisi2
ldr r2, [sp, #12]
str r3, [sp, #28]
- ldrh r3, [r6, #2898]
+ ldrh r3, [r6, #2910]
cmp r3, r2
- bne .L2608
+ bne .L2628
strh r5, [r0, #4] @ movhi
strb r5, [r0, #6]
- b .L2749
-.L2608:
+ b .L2769
+.L2628:
ldrh r0, [r0, #16]
-.L2609:
+.L2629:
cmp r0, r7
add r5, r5, #1
- bne .L2760
+ bne .L2780
uxth r3, r5
adds r3, r3, #8
ldrh r0, [r4, r3, lsl #1]
- b .L2609
-.L2760:
+ b .L2629
+.L2780:
ldrb r1, [r4, #8] @ zero_extendqisi2
cmp r1, #1
- bne .L2611
+ bne .L2631
bl FtlGetLastWrittenPage
adds r2, r0, #1
mov r5, r0
- beq .L2612
+ beq .L2632
ldrb r3, [r6, #76] @ zero_extendqisi2
- cbnz r3, .L2751
- ldr r3, .L2765
+ cbnz r3, .L2771
+ ldr r3, .L2785
add r3, r3, r0, lsl #1
ldrh r7, [r3, #80]
- b .L2686
-.L2611:
+ b .L2706
+.L2631:
movs r1, #0
bl FtlGetLastWrittenPage
adds r3, r0, #1
mov r5, r0
- beq .L2612
-.L2751:
+ beq .L2632
+.L2771:
mov r7, r5
-.L2686:
- ldr r3, .L2765+4
+.L2706:
+ ldr r3, .L2785+4
movw r9, #65535
- ldrh ip, [r6, #2828]
+ ldrh ip, [r6, #2840]
mov r10, #36
- ldrh r0, [r6, #2910]
+ ldrh r0, [r6, #2922]
ldr r2, [r3, #1764]
- ldr r8, [r3, #1668]
+ ldr r8, [r3, #1664]
add r3, r4, #14
str r3, [sp, #20]
str r2, [sp, #4]
@@ -16478,16 +16637,16 @@ FtlRecoverySuperblock:
mov lr, r3
mov r6, r2
mov fp, r2
- b .L2614
-.L2612:
+ b .L2634
+.L2632:
movs r3, #0
strh r3, [r4, #2] @ movhi
strb r3, [r4, #6]
- b .L2749
-.L2617:
+ b .L2769
+.L2637:
ldrh r3, [lr, #2]!
cmp r3, r9
- beq .L2615
+ beq .L2635
ldr r1, [sp, #4]
orr r3, r7, r3, lsl #10
mla r1, r10, r6, r1
@@ -16502,105 +16661,105 @@ FtlRecoverySuperblock:
bic r3, r3, #3
add r3, r3, r8
str r3, [r1, #12]
-.L2615:
+.L2635:
adds r2, r2, #1
-.L2614:
+.L2634:
uxth r3, r2
cmp r3, ip
- bcc .L2617
+ bcc .L2637
ldrb r3, [r4, #8] @ zero_extendqisi2
cmp r3, #1
- bne .L2688
- ldr r3, .L2765
+ bne .L2708
+ ldr r3, .L2785
ldrb r1, [r3, #76] @ zero_extendqisi2
adds r3, r1, #0
it ne
movne r3, #1
- b .L2752
-.L2688:
+ b .L2772
+.L2708:
movs r3, #0
-.L2752:
- ldr r8, .L2765+4
+.L2772:
+ ldr r8, .L2785+4
mov r1, r6
str r3, [sp, #24]
mov fp, #0
ldr r2, [sp, #24]
ldr r0, [r8, #1764]
bl FlashReadPages
- ldr r3, [r8, #988]
- subs r3, r3, #1
+ ldr r3, [r8, #1032]
str r8, [sp, #8]
+ subs r3, r3, #1
str r3, [sp, #4]
movw r3, #65535
str r3, [sp, #16]
-.L2619:
+.L2639:
uxth r9, fp
cmp r9, r6
- bcs .L2626
+ bcs .L2646
movs r1, #36
ldr r0, [r8, #1764]
mul r1, r1, fp
add lr, r0, r1
ldr r1, [r0, r1]
- cbnz r1, .L2620
+ cbnz r1, .L2640
ldr r3, [lr, #12]
ldr r10, [r3, #4]
cmp r10, #-1
- beq .L2621
+ beq .L2641
mov r0, r10
- ldr r1, [r8, #988]
+ ldr r1, [r8, #1032]
str r3, [sp, #32]
bl ftl_cmp_data_ver
ldr r3, [sp, #32]
- cbz r0, .L2621
+ cbz r0, .L2641
add r1, r10, #1
- str r1, [r8, #988]
-.L2621:
+ str r1, [r8, #1032]
+.L2641:
ldr r1, [r3]
adds r1, r1, #1
- bne .L2622
-.L2626:
+ bne .L2642
+.L2646:
cmp r9, r6
- ldr r6, .L2765+4
- bne .L2750
+ ldr r6, .L2785+4
+ bne .L2770
ldr r3, [r6, #1764]
adds r5, r5, #1
uxth r10, r5
ldr r0, [r3, #4]
- b .L2753
-.L2620:
+ b .L2773
+.L2640:
ldr r1, [lr, #4]
- ldr r0, .L2765+8
+ ldr r0, .L2785+8
bl printk
uxth r3, r7
ldrh r1, [r4]
str r3, [sp, #16]
- ldr r3, .L2765+12
- strh r1, [r3, #-210] @ movhi
-.L2622:
+ ldr r3, .L2785+12
+ strh r1, [r3, #-206] @ movhi
+.L2642:
add fp, fp, #1
- b .L2619
-.L2750:
+ b .L2639
+.L2770:
ldr r3, [sp, #8]
movs r2, #36
uxth r10, r5
ldr r3, [r3, #1764]
mla r9, r2, r9, r3
ldr r0, [r9, #4]
-.L2753:
+.L2773:
ubfx r0, r0, #10, #16
bl P2V_plane
ldrb r5, [r4, #8] @ zero_extendqisi2
- ldr r2, .L2765
+ ldr r2, .L2785
cmp r5, #1
str r0, [sp, #8]
- bne .L2628
+ bne .L2648
ldrb r3, [r2, #76] @ zero_extendqisi2
- cbnz r3, .L2628
+ cbnz r3, .L2648
add r3, r2, r10, lsl #1
ldrh r10, [r3, #80]
-.L2628:
- ldrh r3, [r2, #2898]
+.L2648:
+ ldrh r3, [r2, #2910]
cmp r3, r10
itttt eq
strheq r10, [r4, #2] @ movhi
@@ -16611,34 +16770,34 @@ FtlRecoverySuperblock:
str r3, [sp, #32]
ldr r3, [sp, #12]
cmp r10, r3
- bne .L2630
+ bne .L2650
ldr r3, [sp, #8]
ldr r2, [sp, #32]
cmp r3, r2
- bne .L2630
+ bne .L2650
mov r0, r4
mov r1, r10
mov r2, r3
- b .L2758
-.L2630:
+ b .L2778
+.L2650:
ldr r2, [sp, #16]
movw r3, #65535
cmp r2, r3
- bne .L2631
+ bne .L2651
cmp r5, #0
- bne .L2632
-.L2631:
- ldr r3, [r6, #1928]
+ bne .L2652
+.L2651:
+ ldr r3, [r6, #1932]
uxth fp, r7
mov r9, #-1
- ldr r8, .L2765+4
+ ldr r8, .L2785+4
adds r3, r3, #1
mov r7, r9
ittt eq
- ldreq r3, .L2765+4
+ ldreq r3, .L2785+4
ldreq r2, [sp, #4]
- streq r2, [r3, #1928]
- ldr r3, [r6, #1928]
+ streq r2, [r3, #1932]
+ ldr r3, [r6, #1932]
str r3, [sp, #16]
ldr r3, [sp, #12]
adds r3, r3, #7
@@ -16647,24 +16806,24 @@ FtlRecoverySuperblock:
subgt r5, fp, #7
ldrle r5, [sp, #12]
uxthgt r5, r5
-.L2635:
+.L2655:
cmp r5, fp
- bhi .L2648
- ldr r3, .L2765
+ bhi .L2668
+ ldr r3, .L2785
ldr r1, [sp, #20]
- ldrh ip, [r3, #2828]
+ ldrh ip, [r3, #2840]
ldr r3, [r8, #1764]
str r3, [sp, #28]
movs r3, #0
mov r6, r3
-.L2649:
+.L2669:
uxth r2, r3
cmp r2, ip
- bcs .L2761
+ bcs .L2781
ldrh r2, [r1, #2]!
movw r0, #65535
cmp r2, r0
- beq .L2636
+ beq .L2656
ldr r0, [sp, #28]
mov lr, #36
orr r2, r5, r2, lsl #10
@@ -16672,133 +16831,133 @@ FtlRecoverySuperblock:
adds r6, r6, #1
uxth r6, r6
str r2, [r0, #4]
-.L2636:
+.L2656:
adds r3, r3, #1
- b .L2649
-.L2761:
+ b .L2669
+.L2781:
mov r1, r6
ldr r2, [sp, #24]
ldr r0, [r8, #1764]
bl FlashReadPages
- ldr r3, .L2765
+ ldr r3, .L2785
movs r2, #36
movw r1, #65535
ldrb r0, [r3, #76] @ zero_extendqisi2
ldr r3, [r8, #1764]
mla r6, r2, r6, r3
- ldr r2, .L2765
+ ldr r2, .L2785
add lr, r2, r5, lsl #1
-.L2638:
+.L2658:
cmp r3, r6
- beq .L2762
+ beq .L2782
ldr r2, [r3]
- cbnz r2, .L2639
+ cbnz r2, .L2659
ldr r2, [r3, #12]
ldrh ip, [r2]
cmp ip, r1
- beq .L2640
+ beq .L2660
ldr r2, [r2, #4]
cmp r2, #-1
- beq .L2640
+ beq .L2660
cmp r9, #-1
- ldr r7, [r8, #1928]
- str r2, [r8, #1928]
- bne .L2640
+ ldr r7, [r8, #1932]
+ str r2, [r8, #1932]
+ bne .L2660
ldrh r2, [lr, #592]
cmp r2, r1
- bne .L2641
+ bne .L2661
cmp r0, #0
- beq .L2640
-.L2641:
+ beq .L2660
+.L2661:
ldr r2, [sp, #4]
cmp r7, r2
ite ne
movne r9, r7
moveq r9, #-1
- b .L2640
-.L2766:
+ b .L2660
+.L2786:
.align 2
-.L2765:
+.L2785:
.word .LANCHOR0
.word .LANCHOR2
- .word .LC126
+ .word .LC129
.word .LANCHOR4
-.L2639:
- ldr r3, .L2767
+.L2659:
+ ldr r3, .L2787
ldrh r2, [r4]
- strh r2, [r3, #-210] @ movhi
+ strh r2, [r3, #-206] @ movhi
ldrb r3, [r4, #8] @ zero_extendqisi2
- cbnz r3, .L2632
- ldr r3, .L2767+4
+ cbnz r3, .L2652
+ ldr r3, .L2787+4
add r5, r3, r5, lsl #1
movw r3, #65535
ldrh r2, [r5, #592]
cmp r2, r3
- ldr r3, .L2767+8
- bne .L2643
+ ldr r3, .L2787+8
+ bne .L2663
cmp r9, #-1
- beq .L2644
- str r9, [r3, #1928]
- b .L2632
-.L2644:
+ beq .L2664
+ str r9, [r3, #1932]
+ b .L2652
+.L2664:
ldr r2, [sp, #16]
ldr r1, [sp, #4]
cmp r2, r1
- bne .L2754
- ldr r2, [r3, #1928]
- b .L2759
-.L2643:
+ bne .L2774
+ ldr r2, [r3, #1932]
+ b .L2779
+.L2663:
ldr r2, [sp, #4]
cmp r7, r2
- beq .L2646
+ beq .L2666
adds r2, r7, #1
- beq .L2632
- str r7, [r3, #1928]
- b .L2632
-.L2646:
- ldr r2, [r3, #1928]
+ beq .L2652
+ str r7, [r3, #1932]
+ b .L2652
+.L2666:
+ ldr r2, [r3, #1932]
ldr r1, [sp, #4]
cmp r2, r1
- beq .L2632
-.L2759:
+ beq .L2652
+.L2779:
subs r2, r2, #1
- b .L2754
-.L2640:
+ b .L2774
+.L2660:
adds r3, r3, #36
- b .L2638
-.L2762:
+ b .L2658
+.L2782:
adds r5, r5, #1
uxth r5, r5
- b .L2635
-.L2648:
- ldr r3, .L2767+8
+ b .L2655
+.L2668:
+ ldr r3, .L2787+8
mov r2, #-1
-.L2754:
- str r2, [r3, #1928]
-.L2632:
- ldr r3, .L2767
+.L2774:
+ str r2, [r3, #1932]
+.L2652:
+ ldr r3, .L2787
movs r2, #1
- ldr r0, .L2767+12
- ldr r5, .L2767+8
- strh r2, [r3, #-208] @ movhi
+ ldr r0, .L2787+12
+ ldr r5, .L2787+8
+ strh r2, [r3, #-204] @ movhi
bl FtlMapBlkWriteDumpData
ldr fp, [sp, #12]
-.L2650:
- ldr r3, .L2767+4
+.L2670:
+ ldr r3, .L2787+4
movw r9, #65535
ldr r1, [r5, #1764]
movs r6, #0
ldr r7, [sp, #20]
- ldrh r8, [r3, #2828]
+ ldrh r8, [r3, #2840]
ldrb r0, [r3, #76] @ zero_extendqisi2
str r6, [sp, #16]
-.L2651:
+.L2671:
uxth r3, r6
cmp r3, r8
- bcs .L2763
+ bcs .L2783
ldrh r3, [r7, #2]!
cmp r3, r9
- beq .L2652
+ beq .L2672
ldr r2, [sp, #16]
mov lr, #36
orr r3, fp, r3, lsl #10
@@ -16806,30 +16965,30 @@ FtlRecoverySuperblock:
str r3, [r2, #4]
ldrb lr, [r4, #8] @ zero_extendqisi2
cmp lr, #1
- bne .L2653
- cbz r0, .L2653
+ bne .L2673
+ cbz r0, .L2673
orr r3, r3, #-2147483648
str r3, [r2, #4]
-.L2653:
+.L2673:
ldr r3, [sp, #16]
add ip, r3, #1
uxth r3, ip
str r3, [sp, #16]
-.L2652:
+.L2672:
adds r6, r6, #1
- b .L2651
-.L2763:
+ b .L2671
+.L2783:
ldr r0, [r5, #1764]
ldr r1, [sp, #16]
ldr r2, [sp, #24]
bl FlashReadPages
movs r3, #0
-.L2757:
+.L2777:
str r3, [sp, #28]
ldr r2, [sp, #16]
ldrh r3, [sp, #28]
cmp r3, r2
- bcs .L2764
+ bcs .L2784
ldr r3, [sp, #28]
movs r6, #36
ldr r9, [r5, #1764]
@@ -16841,38 +17000,38 @@ FtlRecoverySuperblock:
bl P2V_plane
ldr r3, [sp, #12]
cmp fp, r3
- bcc .L2656
- bne .L2657
+ bcc .L2676
+ bne .L2677
ldr r3, [sp, #32]
cmp r0, r3
- bcc .L2656
-.L2657:
+ bcc .L2676
+.L2677:
cmp fp, r10
- bne .L2658
+ bne .L2678
ldr r3, [sp, #8]
cmp r0, r3
- beq .L2659
-.L2658:
+ beq .L2679
+.L2678:
ldr r3, [r9, r6]
adds r3, r3, #1
- beq .L2660
+ beq .L2680
ldr r8, [r8, #12]
movw r3, #61589
ldrh r2, [r8]
cmp r2, r3
- bne .L2667
+ bne .L2687
ldr r3, [r8, #4]
adds r7, r3, #1
str r3, [sp, #4]
- beq .L2662
+ beq .L2682
mov r0, r3
- ldr r1, [r5, #988]
+ ldr r1, [r5, #1032]
bl ftl_cmp_data_ver
- cbz r0, .L2662
+ cbz r0, .L2682
ldr r3, [sp, #4]
adds r3, r3, #1
- str r3, [r5, #988]
-.L2662:
+ str r3, [r5, #1032]
+.L2682:
ldr r7, [r8, #8]
add r1, sp, #56
ldr r3, [r8, #12]
@@ -16880,22 +17039,22 @@ FtlRecoverySuperblock:
mov r0, r7
str r3, [sp, #52]
bl log2phys
- ldr r1, [r5, #1928]
+ ldr r1, [r5, #1932]
adds r0, r1, #1
- beq .L2663
+ beq .L2683
ldr r0, [sp, #4]
bl ftl_cmp_data_ver
cmp r0, #0
- beq .L2663
+ beq .L2683
ldr r3, [sp, #52]
adds r2, r3, #1
- beq .L2664
+ beq .L2684
ldr r0, [r5, #1764]
movs r2, #0
movs r1, #1
add r0, r0, r6
- str r3, [r0, #4]
ldr r9, [r0, #12]
+ str r3, [r0, #4]
bl FlashReadPages
ldr r2, [r5, #1764]
ldr r3, [r9, #4]
@@ -16903,240 +17062,240 @@ FtlRecoverySuperblock:
str r3, [sp, #36]
ldr r3, [r2, r6]
adds r3, r3, #1
- bne .L2665
- b .L2666
-.L2664:
+ bne .L2685
+ b .L2686
+.L2684:
ldr r3, [sp, #60]
ldr r2, [sp, #56]
cmp r2, r3
- bne .L2667
+ bne .L2687
mov r0, r7
add r1, sp, #52
movs r2, #1
bl log2phys
-.L2667:
+.L2687:
ldrh r0, [r4]
- b .L2756
-.L2665:
+ b .L2776
+.L2685:
ldr r8, [r9, #8]
cmp r8, r7
- bne .L2666
- ldr r0, [r5, #1928]
+ bne .L2686
+ ldr r0, [r5, #1932]
ldr r1, [sp, #36]
str r2, [sp, #44]
str ip, [sp, #40]
bl ftl_cmp_data_ver
ldr ip, [sp, #40]
ldr r2, [sp, #44]
- cbz r0, .L2666
+ cbz r0, .L2686
ldr r3, [sp, #56]
ldr r1, [sp, #60]
cmp r3, r1
- beq .L2672
+ beq .L2692
ldr r1, [sp, #52]
cmp r3, r1
- beq .L2666
+ beq .L2686
adds r0, r3, #1
- beq .L2670
+ beq .L2690
str r3, [ip, #4]
mov r0, ip
movs r1, #1
movs r2, #0
ldr r9, [ip, #12]
bl FlashReadPages
- b .L2671
-.L2670:
+ b .L2691
+.L2690:
str r3, [r2, r6]
-.L2671:
+.L2691:
ldr r3, [r5, #1764]
ldr r3, [r3, r6]
adds r3, r3, #1
- beq .L2672
+ beq .L2692
ldr r6, [r9, #4]
- ldr r0, [r5, #1928]
+ ldr r0, [r5, #1932]
mov r1, r6
bl ftl_cmp_data_ver
- cbz r0, .L2672
+ cbz r0, .L2692
ldr r0, [sp, #36]
mov r1, r6
bl ftl_cmp_data_ver
- cbz r0, .L2666
-.L2672:
+ cbz r0, .L2686
+.L2692:
mov r0, r8
ldr r1, [sp, #52]
bl FtlReUsePrevPpa
-.L2666:
+.L2686:
ldrh r0, [r4]
mov r3, #-1
str r3, [sp, #52]
bl decrement_vpc_count
- b .L2674
-.L2768:
+ b .L2694
+.L2788:
.align 2
-.L2767:
+.L2787:
.word .LANCHOR4
.word .LANCHOR0
.word .LANCHOR2
- .word .LANCHOR2+1864
-.L2663:
+ .word .LANCHOR2+1868
+.L2683:
ldr r3, [sp, #60]
ldr r2, [sp, #56]
cmp r2, r3
- beq .L2674
+ beq .L2694
mov r0, r7
add r1, sp, #60
movs r2, #1
bl log2phys
ldr r8, [sp, #56]
cmp r8, #-1
- beq .L2674
+ beq .L2694
ldr r3, [sp, #52]
cmp r8, r3
- beq .L2674
+ beq .L2694
ubfx r0, r8, #10, #16
bl P2V_block_in_plane
- ldrh r3, [r5, #788]
- cmp r3, r0
- beq .L2677
ldrh r3, [r5, #836]
cmp r3, r0
- beq .L2677
+ beq .L2697
ldrh r3, [r5, #884]
cmp r3, r0
- bne .L2674
-.L2677:
- ldr r3, .L2769
+ beq .L2697
+ ldrh r3, [r5, #932]
+ cmp r3, r0
+ bne .L2694
+.L2697:
+ ldr r3, .L2789
movs r1, #1
movs r2, #0
ldr r0, [r3, #1764]
str r8, [r0, #4]
ldr r6, [r0, #12]
bl FlashReadPages
- ldr r3, .L2769
+ ldr r3, .L2789
ldr r1, [r6, #4]
ldr r3, [r3, #1764]
ldr r3, [r3]
adds r3, r3, #1
- beq .L2674
+ beq .L2694
ldr r0, [sp, #4]
bl ftl_cmp_data_ver
- cbnz r0, .L2674
+ cbnz r0, .L2694
mov r0, r7
add r1, sp, #56
movs r2, #1
bl log2phys
-.L2674:
+.L2694:
ldr r0, [sp, #52]
adds r1, r0, #1
- beq .L2656
+ beq .L2676
ubfx r0, r0, #10, #16
bl P2V_block_in_plane
- ldr r3, [r5, #768]
+ ldr r3, [r5, #816]
ldrh r3, [r3, r0, lsl #1]
mov r1, r0
- cbz r3, .L2678
-.L2756:
+ cbz r3, .L2698
+.L2776:
bl decrement_vpc_count
- b .L2656
-.L2678:
- ldr r0, .L2769+4
+ b .L2676
+.L2698:
+ ldr r0, .L2789+4
bl printk
- b .L2656
-.L2660:
+ b .L2676
+.L2680:
ldrh r3, [r4]
mov r1, r7
- ldr r2, .L2769+8
- ldr r0, .L2769+12
- strh r3, [r2, #-210] @ movhi
+ ldr r2, .L2789+8
+ ldr r0, .L2789+12
+ strh r3, [r2, #-206] @ movhi
ldr r2, [sp, #4]
bl printk
- ldr r3, .L2769+8
- ldr r3, [r3, #-204]
+ ldr r3, .L2789+8
+ ldr r3, [r3, #-200]
cmp r3, #31
- bhi .L2679
- ldr r2, .L2769+8
+ bhi .L2699
+ ldr r2, .L2789+8
ldr r1, [sp, #60]
add r2, r2, r3, lsl #2
adds r3, r3, #1
- str r1, [r2, #-200]
- ldr r2, .L2769+8
- str r3, [r2, #-204]
-.L2679:
+ str r1, [r2, #-196]
+ ldr r2, .L2789+8
+ str r3, [r2, #-200]
+.L2699:
ldrh r0, [r4]
bl decrement_vpc_count
- ldr r3, [r5, #1928]
+ ldr r3, [r5, #1932]
adds r2, r3, #1
- bne .L2680
+ bne .L2700
ldr r3, [sp, #4]
- b .L2755
-.L2680:
+ b .L2775
+.L2700:
ldr r2, [sp, #4]
cmp r3, r2
- bls .L2656
+ bls .L2676
mov r3, r2
-.L2755:
- str r3, [r5, #1928]
-.L2656:
+.L2775:
+ str r3, [r5, #1932]
+.L2676:
ldr r3, [sp, #28]
adds r3, r3, #1
- b .L2757
-.L2764:
+ b .L2777
+.L2784:
ldrb r3, [r4, #8] @ zero_extendqisi2
add fp, fp, #1
cmp r3, #1
uxth fp, fp
- ldr r3, .L2769+16
- bne .L2682
+ ldr r3, .L2789+16
+ bne .L2702
ldrb r2, [r3, #76] @ zero_extendqisi2
- cbz r2, .L2682
- ldrh r2, [r3, #2900]
+ cbz r2, .L2702
+ ldrh r2, [r3, #2912]
cmp r2, fp
- bne .L2682
+ bne .L2702
cmp r10, fp
- beq .L2659
-.L2682:
- ldrh r3, [r3, #2898]
+ beq .L2679
+.L2702:
+ ldrh r3, [r3, #2910]
cmp fp, r3
- bne .L2650
- ldr r2, .L2769+16
+ bne .L2670
+ ldr r2, .L2789+16
movw r0, #65535
movs r3, #0
strh fp, [r4, #2] @ movhi
strh r3, [r4, #4] @ movhi
- ldrh r1, [r2, #2828]
-.L2683:
+ ldrh r1, [r2, #2840]
+.L2703:
uxth r2, r3
cmp r2, r1
- bcs .L2749
+ bcs .L2769
ldr r6, [sp, #20]
adds r3, r3, #1
ldrh r5, [r6, #2]!
cmp r5, r0
str r6, [sp, #20]
- beq .L2683
+ beq .L2703
strb r2, [r4, #6]
- b .L2749
-.L2659:
+ b .L2769
+.L2679:
ldrb r3, [sp, #8] @ zero_extendqisi2
mov r0, r4
ldr r2, [sp, #8]
mov r1, r10
strh r10, [r4, #2] @ movhi
strb r3, [r4, #6]
-.L2758:
+.L2778:
bl ftl_sb_update_avl_pages
-.L2749:
+.L2769:
movs r0, #0
add sp, sp, #68
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L2770:
+.L2790:
.align 2
-.L2769:
+.L2789:
.word .LANCHOR2
- .word .LC127
+ .word .LC130
.word .LANCHOR4
- .word .LC128
+ .word .LC131
.word .LANCHOR0
.fnend
.size FtlRecoverySuperblock, .-FtlRecoverySuperblock
@@ -17153,72 +17312,72 @@ FtlWriteDumpData:
.save {r4, r5, r6, r7, r8, r9, r10, lr}
.pad #40
sub sp, sp, #40
- ldr r4, .L2789
- ldr r3, [r4, #740]
+ ldr r4, .L2809
+ ldr r3, [r4, #744]
cmp r3, #0
- bne .L2771
- ldrh r2, [r4, #792]
+ bne .L2791
+ ldrh r2, [r4, #840]
cmp r2, #0
- beq .L2773
- ldrb r3, [r4, #796] @ zero_extendqisi2
+ beq .L2793
+ ldrb r3, [r4, #844] @ zero_extendqisi2
cmp r3, #0
- bne .L2773
- ldr r7, .L2789+4
- ldrb r1, [r4, #795] @ zero_extendqisi2
- ldrh r3, [r7, #2898]
+ bne .L2793
+ ldr r7, .L2809+4
+ ldrb r1, [r4, #843] @ zero_extendqisi2
+ ldrh r3, [r7, #2910]
muls r3, r1, r3
cmp r2, r3
- beq .L2773
- ldrb r9, [r4, #798] @ zero_extendqisi2
- ldr r6, [r7, #2960]
- ldrh r8, [r7, #2828]
+ beq .L2793
+ ldrb r9, [r4, #846] @ zero_extendqisi2
+ ldr r6, [r7, #2968]
+ ldrh r8, [r7, #2840]
cmp r9, #0
- bne .L2771
+ bne .L2791
subs r6, r6, #1
mov r1, sp
mov r2, r9
mov r0, r6
bl log2phys
- ldr r5, [r4, #1796]
- ldr r0, [r4, #756]
ldr r3, [sp]
- str r6, [sp, #20]
- str r0, [sp, #12]
+ ldr r5, [r4, #1800]
+ ldr r0, [r4, #1776]
str r3, [sp, #8]
adds r3, r3, #1
+ str r6, [sp, #20]
+ str r0, [sp, #12]
str r5, [sp, #16]
str r9, [r5, #4]
- beq .L2775
+ beq .L2795
+ add r0, sp, #4
movs r1, #1
mov r2, r9
- add r0, sp, #4
bl FlashReadPages
- b .L2776
-.L2775:
+ b .L2796
+.L2795:
movs r1, #255
- ldrh r2, [r7, #2908]
+ ldrh r2, [r7, #2920]
bl ftl_memset
-.L2776:
+.L2796:
movs r7, #0
- ldr r10, .L2789
+ ldr r10, .L2809
lsl r8, r8, #2
movw r3, #61589
mov r9, r7
strh r3, [r5] @ movhi
-.L2777:
+.L2797:
cmp r7, r8
- beq .L2778
- ldrh r3, [r4, #792]
- cbz r3, .L2778
+ beq .L2798
+ ldrh r3, [r4, #840]
+ cbz r3, .L2798
ldr r3, [sp, #8]
adds r7, r7, #1
str r6, [r5, #8]
- ldr r0, .L2789+8
+ ldr r0, .L2809+8
str r3, [r5, #12]
- ldrh r3, [r10, #788]
+ ldrh r3, [r10, #836]
strh r3, [r5, #2] @ movhi
bl get_new_active_ppa
- ldr r3, [r10, #988]
+ ldr r3, [r10, #1032]
movs r1, #1
str r0, [sp, #8]
add r0, sp, #4
@@ -17228,29 +17387,29 @@ FtlWriteDumpData:
mov r2, #0
it eq
moveq r3, r9
- str r3, [r10, #988]
+ str r3, [r10, #1032]
mov r3, r2
bl FlashProgPages
- ldrh r0, [r4, #788]
+ ldrh r0, [r4, #836]
bl decrement_vpc_count
- b .L2777
-.L2778:
+ b .L2797
+.L2798:
movs r3, #1
- b .L2788
-.L2773:
+ b .L2808
+.L2793:
movs r3, #0
-.L2788:
- strb r3, [r4, #798]
-.L2771:
+.L2808:
+ strb r3, [r4, #846]
+.L2791:
add sp, sp, #40
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, pc}
-.L2790:
+.L2810:
.align 2
-.L2789:
+.L2809:
.word .LANCHOR2
.word .LANCHOR0
- .word .LANCHOR2+788
+ .word .LANCHOR2+836
.fnend
.size FtlWriteDumpData, .-FtlWriteDumpData
.align 1
@@ -17266,29 +17425,29 @@ l2p_flush:
.save {r3, r4, r5, r6, r7, lr}
bl FtlWriteDumpData
movs r4, #0
- ldr r5, .L2796
+ ldr r5, .L2816
movs r7, #12
- ldr r6, .L2796+4
-.L2792:
- ldrh r3, [r5, #2938]
+ ldr r6, .L2816+4
+.L2812:
+ ldrh r3, [r5, #2950]
uxth r0, r4
cmp r3, r0
- bls .L2795
- ldr r3, [r6, #932]
+ bls .L2815
+ ldr r3, [r6, #980]
mla r3, r7, r0, r3
ldr r3, [r3, #4]
cmp r3, #0
- bge .L2793
+ bge .L2813
bl flush_l2p_region
-.L2793:
+.L2813:
adds r4, r4, #1
- b .L2792
-.L2795:
+ b .L2812
+.L2815:
movs r0, #0
pop {r3, r4, r5, r6, r7, pc}
-.L2797:
+.L2817:
.align 2
-.L2796:
+.L2816:
.word .LANCHOR0
.word .LANCHOR2
.fnend
@@ -17306,88 +17465,88 @@ FtlVpcCheckAndModify:
.save {r4, r5, r6, r7, r8, r9, lr}
.pad #12
movs r4, #0
- ldr r6, .L2812
- ldr r1, .L2812+4
- ldr r0, .L2812+8
+ ldr r6, .L2832
+ ldr r1, .L2832+4
+ ldr r0, .L2832+8
bl printk
- ldr r5, .L2812+12
- ldrh r2, [r6, #2838]
+ ldr r5, .L2832+12
+ ldrh r2, [r6, #2850]
movs r1, #0
- ldr r0, [r5, #1820]
+ ldr r0, [r5, #1824]
lsls r2, r2, #1
bl ftl_memset
-.L2799:
- ldr r3, [r6, #2960]
+.L2819:
+ ldr r3, [r6, #2968]
cmp r4, r3
- bcs .L2810
+ bcs .L2830
mov r0, r4
add r1, sp, #4
movs r2, #0
bl log2phys
ldr r0, [sp, #4]
adds r3, r0, #1
- beq .L2800
+ beq .L2820
ubfx r0, r0, #10, #16
bl P2V_block_in_plane
- ldr r2, [r5, #1820]
+ ldr r2, [r5, #1824]
ldrh r3, [r2, r0, lsl #1]
adds r3, r3, #1
strh r3, [r2, r0, lsl #1] @ movhi
-.L2800:
+.L2820:
adds r4, r4, #1
- b .L2799
-.L2810:
- ldr r7, .L2812+12
+ b .L2819
+.L2830:
+ ldr r7, .L2832+12
mov r8, #0
movw r9, #65535
-.L2802:
- ldrh r3, [r6, #2836]
+.L2822:
+ ldrh r3, [r6, #2848]
uxth r4, r8
cmp r3, r4
- bls .L2811
- ldr r3, [r5, #768]
+ bls .L2831
+ ldr r3, [r5, #816]
ldrh r2, [r3, r4, lsl #1]
- ldr r3, [r5, #1820]
+ ldr r3, [r5, #1824]
ldrh r3, [r3, r4, lsl #1]
cmp r2, r3
- beq .L2804
+ beq .L2824
cmp r2, r9
- beq .L2804
- ldr r0, .L2812+16
+ beq .L2824
+ ldr r0, .L2832+16
mov r1, r4
bl printk
- ldrh r3, [r7, #788]
+ ldrh r3, [r7, #836]
cmp r3, r4
- beq .L2804
- ldrh r3, [r7, #884]
+ beq .L2824
+ ldrh r3, [r7, #932]
cmp r3, r4
- beq .L2804
- ldrh r3, [r7, #836]
+ beq .L2824
+ ldrh r3, [r7, #884]
cmp r3, r4
- beq .L2804
- ldr r3, [r7, #1820]
+ beq .L2824
+ ldr r3, [r7, #1824]
mov r0, r4
ldrh r2, [r3, r4, lsl #1]
- ldr r3, [r7, #768]
+ ldr r3, [r7, #816]
strh r2, [r3, r4, lsl #1] @ movhi
bl update_vpc_list
bl l2p_flush
bl FtlVpcTblFlush
-.L2804:
+.L2824:
add r8, r8, #1
- b .L2802
-.L2811:
+ b .L2822
+.L2831:
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, pc}
-.L2813:
+.L2833:
.align 2
-.L2812:
+.L2832:
.word .LANCHOR0
.word .LANCHOR3+16
- .word .LC129
+ .word .LC132
.word .LANCHOR2
- .word .LC130
+ .word .LC133
.fnend
.size FtlVpcCheckAndModify, .-FtlVpcCheckAndModify
.align 1
@@ -17402,633 +17561,634 @@ allocate_new_data_superblock:
push {r4, r5, r6, lr}
.save {r4, r5, r6, lr}
mov r6, r0
- ldr r4, .L2840
+ ldr r4, .L2860
ldrh r5, [r0]
- ldr r3, [r4, #740]
+ ldr r3, [r4, #744]
cmp r3, #0
- bne .L2815
+ bne .L2835
movw r3, #65535
cmp r5, r3
- beq .L2816
- ldr r3, [r4, #768]
+ beq .L2836
+ ldr r3, [r4, #816]
mov r0, r5
ldrh r3, [r3, r5, lsl #1]
- cbz r3, .L2817
+ cbz r3, .L2837
bl INSERT_DATA_LIST
- b .L2816
-.L2817:
+ b .L2836
+.L2837:
bl INSERT_FREE_LIST
-.L2816:
+.L2836:
+ ldr r2, .L2860
movs r3, #0
strb r3, [r6, #8]
- ldr r3, .L2840
- add r2, r3, #836
- cmp r6, r2
- beq .L2818
- ldr r1, .L2840+4
- ldrh r2, [r1, #2848]
- cmp r2, #1
- beq .L2818
- ldrb r1, [r1, #76] @ zero_extendqisi2
- cbz r1, .L2819
-.L2818:
+ add r3, r2, #884
+ cmp r6, r3
+ beq .L2838
+ ldr r3, .L2860+4
+ ldrh r1, [r3, #2860]
+ cmp r1, #1
+ beq .L2838
+ ldrb r0, [r3, #76] @ zero_extendqisi2
+ cbz r0, .L2839
+.L2838:
movs r3, #1
strb r3, [r6, #8]
- b .L2820
-.L2819:
- add r1, r3, #788
- cmp r6, r1
- bne .L2820
- cmp r2, #3
- beq .L2822
- ldr r3, [r3, #1124]
- cmp r3, #1
- bne .L2823
-.L2822:
- movs r3, #1
- strb r3, [r4, #796]
-.L2823:
- ldr r2, [r4, #948]
- ldr r3, .L2840
- cbz r2, .L2820
- ldr r2, [r3, #1008]
- cmp r2, #29
- itt ls
+ b .L2840
+.L2839:
+ add r0, r2, #836
+ cmp r6, r0
+ bne .L2840
+ cmp r1, #3
+ beq .L2842
+ ldr r2, [r2, #1120]
+ cmp r2, #1
+ bne .L2843
+.L2842:
+ movs r2, #1
+ strb r2, [r4, #844]
+.L2843:
+ ldr r3, [r3, #2832]
+ cbz r3, .L2840
+ ldr r3, [r4, #1052]
+ cmp r3, #29
+ ittt ls
movls r2, #1
- strbls r2, [r3, #796]
-.L2820:
- ldrh r0, [r4, #1916]
+ ldrls r3, .L2860
+ strbls r2, [r3, #844]
+.L2840:
+ ldrh r0, [r4, #1920]
movw r3, #65535
cmp r0, r3
- beq .L2825
+ beq .L2845
cmp r5, r0
- bne .L2826
- ldr r3, .L2840
- ldr r3, [r3, #768]
+ bne .L2846
+ ldr r3, .L2860
+ ldr r3, [r3, #816]
ldrh r3, [r3, r0, lsl #1]
- cbz r3, .L2827
-.L2826:
+ cbz r3, .L2847
+.L2846:
bl update_vpc_list
-.L2827:
+.L2847:
movw r3, #65535
- strh r3, [r4, #1916] @ movhi
-.L2825:
+ strh r3, [r4, #1920] @ movhi
+.L2845:
mov r0, r6
bl allocate_data_superblock
bl l2p_flush
movs r0, #0
bl FtlEctTblFlush
bl FtlVpcTblFlush
-.L2815:
+.L2835:
movs r0, #0
pop {r4, r5, r6, pc}
-.L2841:
+.L2861:
.align 2
-.L2840:
+.L2860:
.word .LANCHOR2
.word .LANCHOR0
.fnend
.size allocate_new_data_superblock, .-allocate_new_data_superblock
.align 1
- .global rk_ftl_garbage_collect
+ .global ftl_do_gc
.thumb
.thumb_func
- .type rk_ftl_garbage_collect, %function
-rk_ftl_garbage_collect:
+ .type ftl_do_gc, %function
+ftl_do_gc:
.fnstart
@ args = 0, pretend = 0, frame = 32
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r8, r0
- ldr r4, .L3010
+ ldr r4, .L3030
.pad #44
sub sp, sp, #44
mov r6, r1
- ldr r0, [r4, #740]
+ ldr r0, [r4, #744]
mov r7, r4
cmp r0, #0
- bne .L2936
- ldr r3, [r4, #1744]
+ bne .L2956
+ ldr r3, [r4, #1740]
cmp r3, #0
- bne .L2994
- ldrh r2, [r4, #776]
+ bne .L3014
+ ldrh r2, [r4, #824]
cmp r2, #47
- bls .L2938
- ldr r3, .L3010+4
- ldrh r2, [r3, #3000]
+ bls .L2958
+ ldr r3, .L3030+4
+ ldrh r2, [r3, #3064]
movw r3, #65535
cmp r2, r3
- bne .L2844
-.L2847:
- ldrh r1, [r7, #1696]
+ bne .L2864
+.L2867:
+ ldrh r1, [r7, #1692]
movw r0, #65535
- ldr r3, .L3010
+ ldr r3, .L3030
cmp r1, r0
- beq .L2846
- ldrh r2, [r3, #1694]
+ beq .L2866
+ ldrh r2, [r3, #1690]
cmp r2, r0
itt eq
- strheq r1, [r3, #1694] @ movhi
- strheq r2, [r3, #1696] @ movhi
- b .L2846
-.L2844:
- ldrh r2, [r4, #884]
+ strheq r1, [r3, #1690] @ movhi
+ strheq r2, [r3, #1692] @ movhi
+ b .L2866
+.L2864:
+ ldrh r2, [r4, #932]
cmp r2, r3
- beq .L2847
+ beq .L2867
movs r0, #1
bl FtlGcFreeTempBlock
cmp r0, #0
- beq .L2847
+ beq .L2867
movs r0, #1
- b .L2994
-.L2846:
- ldr r4, [r7, #1644]
+ b .L3014
+.L2866:
+ ldr r4, [r7, #1640]
cmp r8, #1
add r4, r4, #1
add r4, r4, r8, lsl #7
- str r4, [r7, #1644]
- bne .L2858
- ldr r3, .L3010
- ldr r3, [r3, #948]
- cbnz r3, .L2849
- ldr r3, .L3010+8
+ str r4, [r7, #1640]
+ bne .L2878
+ ldr r3, .L3030+8
+ ldr r2, [r3, #2832]
+ mov r10, r3
+ cbnz r2, .L2869
ldrb r3, [r3, #76] @ zero_extendqisi2
cmp r3, #0
- beq .L2858
-.L2849:
- ldr r3, [r7, #1008]
- ldr r5, .L3010
+ beq .L2878
+.L2869:
+ ldr r3, [r7, #1052]
+ ldr r5, .L3030
cmp r3, #29
- bhi .L2858
- ldr r9, .L3010+12
- ldrh r3, [r9, #-72]
+ bhi .L2878
+ ldr r9, .L3030+12
+ ldrh r3, [r9, #-68]
add r4, r4, r3
- str r4, [r5, #1644]
+ str r4, [r5, #1640]
bl FtlGcReFreshBadBlk
- ldrh r3, [r5, #1076]
+ ldrh r3, [r5, #1072]
movw r2, #65535
cmp r3, r2
- bne .L2858
- ldrh r2, [r5, #1694]
+ bne .L2878
+ ldrh r2, [r5, #1690]
cmp r2, r3
- bne .L2858
- ldr r3, [r5, #1644]
+ bne .L2878
+ ldr r3, [r5, #1640]
cmp r3, #1024
- bhi .L2850
- ldrh r3, [r5, #784]
+ bhi .L2870
+ ldrh r3, [r5, #832]
cmp r3, #63
- bhi .L2858
-.L2850:
- ldrh r3, [r7, #1642]
+ bhi .L2878
+.L2870:
+ ldrh r3, [r7, #1638]
movs r0, #0
- ldrh r4, [r7, #784]
+ ldrh r4, [r7, #832]
adds r3, r3, #64
- ldr r2, .L3010+12
+ ldr r2, .L3030+12
cmp r4, r3
- strh r0, [r9, #-72] @ movhi
- ldr r1, .L3010
- bgt .L2858
- ldr r3, [r1, #1008]
- str r0, [r1, #1644]
- cbnz r3, .L2851
+ strh r0, [r9, #-68] @ movhi
+ ldr r1, .L3030
+ bgt .L2878
+ ldr r3, [r1, #1052]
+ str r0, [r1, #1640]
+ cbnz r3, .L2871
movs r3, #6
- b .L2995
-.L2851:
+ b .L3015
+.L2871:
cmp r3, #5
- bhi .L2852
+ bhi .L2872
movs r3, #18
-.L2995:
- strh r3, [r2, #-72] @ movhi
-.L2852:
+.L3015:
+ strh r3, [r2, #-68] @ movhi
+.L2872:
movs r0, #32
bl List_get_gc_head_node
movw ip, #65535
uxth r2, r0
cmp r2, ip
- beq .L2857
- ldrh r0, [r7, #1648]
- ldr r5, .L3010
+ beq .L2877
+ ldrh r0, [r7, #1644]
+ ldr r5, .L3030
cmp r0, #0
- beq .L2854
- ldr r3, .L3010+8
- ldr r10, [r5, #768]
- ldrh r4, [r3, #2900]
- ldrh r3, [r3, #2828]
- ldrh r1, [r10, r2, lsl #1]
+ beq .L2874
+ ldrh r4, [r10, #2912]
+ ldrh r3, [r10, #2840]
+ ldr fp, [r5, #816]
muls r3, r4, r3
+ ldrh r1, [fp, r2, lsl #1]
adds r3, r3, #1
cmp r1, r3
- bgt .L2857
+ bgt .L2877
adds r1, r0, #1
str ip, [sp, #20]
str r2, [sp, #16]
- mov fp, #0
+ mov r10, #0
uxth r1, r1
- str fp, [r5, #1652]
- strh r1, [r5, #1648] @ movhi
+ str r10, [r5, #1648]
+ strh r1, [r5, #1644] @ movhi
str r1, [sp, #12]
bl List_get_gc_head_node
ldr ip, [sp, #20]
- uxth r4, r0
ldr r1, [sp, #12]
- cmp r4, ip
ldr r2, [sp, #16]
- beq .L2857
- ldrh r2, [r10, r2, lsl #1]
- ldrh r3, [r10, r4, lsl #1]
- ldr r0, .L3010+16
+ uxth r4, r0
+ cmp r4, ip
+ beq .L2877
+ ldrh r2, [fp, r2, lsl #1]
+ ldrh r3, [fp, r4, lsl #1]
+ ldr r0, .L3030+16
str r2, [sp]
mov r2, r4
bl printk
- ldrh r3, [r5, #1648]
+ ldrh r3, [r5, #1644]
cmp r3, #40
- bls .L2855
- ldr r3, [r5, #768]
+ bls .L2875
+ ldr r3, [r5, #816]
ldrh r3, [r3, r4, lsl #1]
cmp r3, #32
it hi
- strhhi fp, [r5, #1648] @ movhi
-.L2855:
+ strhhi r10, [r5, #1644] @ movhi
+.L2875:
movs r3, #6
- strh r3, [r9, #-72] @ movhi
- b .L2874
-.L2854:
+ strh r3, [r9, #-68] @ movhi
+ b .L2894
+.L2874:
movs r3, #1
- strh r3, [r5, #1648] @ movhi
-.L2857:
+ strh r3, [r5, #1644] @ movhi
+.L2877:
bl GetSwlReplaceBlock
movw r3, #65535
cmp r0, r3
mov r4, r0
- bne .L2874
+ bne .L2894
movs r3, #0
- strh r3, [r9, #-72] @ movhi
-.L2858:
- ldrh r3, [r7, #1076]
+ strh r3, [r9, #-68] @ movhi
+.L2878:
+ ldrh r3, [r7, #1072]
movw r4, #65535
- ldr r5, .L3010
+ ldr r5, .L3030
cmp r3, r4
- bne .L3002
- ldrh r4, [r5, #884]
+ bne .L3022
+ ldrh r4, [r5, #932]
cmp r4, r3
- bne .L2859
- ldrh r10, [r5, #1694]
+ bne .L2879
+ ldrh r10, [r5, #1690]
cmp r10, r4
- bne .L2860
- ldrh r3, [r5, #784]
- ldr r2, [r5, #1644]
+ bne .L2880
+ ldrh r3, [r5, #832]
+ ldr r2, [r5, #1640]
cmp r3, #24
ite cc
movcc r3, #5120
movcs r3, #1024
cmp r2, r3
- bls .L2862
- ldr r2, .L3010+12
+ bls .L2882
+ ldr r2, .L3030+12
movs r3, #0
- str r3, [r7, #1644]
+ str r3, [r7, #1640]
mov r9, r5
- strh r3, [r2, #-72] @ movhi
+ strh r3, [r2, #-68] @ movhi
bl GetSwlReplaceBlock
cmp r0, r10
mov r4, r0
- bne .L2863
- ldrh r2, [r5, #784]
- ldrh r3, [r5, #1642]
+ bne .L2883
+ ldrh r2, [r5, #832]
+ ldrh r3, [r5, #1638]
cmp r2, r3
- bcs .L2864
+ bcs .L2884
movs r0, #64
bl List_get_gc_head_node
uxth r3, r0
cmp r3, r4
- bne .L3003
-.L2873:
+ bne .L3023
+.L2893:
bl FtlGcReFreshBadBlk
cmp r8, #0
- beq .L3004
-.L2874:
- ldrh r2, [r7, #884]
+ beq .L3024
+.L2894:
+ ldrh r2, [r7, #932]
movw r3, #65535
cmp r2, r3
- bne .L2885
-.L2934:
- ldrh r3, [r7, #1694]
+ bne .L2905
+.L2954:
+ ldrh r3, [r7, #1690]
movw r2, #65535
cmp r3, r2
- bne .L2885
+ bne .L2905
cmp r4, r3
- bne .L2885
-.L2935:
- ldrh r2, [r7, #1076]
+ bne .L2905
+.L2955:
+ ldrh r2, [r7, #1072]
movw r3, #65535
- ldr r4, .L3010
+ ldr r4, .L3030
cmp r2, r3
- beq .L2886
-.L2890:
+ beq .L2906
+.L2910:
movw r4, #65535
- b .L2885
-.L2886:
+ b .L2905
+.L2906:
movs r3, #0
- ldrh r9, [r4, #784]
- str r3, [r4, #1652]
- ldrh r3, [r4, #1640]
- ldr r5, .L3010+12
+ ldrh r9, [r4, #832]
+ str r3, [r4, #1648]
+ ldrh r3, [r4, #1636]
+ ldr r5, .L3030+12
cmp r3, r9
- bcs .L2887
- ldrh r3, [r5, #-72]
- cbnz r3, .L2888
- ldr r3, .L3010+8
- ldr r2, [r4, #940]
- ldr r3, [r3, #2960]
+ bcs .L2907
+ ldrh r3, [r5, #-68]
+ cbnz r3, .L2908
+ ldr r3, .L3030+8
+ ldr r2, [r4, #988]
+ ldr r3, [r3, #2968]
add r3, r3, r3, lsl #1
cmp r2, r3, lsr #2
- bcs .L2946
-.L2888:
- ldrh r3, [r7, #1060]
+ bcs .L2966
+.L2908:
+ ldrh r3, [r7, #1056]
add r3, r3, r3, lsl #1
ubfx r3, r3, #2, #16
- b .L2889
-.L2946:
+ b .L2909
+.L2966:
movs r3, #18
-.L2889:
- strh r3, [r7, #1640] @ movhi
- b .L2999
-.L2887:
- ldrh r0, [r5, #-72]
+.L2909:
+ strh r3, [r7, #1636] @ movhi
+ b .L3019
+.L2907:
+ ldrh r0, [r5, #-68]
cmp r0, #0
- bne .L2890
- ldrh r6, [r4, #1060]
+ bne .L2910
+ ldrh r6, [r4, #1056]
add r3, r6, r6, lsl #1
asrs r3, r3, #2
- strh r3, [r4, #1640] @ movhi
+ strh r3, [r4, #1636] @ movhi
bl List_get_gc_head_node
- ldr r2, .L3010+8
- ldr r3, [r4, #768]
- ldrh r1, [r2, #2900]
- ldrh r4, [r2, #2828]
+ ldr r2, .L3030+8
+ ldr r3, [r4, #816]
+ ldrh r1, [r2, #2912]
+ ldrh r4, [r2, #2840]
muls r4, r1, r4
add r4, r4, r4, lsr #31
uxth r0, r0
ldrh r3, [r3, r0, lsl #1]
cmp r3, r4, asr #1
- ble .L2891
+ ble .L2911
subs r6, r6, #1
cmp r9, r6
- blt .L2891
-.L2999:
+ blt .L2911
+.L3019:
bl FtlReadRefresh
- b .L3000
-.L2891:
+ b .L3020
+.L2911:
cmp r3, #0
- bne .L2890
+ bne .L2910
movw r0, #65535
bl decrement_vpc_count
- ldrh r0, [r7, #784]
+ ldrh r0, [r7, #832]
adds r0, r0, #1
- b .L2994
-.L2885:
- ldr r3, [r7, #948]
+ b .L3014
+.L2905:
+ ldr r3, .L3030+8
+ ldr r3, [r3, #2832]
cmp r3, #0
ite eq
moveq r5, #1
movne r5, #2
- b .L2884
-.L3011:
+ b .L2904
+.L3031:
.align 2
-.L3010:
+.L3030:
.word .LANCHOR2
.word .LANCHOR1
.word .LANCHOR0
.word .LANCHOR4
- .word .LC131
-.L3004:
+ .word .LC134
+.L3024:
movw r3, #65535
cmp r4, r3
- bne .L2874
-.L2933:
- ldrh r4, [r7, #784]
+ bne .L2894
+.L2953:
+ ldrh r4, [r7, #832]
cmp r4, #24
- bhi .L2942
- ldr r3, .L3012
+ bhi .L2962
+ ldr r3, .L3032
cmp r4, #16
- ldrh r5, [r3, #2898]
- bls .L2876
+ ldrh r5, [r3, #2910]
+ bls .L2896
lsrs r5, r5, #5
-.L2875:
- ldrh r3, [r7, #1640]
- ldr r2, .L3012+4
+.L2895:
+ ldrh r3, [r7, #1636]
+ ldr r2, .L3032+4
cmp r3, r4
- bcc .L3005
-.L2879:
- ldr r3, [r7, #948]
+ bcc .L3025
+.L2899:
+ ldr r3, .L3032
+ ldr r3, [r3, #2832]
cmp r3, #0
- bne .L3006
-.L2945:
+ bne .L3026
+.L2965:
movw r4, #65535
-.L2884:
- ldrh r2, [r7, #1076]
+.L2904:
+ ldrh r2, [r7, #1072]
movw r1, #65535
- ldr r3, .L3012+4
+ ldr r3, .L3032+4
cmp r2, r1
- bne .L2893
+ bne .L2913
cmp r4, r2
- beq .L2894
- strh r4, [r3, #1076] @ movhi
- b .L2895
-.L2894:
- ldrh r2, [r3, #1694]
+ beq .L2914
+ strh r4, [r3, #1072] @ movhi
+ b .L2915
+.L2914:
+ ldrh r2, [r3, #1690]
cmp r2, r4
- beq .L2895
- ldr r1, [r3, #768]
+ beq .L2915
+ ldr r1, [r3, #816]
ldrh r2, [r1, r2, lsl #1]
- cbnz r2, .L2896
- strh r4, [r3, #1694] @ movhi
-.L2896:
- ldrh r3, [r7, #1694]
- strh r3, [r7, #1076] @ movhi
+ cbnz r2, .L2916
+ strh r4, [r3, #1690] @ movhi
+.L2916:
+ ldrh r3, [r7, #1690]
+ strh r3, [r7, #1072] @ movhi
movw r3, #65535
- strh r3, [r7, #1694] @ movhi
-.L2895:
- ldrh r0, [r7, #1076]
+ strh r3, [r7, #1690] @ movhi
+.L2915:
+ ldrh r0, [r7, #1072]
movw r6, #65535
movs r3, #0
- strb r3, [r7, #1084]
+ strb r3, [r7, #1080]
cmp r0, r6
- beq .L2893
+ beq .L2913
bl IsBlkInGcList
- cbz r0, .L2898
- ldr r3, .L3012+4
- strh r6, [r3, #1076] @ movhi
-.L2898:
- ldr r3, .L3012
+ cbz r0, .L2918
+ ldr r3, .L3032+4
+ strh r6, [r3, #1072] @ movhi
+.L2918:
+ ldr r3, .L3032
ldrb r3, [r3, #76] @ zero_extendqisi2
- cbz r3, .L2899
- ldrh r0, [r7, #1076]
+ cbz r3, .L2919
+ ldrh r0, [r7, #1072]
bl ftl_get_blk_mode
- strb r0, [r7, #1084]
-.L2899:
- ldrh r2, [r7, #1076]
+ strb r0, [r7, #1080]
+.L2919:
+ ldrh r2, [r7, #1072]
movw r3, #65535
- ldr r6, .L3012+4
+ ldr r6, .L3032+4
cmp r2, r3
- beq .L2893
- addw r0, r6, #1076
+ beq .L2913
+ add r0, r6, #1072
bl make_superblock
- ldr r2, .L3012+8
+ ldr r2, .L3032+8
movs r3, #0
- ldrh r1, [r6, #1076]
- strh r3, [r6, #1078] @ movhi
- strb r3, [r6, #1082]
- strh r3, [r2, #-70] @ movhi
- ldr r3, [r6, #768]
+ ldrh r1, [r6, #1072]
+ strh r3, [r6, #1074] @ movhi
+ strb r3, [r6, #1078]
+ strh r3, [r2, #-66] @ movhi
+ ldr r3, [r6, #816]
ldrh r3, [r3, r1, lsl #1]
- strh r3, [r2, #-68] @ movhi
-.L2893:
- ldrh r3, [r7, #1076]
- ldrh r2, [r7, #788]
+ strh r3, [r2, #-64] @ movhi
+.L2913:
+ ldrh r3, [r7, #1072]
+ ldrh r2, [r7, #836]
cmp r2, r3
- beq .L2900
- ldr r2, .L3012+4
- ldrh r2, [r2, #836]
+ beq .L2920
+ ldr r2, .L3032+4
+ ldrh r2, [r2, #884]
cmp r2, r3
- beq .L2900
-.L2901:
- ldr r7, .L3012
- b .L2902
-.L2900:
+ beq .L2920
+.L2921:
+ ldr r7, .L3032
+ b .L2922
+.L2920:
movw r3, #65535
- strh r3, [r7, #1076] @ movhi
- b .L3001
-.L2923:
- ldrh r3, [r6, #1078]
+ strh r3, [r7, #1072] @ movhi
+ b .L3021
+.L2943:
+ ldrh r3, [r6, #1074]
add r5, r5, r3
ldr r3, [sp, #12]
uxth r5, r5
- strh r5, [r6, #1078] @ movhi
+ strh r5, [r6, #1074] @ movhi
cmp r5, r3
- bcs .L3007
-.L2925:
- ldrh r3, [r6, #784]
+ bcs .L3027
+.L2945:
+ ldrh r3, [r6, #832]
cmp r3, #2
- bhi .L2928
- ldrh r5, [r7, #2898]
-.L2902:
- ldr r6, .L3012+4
+ bhi .L2948
+ ldrh r5, [r7, #2910]
+.L2922:
+ ldr r6, .L3032+4
movw r3, #65535
- ldrh r2, [r6, #1076]
+ ldrh r2, [r6, #1072]
mov fp, r6
cmp r2, r3
- bne .L2903
+ bne .L2923
mov r10, r6
movs r3, #0
- str r3, [r6, #1652]
-.L2904:
- ldrh r9, [fp, #1648]
+ str r3, [r6, #1648]
+.L2924:
+ ldrh r9, [fp, #1644]
mov r0, r9
bl List_get_gc_head_node
movw r2, #65535
uxth r3, r0
- strh r3, [fp, #1076] @ movhi
+ strh r3, [fp, #1072] @ movhi
cmp r3, r2
- bne .L2905
- ldr r3, .L3012+4
+ bne .L2925
+ ldr r3, .L3032+4
movs r2, #0
movs r0, #8
- strh r2, [r3, #1648] @ movhi
- b .L2994
-.L2905:
+ strh r2, [r3, #1644] @ movhi
+ b .L3014
+.L2925:
mov r0, r3
str r3, [sp, #12]
bl IsBlkInGcList
add r9, r9, #1
ldr r3, [sp, #12]
- cbz r0, .L2906
- strh r9, [r10, #1648] @ movhi
- b .L2904
-.L2906:
- ldrh lr, [r7, #2828]
+ cbz r0, .L2926
+ strh r9, [r10, #1644] @ movhi
+ b .L2924
+.L2926:
+ ldrh lr, [r7, #2840]
uxth r9, r9
- ldrh r2, [r7, #2898]
- ldr r1, [r10, #768]
- strh r9, [r10, #1648] @ movhi
+ ldrh r2, [r7, #2910]
+ ldr r1, [r10, #816]
+ strh r9, [r10, #1644] @ movhi
mul r2, lr, r2
ldrh r0, [r1, r3, lsl #1]
add lr, r2, r2, lsr #31
cmp r0, lr, asr #1
- bgt .L2908
+ bgt .L2928
cmp r9, #48
- bls .L2909
+ bls .L2929
cmp r0, #8
- bls .L2909
- ldrh r0, [r10, #1684]
+ bls .L2929
+ ldrh r0, [r10, #1680]
cmp r0, #35
- bhi .L2909
-.L2908:
+ bhi .L2929
+.L2928:
movs r0, #0
- strh r0, [fp, #1648] @ movhi
-.L2909:
+ strh r0, [fp, #1644] @ movhi
+.L2929:
ldrh r1, [r1, r3, lsl #1]
cmp r1, r2
- blt .L2910
+ blt .L2930
movw r2, #65535
cmp r4, r2
- bne .L2910
+ bne .L2930
movs r3, #0
- strh r4, [fp, #1076] @ movhi
- strh r3, [fp, #1648] @ movhi
-.L3001:
- ldr r3, .L3012+8
- ldrh r0, [r3, #-72]
- b .L2994
-.L2910:
- cbnz r1, .L2911
+ strh r4, [fp, #1072] @ movhi
+ strh r3, [fp, #1644] @ movhi
+.L3021:
+ ldr r3, .L3032+8
+ ldrh r0, [r3, #-68]
+ b .L3014
+.L2930:
+ cbnz r1, .L2931
movw r0, #65535
bl decrement_vpc_count
- ldrh r3, [fp, #1648]
+ ldrh r3, [fp, #1644]
adds r3, r3, #1
- strh r3, [fp, #1648] @ movhi
- b .L2904
-.L2911:
+ strh r3, [fp, #1644] @ movhi
+ b .L2924
+.L2931:
movs r2, #0
- strb r2, [r6, #1084]
- ldr r2, .L3012
+ strb r2, [r6, #1080]
+ ldr r2, .L3032
ldrb r2, [r2, #76] @ zero_extendqisi2
- cbz r2, .L2912
+ cbz r2, .L2932
mov r0, r3
bl ftl_get_blk_mode
- ldr r3, .L3012+4
- strb r0, [r3, #1084]
-.L2912:
- ldr r0, .L3012+12
+ ldr r3, .L3032+4
+ strb r0, [r3, #1080]
+.L2932:
+ ldr r0, .L3032+12
bl make_superblock
- ldr r2, .L3012+8
- ldrh r0, [r6, #1076]
+ ldr r2, .L3032+8
+ ldrh r0, [r6, #1072]
movs r3, #0
- ldr r1, [r6, #768]
- strh r3, [r2, #-70] @ movhi
+ ldr r1, [r6, #816]
+ strh r3, [r2, #-66] @ movhi
ldrh r1, [r1, r0, lsl #1]
- strh r3, [r6, #1078] @ movhi
- strb r3, [r6, #1082]
- strh r1, [r2, #-68] @ movhi
-.L2903:
+ strh r3, [r6, #1074] @ movhi
+ strb r3, [r6, #1078]
+ strh r1, [r2, #-64] @ movhi
+.L2923:
cmp r8, #1
- bne .L2913
+ bne .L2933
bl FtlReadRefresh
-.L2913:
+.L2933:
movs r3, #1
- str r3, [r6, #1744]
- ldrh r3, [r7, #2898]
+ str r3, [r6, #1740]
+ ldrh r3, [r7, #2910]
str r3, [sp, #12]
ldrb r3, [r7, #76] @ zero_extendqisi2
- cbz r3, .L2914
- ldr r3, .L3012+4
- ldrb r3, [r3, #1084] @ zero_extendqisi2
+ cbz r3, .L2934
+ ldr r3, .L3032+4
+ ldrb r3, [r3, #1080] @ zero_extendqisi2
cmp r3, #1
itt eq
- ldrheq r3, [r7, #2900]
+ ldrheq r3, [r7, #2912]
streq r3, [sp, #12]
-.L2914:
- ldrh r3, [r6, #1078]
+.L2934:
+ ldrh r3, [r6, #1074]
ldr r1, [sp, #12]
adds r2, r3, r5
cmp r2, r1
@@ -18037,29 +18197,29 @@ rk_ftl_garbage_collect:
subgt r3, r2, r3
uxthgt r5, r3
movs r3, #0
-.L2998:
+.L3018:
str r3, [sp, #16]
ldrh r3, [sp, #16]
- ldr r6, .L3012+4
+ ldr r6, .L3032+4
cmp r3, r5
- bcs .L2923
- ldr r3, [r6, #1672]
- addw r1, r6, #1090
+ bcs .L2943
+ ldr r3, [r6, #1668]
+ addw r1, r6, #1086
ldr r2, [sp, #16]
movw lr, #65535
- ldrh r10, [r7, #2828]
+ ldrh r10, [r7, #2840]
str r3, [sp, #20]
- ldrh r3, [r6, #1078]
+ ldrh r3, [r6, #1074]
add ip, r3, r2
movs r3, #0
mov r9, r3
-.L2924:
+.L2944:
uxth r2, r3
cmp r2, r10
- bcs .L3008
+ bcs .L3028
ldrh r2, [r1, #2]!
cmp r2, lr
- beq .L2917
+ beq .L2937
ldr r0, [sp, #20]
mov fp, #36
orr r2, ip, r2, lsl #10
@@ -18067,74 +18227,74 @@ rk_ftl_garbage_collect:
add r9, r9, #1
uxth r9, r9
str r2, [fp, #4]
-.L2917:
+.L2937:
adds r3, r3, #1
- b .L2924
-.L3013:
+ b .L2944
+.L3033:
.align 2
-.L3012:
+.L3032:
.word .LANCHOR0
.word .LANCHOR2
.word .LANCHOR4
- .word .LANCHOR2+1076
-.L3008:
- ldr r0, [r6, #1672]
+ .word .LANCHOR2+1072
+.L3028:
+ ldr r0, [r6, #1668]
mov r1, r9
- ldrb r2, [r6, #1084] @ zero_extendqisi2
+ ldrb r2, [r6, #1080] @ zero_extendqisi2
mov fp, #0
bl FlashReadPages
- ldr r6, .L3014
-.L2919:
+ ldr r6, .L3034
+.L2939:
uxth r3, fp
cmp r3, r9
- bcs .L3009
+ bcs .L3029
mov ip, #36
- ldr r2, [r6, #1672]
+ ldr r2, [r6, #1668]
mul r10, ip, fp
add r3, r2, r10
ldr r2, [r2, r10]
ldr r3, [r3, #12]
adds r2, r2, #1
- beq .L2948
+ beq .L2968
ldrh r1, [r3]
movw r2, #61589
cmp r1, r2
- bne .L2948
+ bne .L2968
add r1, sp, ip
ldr r0, [r3, #8]
movs r2, #0
str ip, [sp, #24]
str r3, [sp, #20]
bl log2phys
- ldr r1, [r6, #1672]
- add r1, r1, r10
- ldr r0, [r1, #4]
+ ldr r1, [r6, #1668]
ldr r2, [sp, #36]
+ add r1, r1, r10
ldr r3, [sp, #20]
bic r2, r2, #-2147483648
ldr ip, [sp, #24]
+ ldr r0, [r1, #4]
cmp r2, r0
- bne .L2948
+ bne .L2968
str r3, [sp, #28]
- ldr r3, .L3014+4
- ldr r0, [r6, #1656]
+ ldr r3, .L3034+4
+ ldr r0, [r6, #1652]
ldr r1, [r1, #16]
- ldrh r2, [r3, #-70]
+ ldrh r2, [r3, #-66]
adds r2, r2, #1
- strh r2, [r3, #-70] @ movhi
+ strh r2, [r3, #-66] @ movhi
ldr r2, [r6, #1768]
mla r2, ip, r0, r2
str r1, [r2, #16]
str r2, [sp, #20]
bl Ftl_get_new_temp_ppa
- ldr r1, [r6, #1656]
ldr r2, [sp, #20]
+ ldr r1, [r6, #1652]
ldr ip, [sp, #24]
ldr r3, [sp, #28]
str r0, [r2, #4]
ldr r2, [r6, #1768]
mla ip, ip, r1, r2
- ldr r2, [r6, #1672]
+ ldr r2, [r6, #1668]
add r2, r2, r10
ldr r1, [r2, #8]
str r1, [ip, #8]
@@ -18143,245 +18303,245 @@ rk_ftl_garbage_collect:
str r2, [ip, #12]
ldr r2, [sp, #36]
str r2, [r3, #12]
- ldrh r2, [r6, #884]
+ ldrh r2, [r6, #932]
strh r2, [r3, #2] @ movhi
- ldr r2, [r6, #988]
- ldr r0, [r6, #1672]
+ ldr r2, [r6, #1032]
+ ldr r0, [r6, #1668]
str r2, [r3, #4]
add r0, r0, r10
- ldr r3, [r6, #1656]
+ ldr r3, [r6, #1652]
adds r3, r3, #1
- str r3, [r6, #1656]
+ str r3, [r6, #1652]
bl FtlGcBufAlloc
ldrb r3, [r7, #76] @ zero_extendqisi2
- cbnz r3, .L2921
- ldrb r3, [r6, #891] @ zero_extendqisi2
- ldr r2, [r6, #1656]
+ cbnz r3, .L2941
+ ldrb r3, [r6, #939] @ zero_extendqisi2
+ ldr r2, [r6, #1652]
cmp r2, r3
- beq .L2921
- ldrh r3, [r6, #888]
- cbnz r3, .L2948
-.L2921:
+ beq .L2941
+ ldrh r3, [r6, #936]
+ cbnz r3, .L2968
+.L2941:
bl Ftl_gc_temp_data_write_back
- cbz r0, .L2948
- ldr r3, .L3014
+ cbz r0, .L2968
+ ldr r3, .L3034
movs r2, #0
- str r2, [r3, #1744]
- b .L3001
-.L2948:
+ str r2, [r3, #1740]
+ b .L3021
+.L2968:
add fp, fp, #1
- b .L2919
-.L3009:
+ b .L2939
+.L3029:
ldr r3, [sp, #16]
adds r3, r3, #1
- b .L2998
-.L3007:
- ldr r3, [r6, #1656]
- ldr r5, .L3014+4
- cbz r3, .L2926
+ b .L3018
+.L3027:
+ ldr r3, [r6, #1652]
+ ldr r5, .L3034+4
+ cbz r3, .L2946
bl Ftl_gc_temp_data_write_back
- cbz r0, .L2926
+ cbz r0, .L2946
movs r3, #0
- str r3, [r6, #1744]
-.L3000:
- ldrh r0, [r5, #-72]
- b .L2994
-.L2926:
- ldrh r1, [r5, #-70]
- cbnz r1, .L2927
- ldrh r2, [r6, #1076]
- ldr r3, [r6, #768]
+ str r3, [r6, #1740]
+.L3020:
+ ldrh r0, [r5, #-68]
+ b .L3014
+.L2946:
+ ldrh r1, [r5, #-66]
+ cbnz r1, .L2947
+ ldrh r2, [r6, #1072]
+ ldr r3, [r6, #816]
ldrh r0, [r3, r2, lsl #1]
- cbz r0, .L2927
+ cbz r0, .L2947
strh r1, [r3, r2, lsl #1] @ movhi
- ldr r3, .L3014
- ldrh r0, [r3, #1076]
+ ldr r3, .L3034
+ ldrh r0, [r3, #1072]
bl update_vpc_list
bl FtlCacheWriteBack
bl l2p_flush
bl FtlVpcTblFlush
-.L2927:
+.L2947:
movw r3, #65535
- strh r3, [r6, #1076] @ movhi
- b .L2925
-.L2928:
- ldr r2, .L3014
+ strh r3, [r6, #1072] @ movhi
+ b .L2945
+.L2948:
+ ldr r2, .L3034
movs r1, #0
- str r1, [r2, #1744]
- ldr r2, .L3014+4
- ldrh r0, [r2, #-72]
+ str r1, [r2, #1740]
+ ldr r2, .L3034+4
+ ldrh r0, [r2, #-68]
cmp r0, #0
- bne .L2994
+ bne .L3014
adds r0, r3, #1
- b .L2994
-.L2936:
+ b .L3014
+.L2956:
movs r0, #0
- b .L2994
-.L2938:
+ b .L3014
+.L2958:
mov r0, r3
- b .L2994
-.L3003:
- ldr r2, [r5, #1740]
- ldr r5, .L3014+8
- cbnz r2, .L2866
- ldrh r2, [r5, #2848]
+ b .L3014
+.L3023:
+ ldr r2, [r5, #1736]
+ ldr r5, .L3034+8
+ cbnz r2, .L2886
+ ldrh r2, [r5, #2860]
cmp r2, #3
- beq .L2866
- ldr r2, [r9, #1124]
- cbnz r2, .L2866
- ldr r2, [r9, #948]
- cbnz r2, .L2866
+ beq .L2886
+ ldr r2, [r9, #1120]
+ cbnz r2, .L2886
+ ldr r2, [r5, #2832]
+ cbnz r2, .L2886
ldrb r0, [r5, #76] @ zero_extendqisi2
- cbz r0, .L2867
-.L2866:
- ldr r2, [r7, #768]
- ldrh r0, [r5, #2848]
+ cbz r0, .L2887
+.L2886:
+ ldr r2, [r7, #816]
+ ldrh r0, [r5, #2860]
ldrh r1, [r2, r3, lsl #1]
cmp r0, #3
- ldrh r3, [r5, #2900]
- ldrh r2, [r5, #2828]
+ ldrh r3, [r5, #2912]
+ ldrh r2, [r5, #2840]
mul r2, r2, r3
ite eq
lsreq r3, r3, #1
movne r3, #0
add r3, r3, r2
cmp r1, r3
- bgt .L2869
+ bgt .L2889
movs r0, #0
bl List_get_gc_head_node
- ldr r3, [r5, #2960]
- ldr r2, .L3014
- ldr r1, [r7, #940]
+ ldr r3, [r5, #2968]
+ ldr r2, .L3034
+ ldr r1, [r7, #988]
add r3, r3, r3, lsl #1
cmp r1, r3, lsr #2
ite hi
movhi r3, #128
movls r3, #160
- strh r3, [r2, #1642] @ movhi
+ strh r3, [r2, #1638] @ movhi
uxth r4, r0
- b .L2871
-.L2869:
+ b .L2891
+.L2889:
movs r3, #128
- b .L2997
-.L2867:
- ldr r2, [r9, #768]
+ b .L3017
+.L2887:
+ ldr r2, [r9, #816]
ldrh r3, [r2, r3, lsl #1]
cmp r3, #7
- bhi .L2872
+ bhi .L2892
bl List_get_gc_head_node
movs r3, #128
- strh r3, [r7, #1642] @ movhi
+ strh r3, [r7, #1638] @ movhi
uxth r4, r0
- b .L2871
-.L2872:
+ b .L2891
+.L2892:
movs r3, #64
-.L2997:
- strh r3, [r7, #1642] @ movhi
- b .L2873
-.L2864:
+.L3017:
+ strh r3, [r7, #1638] @ movhi
+ b .L2893
+.L2884:
movs r3, #80
- strh r3, [r5, #1642] @ movhi
- b .L2873
-.L2871:
+ strh r3, [r5, #1638] @ movhi
+ b .L2893
+.L2891:
movw r3, #65535
cmp r4, r3
- beq .L2873
-.L2863:
- ldr r1, [r7, #748]
- ldr r3, [r7, #768]
- ldrh r2, [r7, #784]
+ beq .L2893
+.L2883:
+ ldr r1, [r7, #752]
+ ldr r3, [r7, #816]
+ ldrh r2, [r7, #832]
ldrh r1, [r1, r4, lsl #1]
ldrh r3, [r3, r4, lsl #1]
- ldr r0, .L3014+12
+ ldr r0, .L3034+12
str r1, [sp]
- ldrh r1, [r7, #1640]
+ ldrh r1, [r7, #1636]
str r1, [sp, #4]
mov r1, r4
bl printk
- b .L2873
-.L2876:
+ b .L2893
+.L2896:
cmp r4, #12
- bls .L2877
+ bls .L2897
lsrs r5, r5, #4
- b .L2875
-.L2877:
+ b .L2895
+.L2897:
cmp r4, #8
- bls .L2875
+ bls .L2895
lsrs r5, r5, #2
- b .L2875
-.L2942:
+ b .L2895
+.L2962:
movs r5, #1
- b .L2875
-.L3005:
- ldrh r3, [r2, #884]
+ b .L2895
+.L3025:
+ ldrh r3, [r2, #932]
movw r1, #65535
cmp r3, r1
- bne .L2880
- ldrh r1, [r2, #1694]
+ bne .L2900
+ ldrh r1, [r2, #1690]
cmp r1, r3
- bne .L2880
- ldr r3, .L3014+4
- ldrh r0, [r3, #-72]
- cbnz r0, .L2881
- ldr r3, .L3014+8
- ldr r2, [r2, #940]
- ldr r3, [r3, #2960]
+ bne .L2900
+ ldr r3, .L3034+4
+ ldrh r0, [r3, #-68]
+ cbnz r0, .L2901
+ ldr r3, .L3034+8
+ ldr r2, [r2, #988]
+ ldr r3, [r3, #2968]
add r3, r3, r3, lsl #1
cmp r2, r3, lsr #2
- bcs .L2943
-.L2881:
- ldrh r3, [r7, #1060]
+ bcs .L2963
+.L2901:
+ ldrh r3, [r7, #1056]
add r3, r3, r3, lsl #1
ubfx r3, r3, #2, #16
- b .L2882
-.L2943:
+ b .L2902
+.L2963:
movs r3, #18
-.L2882:
- strh r3, [r7, #1640] @ movhi
+.L2902:
+ strh r3, [r7, #1636] @ movhi
movs r3, #0
- str r3, [r7, #1652]
- b .L2994
-.L2880:
- ldrh r3, [r7, #1060]
+ str r3, [r7, #1648]
+ b .L3014
+.L2900:
+ ldrh r3, [r7, #1056]
add r3, r3, r3, lsl #1
asrs r3, r3, #2
- strh r3, [r7, #1640] @ movhi
- b .L2879
-.L3006:
+ strh r3, [r7, #1636] @ movhi
+ b .L2899
+.L3026:
cmp r6, #2
- bhi .L2945
+ bhi .L2965
adds r5, r5, #1
uxth r5, r5
- b .L2945
-.L3002:
+ b .L2965
+.L3022:
cmp r8, #0
- beq .L2933
- b .L2874
-.L2859:
+ beq .L2953
+ b .L2894
+.L2879:
cmp r8, #0
- beq .L2933
- b .L2890
-.L2860:
+ beq .L2953
+ b .L2910
+.L2880:
cmp r8, #0
- beq .L2933
- b .L2934
-.L2862:
+ beq .L2953
+ b .L2954
+.L2882:
cmp r8, #0
- beq .L2933
- b .L2935
-.L2994:
+ beq .L2953
+ b .L2955
+.L3014:
add sp, sp, #44
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L3015:
+.L3035:
.align 2
-.L3014:
+.L3034:
.word .LANCHOR2
.word .LANCHOR4
.word .LANCHOR0
- .word .LC132
+ .word .LC135
.fnend
- .size rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
+ .size ftl_do_gc, .-ftl_do_gc
.align 1
.global FtlCacheWriteBack
.thumb
@@ -18394,135 +18554,135 @@ FtlCacheWriteBack:
push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.pad #12
- ldr r3, .L3058
- ldr r6, .L3058+4
- ldr r5, [r3, #-64]
- ldr r3, [r6, #740]
+ ldr r3, .L3078
+ ldr r6, .L3078+4
+ ldr r5, [r3, #-60]
+ ldr r3, [r6, #744]
cmp r3, #0
- bne .L3018
- ldr r4, .L3058+8
- ldr r1, [r4, #2952]
+ bne .L3038
+ ldr r4, .L3078+8
+ ldr r1, [r4, #2960]
cmp r1, #0
- beq .L3018
+ beq .L3038
ldrb r7, [r4, #76] @ zero_extendqisi2
- cbz r7, .L3020
+ cbz r7, .L3040
ldrb r7, [r5, #8] @ zero_extendqisi2
subs r0, r7, #1
rsbs r7, r0, #0
adcs r7, r7, r0
-.L3020:
- ldr r0, [r4, #2956]
+.L3040:
+ ldr r0, [r4, #2964]
mov r2, r7
ldrb r3, [r5, #9] @ zero_extendqisi2
mov r9, #0
bl FlashProgPages
- ldr r10, .L3058+8
+ ldr r10, .L3078+8
mov fp, #36
-.L3021:
- ldr r3, [r4, #2952]
+.L3041:
+ ldr r3, [r4, #2960]
cmp r9, r3
- bcs .L3038
+ bcs .L3058
mul r8, fp, r9
- ldr r3, [r10, #2956]
+ ldr r3, [r10, #2964]
add r2, r3, r8
ldr r3, [r3, r8]
adds r3, r3, #1
- beq .L3041
+ beq .L3061
ldr r3, [r2, #4]
- cbz r7, .L3054
+ cbz r7, .L3074
orr r3, r3, #-2147483648
-.L3054:
+.L3074:
ldr r0, [r2, #16]
add r1, sp, #4
movs r2, #1
str r3, [sp, #4]
bl log2phys
- ldr r3, [r4, #2956]
+ ldr r3, [r4, #2964]
add r8, r8, r3
ldr r3, [r8, #12]
ldr r0, [r3, #12]
adds r2, r0, #1
- beq .L3025
+ beq .L3045
ubfx r0, r0, #10, #16
bl P2V_block_in_plane
- ldr r3, [r6, #768]
+ ldr r3, [r6, #816]
ldrh r2, [r3, r0, lsl #1]
mov r8, r0
- cbnz r2, .L3026
- ldr r0, .L3058+12
+ cbnz r2, .L3046
+ ldr r0, .L3078+12
mov r1, r8
bl printk
-.L3026:
+.L3046:
mov r0, r8
bl decrement_vpc_count
-.L3025:
+.L3045:
add r9, r9, #1
- b .L3021
-.L3056:
+ b .L3041
+.L3076:
movw r5, #16386
-.L3037:
- ldrh r3, [r6, #1698]
- cbz r3, .L3038
+.L3057:
+ ldrh r3, [r6, #1694]
+ cbz r3, .L3058
movs r0, #1
mov r1, r0
- bl rk_ftl_garbage_collect
+ bl ftl_do_gc
subs r5, r5, #1
- bne .L3037
-.L3038:
+ bne .L3057
+.L3058:
movs r3, #0
- str r3, [r4, #2952]
- b .L3018
-.L3041:
- ldr r10, .L3058+8
+ str r3, [r4, #2960]
+ b .L3038
+.L3061:
+ ldr r10, .L3078+8
mov r9, #0
-.L3022:
- ldr r3, [r4, #2952]
+.L3042:
+ ldr r3, [r4, #2960]
cmp r9, r3
- bcs .L3056
+ bcs .L3076
mov r8, #36
- ldr r3, [r10, #2956]
+ ldr r3, [r10, #2964]
mov fp, #0
mov r2, #-1
mul r8, r8, r9
str r2, [r3, r8]
-.L3028:
- ldr r3, [r4, #2956]
+.L3048:
+ ldr r3, [r4, #2964]
add r2, r3, r8
ldr r3, [r3, r8]
adds r3, r3, #1
- bne .L3057
+ bne .L3077
ldr r0, [r2, #4]
ubfx r0, r0, #10, #16
bl P2V_block_in_plane
ldrh r3, [r5]
cmp r3, r0
- bne .L3029
- ldr r1, [r6, #768]
+ bne .L3049
+ ldr r1, [r6, #816]
ldrh r0, [r5, #4]
ldrh r2, [r1, r3, lsl #1]
subs r2, r2, r0
strh r2, [r1, r3, lsl #1] @ movhi
- ldrh r3, [r10, #2898]
+ ldrh r3, [r10, #2910]
strb fp, [r5, #6]
strh fp, [r5, #4] @ movhi
strh r3, [r5, #2] @ movhi
-.L3029:
+.L3049:
ldrh r3, [r5, #4]
- cbnz r3, .L3030
+ cbnz r3, .L3050
mov r0, r5
bl allocate_new_data_superblock
-.L3030:
- ldr r3, [r6, #1224]
+.L3050:
+ ldr r3, [r6, #1220]
adds r3, r3, #1
- str r3, [r6, #1224]
- ldr r3, [r4, #2956]
+ str r3, [r6, #1220]
+ ldr r3, [r4, #2964]
add r3, r3, r8
ldr r0, [r3, #4]
ubfx r0, r0, #10, #16
bl FtlGcMarkBadPhyBlk
mov r0, r5
bl get_new_active_ppa
- ldr r3, [r4, #2956]
+ ldr r3, [r4, #2964]
movs r1, #1
mov r2, r7
add r3, r3, r8
@@ -18531,53 +18691,53 @@ FtlCacheWriteBack:
mov r0, r3
ldrb r3, [r5, #9] @ zero_extendqisi2
bl FlashProgPages
- ldr r3, [r6, #740]
+ ldr r3, [r6, #744]
cmp r3, #0
- beq .L3028
- b .L3018
-.L3057:
+ beq .L3048
+ b .L3038
+.L3077:
ldr r3, [r2, #4]
- cbz r7, .L3055
+ cbz r7, .L3075
orr r3, r3, #-2147483648
-.L3055:
+.L3075:
ldr r0, [r2, #16]
add r1, sp, #4
movs r2, #1
str r3, [sp, #4]
bl log2phys
- ldr r3, [r4, #2956]
+ ldr r3, [r4, #2964]
add r8, r8, r3
ldr r3, [r8, #12]
ldr r0, [r3, #12]
adds r3, r0, #1
- beq .L3034
+ beq .L3054
ubfx r0, r0, #10, #16
bl P2V_block_in_plane
- ldr r3, [r6, #768]
+ ldr r3, [r6, #816]
ldrh r2, [r3, r0, lsl #1]
mov r8, r0
- cbnz r2, .L3035
- ldr r0, .L3058+12
+ cbnz r2, .L3055
+ ldr r0, .L3078+12
mov r1, r8
bl printk
-.L3035:
+.L3055:
mov r0, r8
bl decrement_vpc_count
-.L3034:
+.L3054:
add r9, r9, #1
- b .L3022
-.L3018:
+ b .L3042
+.L3038:
movs r0, #0
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L3059:
+.L3079:
.align 2
-.L3058:
+.L3078:
.word .LANCHOR4
.word .LANCHOR2
.word .LANCHOR0
- .word .LC133
+ .word .LC136
.fnend
.size FtlCacheWriteBack, .-FtlCacheWriteBack
.align 1
@@ -18591,20 +18751,20 @@ FtlSysFlush:
@ frame_needed = 0, uses_anonymous_args = 0
push {r3, lr}
.save {r3, lr}
- ldr r3, .L3062
- ldr r3, [r3, #740]
- cbnz r3, .L3061
+ ldr r3, .L3082
+ ldr r3, [r3, #744]
+ cbnz r3, .L3081
bl FtlCacheWriteBack
bl l2p_flush
movs r0, #1
bl FtlEctTblFlush
bl FtlVpcTblFlush
-.L3061:
+.L3081:
movs r0, #0
pop {r3, pc}
-.L3063:
+.L3083:
.align 2
-.L3062:
+.L3082:
.word .LANCHOR2
.fnend
.size FtlSysFlush, .-FtlSysFlush
@@ -18619,21 +18779,38 @@ FtlDeInit:
@ frame_needed = 0, uses_anonymous_args = 0
push {r3, lr}
.save {r3, lr}
- ldr r3, .L3066
+ ldr r3, .L3086
ldr r3, [r3, #504]
cmp r3, #1
- bne .L3065
+ bne .L3085
bl FtlSysFlush
-.L3065:
+.L3085:
movs r0, #0
pop {r3, pc}
-.L3067:
+.L3087:
.align 2
-.L3066:
+.L3086:
.word .LANCHOR1
.fnend
.size FtlDeInit, .-FtlDeInit
.align 1
+ .global ftl_deinit
+ .thumb
+ .thumb_func
+ .type ftl_deinit, %function
+ftl_deinit:
+ .fnstart
+ @ args = 0, pretend = 0, frame = 0
+ @ frame_needed = 0, uses_anonymous_args = 0
+ push {r3, lr}
+ .save {r3, lr}
+ bl ftl_flash_de_init
+ bl FtlDeInit
+ pop {r3, lr}
+ b ftl_flash_de_init
+ .fnend
+ .size ftl_deinit, .-ftl_deinit
+ .align 1
.global rk_ftl_de_init
.thumb
.thumb_func
@@ -18644,18 +18821,49 @@ rk_ftl_de_init:
@ frame_needed = 0, uses_anonymous_args = 0
push {r3, lr}
.save {r3, lr}
- bl FlashDeInit
- bl FtlDeInit
+ movs r1, #0
+ ldr r0, .L3090
+ bl printk
pop {r3, lr}
- b FlashDeInit
+ b ftl_deinit
+.L3091:
+ .align 2
+.L3090:
+ .word .LC137
.fnend
.size rk_ftl_de_init, .-rk_ftl_de_init
.align 1
- .global FtlDiscard
+ .global ftl_cache_flush
.thumb
.thumb_func
- .type FtlDiscard, %function
-FtlDiscard:
+ .type ftl_cache_flush, %function
+ftl_cache_flush:
+ .fnstart
+ @ args = 0, pretend = 0, frame = 0
+ @ frame_needed = 0, uses_anonymous_args = 0
+ @ link register save eliminated.
+ b FtlCacheWriteBack
+ .fnend
+ .size ftl_cache_flush, .-ftl_cache_flush
+ .align 1
+ .global rk_ftl_cache_write_back
+ .thumb
+ .thumb_func
+ .type rk_ftl_cache_write_back, %function
+rk_ftl_cache_write_back:
+ .fnstart
+ @ args = 0, pretend = 0, frame = 0
+ @ frame_needed = 0, uses_anonymous_args = 0
+ @ link register save eliminated.
+ b FtlCacheWriteBack
+ .fnend
+ .size rk_ftl_cache_write_back, .-rk_ftl_cache_write_back
+ .align 1
+ .global ftl_discard
+ .thumb
+ .thumb_func
+ .type ftl_discard, %function
+ftl_discard:
.fnstart
@ args = 0, pretend = 0, frame = 8
@ frame_needed = 0, uses_anonymous_args = 0
@@ -18663,25 +18871,21 @@ FtlDiscard:
.save {r4, r5, r6, r7, r8, r9, lr}
.pad #12
adds r2, r0, r1
- ldr r7, .L3085
+ ldr r7, .L3111
mov r6, r0
mov r5, r1
- ldr r3, [r7, #2940]
+ ldr r3, [r7, #1896]
cmp r2, r3
- bhi .L3077
+ bhi .L3101
cmp r1, #31
- bhi .L3071
-.L3072:
- movs r0, #0
- b .L3070
-.L3071:
- ldr r3, .L3085+4
- ldr r2, [r3, #740]
+ bls .L3103
+ ldr r3, .L3111+4
+ ldr r2, [r3, #744]
mov r8, r3
cmp r2, #0
- bne .L3072
+ bne .L3103
bl FtlCacheWriteBack
- ldrh r4, [r7, #2904]
+ ldrh r4, [r7, #2916]
mov r0, r6
mov r1, r4
bl __aeabi_uidiv
@@ -18689,7 +18893,7 @@ FtlDiscard:
mov r9, r0
subs r6, r6, r3
uxth r6, r6
- cbz r6, .L3073
+ cbz r6, .L3096
subs r4, r4, r6
add r9, r0, #1
cmp r4, r5
@@ -18697,63 +18901,79 @@ FtlDiscard:
movcs r4, r5
uxth r4, r4
subs r5, r5, r4
-.L3073:
- ldr r4, .L3085+8
+.L3096:
+ ldr r4, .L3111+8
mov r3, #-1
str r3, [sp, #4]
-.L3074:
- ldrh r3, [r7, #2904]
+.L3097:
+ ldrh r3, [r7, #2916]
cmp r5, r3
- bcc .L3084
+ bcc .L3110
mov r0, r9
mov r1, sp
movs r2, #0
bl log2phys
ldr r3, [sp]
adds r3, r3, #1
- beq .L3075
- ldr r3, [r4, #-60]
+ beq .L3098
+ ldr r3, [r4, #-56]
add r1, sp, #4
movs r2, #1
mov r0, r9
adds r3, r3, #1
- str r3, [r4, #-60]
- ldr r3, [r8, #956]
+ str r3, [r4, #-56]
+ ldr r3, [r8, #1000]
adds r3, r3, #1
- str r3, [r8, #956]
+ str r3, [r8, #1000]
bl log2phys
ldr r0, [sp]
ubfx r0, r0, #10, #16
bl P2V_block_in_plane
bl decrement_vpc_count
-.L3075:
- ldrh r3, [r7, #2904]
+.L3098:
+ ldrh r3, [r7, #2916]
add r9, r9, #1
subs r5, r5, r3
- b .L3074
-.L3084:
- ldr r3, .L3085+8
- ldr r2, [r3, #-60]
+ b .L3097
+.L3110:
+ ldr r3, .L3111+8
+ ldr r2, [r3, #-56]
cmp r2, #32
- bls .L3072
- movs r4, #0
- str r4, [r3, #-60]
+ bls .L3103
+ movs r2, #0
+ str r2, [r3, #-56]
bl l2p_flush
bl FtlVpcTblFlush
- b .L3072
-.L3077:
+ b .L3103
+.L3101:
mov r0, #-1
-.L3070:
+ b .L3095
+.L3103:
+ movs r0, #0
+.L3095:
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, pc}
-.L3086:
+.L3112:
.align 2
-.L3085:
+.L3111:
.word .LANCHOR0
.word .LANCHOR2
.word .LANCHOR4
.fnend
+ .size ftl_discard, .-ftl_discard
+ .align 1
+ .global FtlDiscard
+ .thumb
+ .thumb_func
+ .type FtlDiscard, %function
+FtlDiscard:
+ .fnstart
+ @ args = 0, pretend = 0, frame = 0
+ @ frame_needed = 0, uses_anonymous_args = 0
+ @ link register save eliminated.
+ b ftl_discard
+ .fnend
.size FtlDiscard, .-FtlDiscard
.align 1
.global FtlGcFreeTempBlock
@@ -18767,100 +18987,100 @@ FtlGcFreeTempBlock:
push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.pad #12
- ldr r4, .L3124
- ldr r6, .L3124+4
- ldr r2, [r4, #740]
- ldrh r1, [r6, #2898]
+ ldr r4, .L3151
+ ldr r6, .L3151+4
+ ldr r2, [r4, #744]
+ ldrh r1, [r6, #2910]
cmp r2, #0
- bne .L3122
- ldrh r5, [r4, #884]
+ bne .L3149
+ ldrh r5, [r4, #932]
movw r7, #65535
cmp r5, r7
- bne .L3090
-.L3099:
- ldrh r2, [r4, #884]
+ bne .L3117
+.L3126:
+ ldrh r2, [r4, #932]
movw r3, #65535
movs r7, #0
- ldr r5, .L3124
+ ldr r5, .L3151
cmp r2, r3
- str r7, [r4, #1924]
- beq .L3122
+ str r7, [r4, #1928]
+ beq .L3149
bl FtlCacheWriteBack
- ldrb r0, [r5, #891] @ zero_extendqisi2
- ldrh r3, [r6, #2898]
+ ldrb r0, [r5, #939] @ zero_extendqisi2
+ ldrh r3, [r6, #2910]
mov r10, #12
- ldr r2, [r5, #768]
- ldrh r1, [r5, #884]
+ ldr r2, [r5, #816]
+ ldrh r1, [r5, #932]
smulbb r3, r0, r3
strh r3, [r2, r1, lsl #1] @ movhi
- ldr r3, [r5, #972]
- ldrh r2, [r5, #1692]
+ ldr r3, [r5, #1016]
+ ldrh r2, [r5, #1688]
add r3, r3, r2
- str r3, [r5, #972]
- b .L3100
-.L3090:
- cbz r0, .L3093
- ldr r3, .L3124+8
- ldrh r0, [r3, #3000]
+ str r3, [r5, #1016]
+ b .L3127
+.L3117:
+ cbz r0, .L3120
+ ldr r3, .L3151+8
+ ldrh r0, [r3, #3064]
cmp r0, r7
- beq .L3094
-.L3095:
+ beq .L3121
+.L3122:
movs r1, #2
- b .L3093
-.L3094:
- strh r2, [r3, #3000] @ movhi
- ldrh r3, [r4, #784]
+ b .L3120
+.L3121:
+ strh r2, [r3, #3064] @ movhi
+ ldrh r3, [r4, #832]
cmp r3, #17
- bhi .L3095
-.L3093:
- ldr r7, .L3124
- add r0, r7, #884
+ bhi .L3122
+.L3120:
+ ldr r7, .L3151
+ add r0, r7, #932
bl FtlGcScanTempBlk
str r0, [sp, #4]
adds r0, r0, #1
- beq .L3096
- ldr r2, [r7, #748]
+ beq .L3123
+ ldr r2, [r7, #752]
ldrh r3, [r2, r5, lsl #1]
cmp r3, #4
- bls .L3097
+ bls .L3124
subs r3, r3, #5
movs r0, #1
strh r3, [r2, r5, lsl #1] @ movhi
bl FtlEctTblFlush
-.L3097:
- ldr r3, [r4, #1924]
- ldr r2, .L3124
- cbnz r3, .L3098
+.L3124:
+ ldr r3, [r4, #1928]
+ ldr r2, .L3151
+ cbnz r3, .L3125
ldr r0, [sp, #4]
- ldr r3, [r2, #1224]
+ ldr r3, [r2, #1220]
ubfx r0, r0, #10, #16
adds r3, r3, #1
- str r3, [r2, #1224]
+ str r3, [r2, #1220]
bl FtlBbmMapBadBlock
bl FtlBbmTblFlush
-.L3098:
+.L3125:
movs r3, #0
- str r3, [r4, #1924]
- b .L3110
-.L3096:
- ldr r3, .L3124+8
- ldrh r2, [r3, #3000]
+ str r3, [r4, #1928]
+ b .L3137
+.L3123:
+ ldr r3, .L3151+8
+ ldrh r2, [r3, #3064]
movw r3, #65535
cmp r2, r3
- bne .L3110
- b .L3099
-.L3103:
+ bne .L3137
+ b .L3126
+.L3130:
mul r8, r10, r8
- ldr fp, [r5, #1688]
+ ldr fp, [r5, #1684]
add r1, sp, #4
movs r2, #0
add r9, fp, r8
ldr r0, [r9, #8]
bl log2phys
- ldr r3, [fp, r8]
ldr r0, [sp, #4]
+ ldr r3, [fp, r8]
cmp r0, r3
- bne .L3101
+ bne .L3128
ubfx r0, r0, #10, #16
bl P2V_block_in_plane
add r1, r9, #4
@@ -18869,96 +19089,96 @@ FtlGcFreeTempBlock:
ldr r0, [r9, #8]
bl log2phys
mov r0, r8
-.L3121:
+.L3148:
bl decrement_vpc_count
-.L3102:
+.L3129:
adds r7, r7, #1
-.L3100:
- ldrh r3, [r4, #1692]
+.L3127:
+ ldrh r3, [r4, #1688]
uxth r8, r7
cmp r3, r8
- bhi .L3103
- b .L3123
-.L3101:
+ bhi .L3130
+ b .L3150
+.L3128:
ldr r3, [r9, #4]
cmp r0, r3
- beq .L3102
- ldrh r0, [r5, #884]
- b .L3121
-.L3123:
+ beq .L3129
+ ldrh r0, [r5, #932]
+ b .L3148
+.L3150:
movw r0, #65535
bl decrement_vpc_count
ldrb r3, [r6, #76] @ zero_extendqisi2
- cbz r3, .L3104
- ldr r3, .L3124
- ldr r0, .L3124+12
- ldrh r1, [r3, #884]
+ cbz r3, .L3131
+ ldr r3, .L3151
+ ldr r0, .L3151+12
+ ldrh r1, [r3, #932]
bl printk
-.L3104:
- ldrh r0, [r4, #884]
- ldr r3, [r4, #768]
+.L3131:
+ ldrh r0, [r4, #932]
+ ldr r3, [r4, #816]
ldrh r3, [r3, r0, lsl #1]
- cbz r3, .L3105
+ cbz r3, .L3132
bl INSERT_DATA_LIST
- b .L3106
-.L3105:
+ b .L3133
+.L3132:
bl INSERT_FREE_LIST
-.L3106:
+.L3133:
movw r3, #65535
- strh r3, [r4, #884] @ movhi
+ strh r3, [r4, #932] @ movhi
movs r3, #0
- strh r3, [r4, #1692] @ movhi
- strh r3, [r4, #1684] @ movhi
+ strh r3, [r4, #1688] @ movhi
+ strh r3, [r4, #1680] @ movhi
bl l2p_flush
bl FtlVpcTblFlush
- ldr r3, [r4, #948]
- ldr r5, .L3124
- cbz r3, .L3107
- ldr r3, [r5, #1008]
+ ldr r3, [r6, #2832]
+ ldr r5, .L3151
+ cbz r3, .L3134
+ ldr r3, [r5, #1052]
cmp r3, #29
- bhi .L3107
- ldrh r3, [r5, #1060]
- ldrh r2, [r5, #784]
+ bhi .L3134
+ ldrh r3, [r5, #1056]
+ ldrh r2, [r5, #832]
cmp r2, r3
itt cc
lslcc r3, r3, #1
- strhcc r3, [r5, #1640] @ movhi
+ strhcc r3, [r5, #1636] @ movhi
movw r3, #65535
- strh r3, [r4, #1076] @ movhi
- b .L3122
-.L3107:
- ldrh r3, [r4, #1060]
- ldrh r1, [r4, #784]
- ldr r2, .L3124
+ strh r3, [r4, #1072] @ movhi
+ b .L3149
+.L3134:
+ ldrh r3, [r4, #1056]
+ ldrh r1, [r4, #832]
+ ldr r2, .L3151
add r0, r3, r3, lsl #1
cmp r1, r0, asr #2
- ble .L3122
+ ble .L3149
ldrb r0, [r6, #76] @ zero_extendqisi2
movw r1, #65535
- strh r1, [r2, #1076] @ movhi
- cbz r0, .L3109
+ strh r1, [r2, #1072] @ movhi
+ cbz r0, .L3136
subs r3, r3, #2
- strh r3, [r2, #1640] @ movhi
-.L3122:
+ strh r3, [r2, #1636] @ movhi
+.L3149:
movs r0, #0
- b .L3089
-.L3109:
+ b .L3116
+.L3136:
movs r3, #20
- strh r3, [r2, #1640] @ movhi
- b .L3089
-.L3110:
+ strh r3, [r2, #1636] @ movhi
+ b .L3116
+.L3137:
movs r0, #1
-.L3089:
+.L3116:
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L3125:
+.L3152:
.align 2
-.L3124:
+.L3151:
.word .LANCHOR2
.word .LANCHOR0
.word .LANCHOR1
- .word .LC134
+ .word .LC138
.fnend
.size FtlGcFreeTempBlock, .-FtlGcFreeTempBlock
.align 1
@@ -18970,50 +19190,50 @@ Ftl_gc_temp_data_write_back:
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L3144
+ ldr r3, .L3171
push {r4, r5, r6, r7, r8, lr}
.save {r4, r5, r6, r7, r8, lr}
ldrb r3, [r3, #76] @ zero_extendqisi2
- ldr r5, .L3144+4
- cbz r3, .L3127
- ldr r3, [r5, #1656]
+ ldr r5, .L3171+4
+ cbz r3, .L3154
+ ldr r3, [r5, #1652]
lsls r4, r3, #31
- bpl .L3127
- ldrh r3, [r5, #888]
- cbz r3, .L3127
-.L3132:
+ bpl .L3154
+ ldrh r3, [r5, #936]
+ cbz r3, .L3154
+.L3159:
movs r0, #0
pop {r4, r5, r6, r7, r8, pc}
-.L3127:
+.L3154:
movs r2, #0
ldr r0, [r5, #1768]
- ldr r1, [r5, #1656]
+ ldr r1, [r5, #1652]
movs r6, #0
mov r3, r2
- ldr r7, .L3144+4
+ ldr r7, .L3171+4
bl FlashProgPages
mov r8, #36
-.L3129:
- ldr r1, [r5, #1656]
+.L3156:
+ ldr r1, [r5, #1652]
uxth r3, r6
- ldr r4, .L3144+4
+ ldr r4, .L3171+4
cmp r3, r1
- bcs .L3143
+ bcs .L3170
mul r3, r8, r3
ldr r1, [r7, #1768]
adds r6, r6, #1
adds r2, r1, r3
ldr r1, [r1, r3]
adds r0, r1, #1
- bne .L3130
- ldrh r0, [r4, #884]
+ bne .L3157
+ ldrh r0, [r4, #932]
movs r5, #0
- ldr r2, [r4, #768]
+ ldr r2, [r4, #816]
strh r5, [r2, r0, lsl #1] @ movhi
- ldr r2, [r4, #1224]
- strh r1, [r4, #884] @ movhi
+ ldr r2, [r4, #1220]
+ strh r1, [r4, #932] @ movhi
adds r2, r2, #1
- str r2, [r4, #1224]
+ str r2, [r4, #1220]
ldr r2, [r4, #1768]
add r3, r3, r2
ldr r0, [r3, #4]
@@ -19021,30 +19241,30 @@ Ftl_gc_temp_data_write_back:
bl FtlBbmMapBadBlock
bl FtlBbmTblFlush
bl FtlGcPageVarInit
- b .L3142
-.L3130:
+ b .L3169
+.L3157:
ldr r3, [r2, #12]
ldr r1, [r2, #4]
ldr r0, [r3, #12]
ldr r2, [r3, #8]
bl FtlGcUpdatePage
- b .L3129
-.L3143:
+ b .L3156
+.L3170:
ldr r0, [r4, #1768]
bl FtlGcBufFree
movs r3, #0
- str r3, [r4, #1656]
- ldrh r3, [r4, #888]
+ str r3, [r4, #1652]
+ ldrh r3, [r4, #936]
cmp r3, #0
- bne .L3132
+ bne .L3159
movs r0, #1
bl FtlGcFreeTempBlock
-.L3142:
+.L3169:
movs r0, #1
pop {r4, r5, r6, r7, r8, pc}
-.L3145:
+.L3172:
.align 2
-.L3144:
+.L3171:
.word .LANCHOR0
.word .LANCHOR2
.fnend
@@ -19060,26 +19280,26 @@ FtlGcPageRecovery:
@ frame_needed = 0, uses_anonymous_args = 0
push {r3, r4, r5, lr}
.save {r3, r4, r5, lr}
- ldr r5, .L3148
- ldr r4, .L3148+4
- ldrh r1, [r5, #2898]
- add r0, r4, #884
+ ldr r5, .L3175
+ ldr r4, .L3175+4
+ ldrh r1, [r5, #2910]
+ add r0, r4, #932
bl FtlGcScanTempBlk
- ldrh r2, [r4, #886]
- ldrh r3, [r5, #2898]
+ ldrh r2, [r4, #934]
+ ldrh r3, [r5, #2910]
cmp r2, r3
- bcc .L3146
- add r0, r4, #1864
+ bcc .L3173
+ addw r0, r4, #1868
bl FtlMapBlkWriteDumpData
movs r0, #0
bl FtlGcFreeTempBlock
movs r3, #0
- str r3, [r4, #1924]
-.L3146:
+ str r3, [r4, #1928]
+.L3173:
pop {r3, r4, r5, pc}
-.L3149:
+.L3176:
.align 2
-.L3148:
+.L3175:
.word .LANCHOR0
.word .LANCHOR2
.fnend
@@ -19096,12 +19316,12 @@ FtlPowerLostRecovery:
push {r4, r5, r6, lr}
.save {r4, r5, r6, lr}
movs r5, #0
- ldr r4, .L3151
- ldr r3, .L3151+4
- add r6, r4, #788
- add r4, r4, #836
+ ldr r4, .L3178
+ ldr r3, .L3178+4
+ add r6, r4, #836
+ add r4, r4, #884
mov r0, r6
- str r5, [r3, #-204]
+ str r5, [r3, #-200]
bl FtlRecoverySuperblock
mov r0, r6
bl FtlSlcSuperblockCheck
@@ -19114,184 +19334,14 @@ FtlPowerLostRecovery:
bl decrement_vpc_count
mov r0, r5
pop {r4, r5, r6, pc}
-.L3152:
+.L3179:
.align 2
-.L3151:
+.L3178:
.word .LANCHOR2
.word .LANCHOR4
.fnend
.size FtlPowerLostRecovery, .-FtlPowerLostRecovery
.align 1
- .global Ftl_get_new_temp_ppa
- .thumb
- .thumb_func
- .type Ftl_get_new_temp_ppa, %function
-Ftl_get_new_temp_ppa:
- .fnstart
- @ args = 0, pretend = 0, frame = 0
- @ frame_needed = 0, uses_anonymous_args = 0
- push {r3, r4, r5, lr}
- .save {r3, r4, r5, lr}
- movw r3, #65535
- ldr r4, .L3156
- ldrh r2, [r4, #884]
- cmp r2, r3
- beq .L3154
- ldrh r3, [r4, #888]
- cbnz r3, .L3155
-.L3154:
- bl FtlCacheWriteBack
- movs r0, #0
- movs r5, #0
- bl FtlGcFreeTempBlock
- ldr r0, .L3156+4
- strb r5, [r4, #892]
- bl allocate_data_superblock
- strh r5, [r4, #1684] @ movhi
- strh r5, [r4, #1692] @ movhi
- bl l2p_flush
- mov r0, r5
- bl FtlEctTblFlush
- bl FtlVpcTblFlush
-.L3155:
- ldr r0, .L3156+4
- pop {r3, r4, r5, lr}
- b get_new_active_ppa
-.L3157:
- .align 2
-.L3156:
- .word .LANCHOR2
- .word .LANCHOR2+884
- .fnend
- .size Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
- .align 1
- .global rk_ftl_cache_write_back
- .thumb
- .thumb_func
- .type rk_ftl_cache_write_back, %function
-rk_ftl_cache_write_back:
- .fnstart
- @ args = 0, pretend = 0, frame = 0
- @ frame_needed = 0, uses_anonymous_args = 0
- @ link register save eliminated.
- b FtlCacheWriteBack
- .fnend
- .size rk_ftl_cache_write_back, .-rk_ftl_cache_write_back
- .align 1
- .global ftl_fix_nand_power_lost_error
- .thumb
- .thumb_func
- .type ftl_fix_nand_power_lost_error, %function
-ftl_fix_nand_power_lost_error:
- .fnstart
- @ args = 0, pretend = 0, frame = 48
- @ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L3174
- push {r4, r5, r6, r7, r8, r9, r10, lr}
- .save {r4, r5, r6, r7, r8, r9, r10, lr}
- .pad #48
- sub sp, sp, #48
- ldrb r2, [r3, #76] @ zero_extendqisi2
- mov r8, r3
- cmp r2, #0
- beq .L3159
- ldr r4, .L3174+4
- movw r7, #4097
- ldr r6, .L3174+8
- ldr r0, .L3174+12
- ldr r3, [r4, #768]
- ldrh r5, [r6, #-210]
- mov r1, r5
- ldrh r2, [r3, r5, lsl #1]
- bl printk
- ldrh r0, [r4, #788]
- bl FtlGcRefreshOpenBlock
- ldrh r0, [r4, #836]
- bl FtlGcRefreshOpenBlock
- add r0, r4, #788
- bl allocate_new_data_superblock
- add r0, r4, #836
- bl allocate_new_data_superblock
- lsl r9, r5, #1
-.L3161:
- subs r7, r7, #1
- beq .L3165
- movs r0, #1
- mov r1, r0
- bl rk_ftl_garbage_collect
- ldr r3, [r4, #768]
- ldrh r3, [r3, r9]
- cmp r3, #0
- bne .L3161
-.L3165:
- ldr r3, [r4, #768]
- mov r1, r5
- ldr r0, .L3174+12
- ldrh r2, [r3, r5, lsl #1]
- bl printk
- ldr r3, [r4, #768]
- ldrh r7, [r3, r5, lsl #1]
- cbnz r7, .L3163
- add r0, sp, #48
- mov r10, #36
- movw r9, #65535
- strh r5, [r0, #-48]! @ movhi
- bl make_superblock
- ldr r3, .L3174+4
- ldrh ip, [r8, #2828]
- ldr r8, [r3, #744]
- mov r3, r7
- mov lr, r3
- add r0, sp, #14
-.L3166:
- uxth r2, r3
- cmp r2, ip
- bcs .L3173
- ldrh r2, [r0, #2]!
- cmp r2, r9
- beq .L3167
- mla r1, r10, r7, r8
- adds r7, r7, #1
- lsls r2, r2, #10
- uxth r7, r7
- str r2, [r1, #4]
- str lr, [r1, #8]
- str lr, [r1, #12]
-.L3167:
- adds r3, r3, #1
- b .L3166
-.L3173:
- ldr r3, [r4, #768]
- mov r1, r5
- ldr r0, .L3174+16
- ldrh r2, [r3, r5, lsl #1]
- bl printk
- movs r1, #0
- mov r2, r7
- ldr r0, [r4, #744]
- bl FlashEraseBlocks
- ldr r0, [r4, #744]
- movs r1, #1
- mov r2, r7
- bl FlashEraseBlocks
-.L3163:
- movw r3, #65535
- strh r3, [r6, #-210] @ movhi
-.L3159:
- add sp, sp, #48
- @ sp needed
- pop {r4, r5, r6, r7, r8, r9, r10, pc}
-.L3175:
- .align 2
-.L3174:
- .word .LANCHOR0
- .word .LANCHOR2
- .word .LANCHOR4
- .word .LC135
- .word .LC136
- .fnend
- .size ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
- .align 1
.global FtlSysBlkInit
.thumb
.thumb_func
@@ -19307,22 +19357,22 @@ FtlSysBlkInit:
movw r6, #65535
ldr r7, .L3196+4
ldr r4, .L3196+8
- ldrh r0, [r5, #2832]
- strh r3, [r7, #-208] @ movhi
- strh r6, [r7, #-210] @ movhi
+ ldrh r0, [r5, #2844]
+ strh r3, [r7, #-204] @ movhi
+ strh r6, [r7, #-206] @ movhi
bl FtlFreeSysBlkQueueInit
bl FtlScanSysBlk
- ldrh r3, [r4, #1064]
+ ldrh r3, [r4, #1060]
cmp r3, r6
- bne .L3177
-.L3179:
+ bne .L3181
+.L3183:
mov r6, #-1
- b .L3178
-.L3177:
+ b .L3182
+.L3181:
bl FtlLoadSysInfo
mov r6, r0
cmp r0, #0
- bne .L3179
+ bne .L3183
bl FtlLoadMapInfo
bl FtlLoadVonderInfo
bl Ftl_load_ext_data
@@ -19332,106 +19382,94 @@ FtlSysBlkInit:
bl FtlPowerLostRecovery
movs r0, #1
bl FtlUpdateVaildLpn
- ldrh r1, [r5, #2938]
- ldr r2, [r4, #932]
+ ldrh r1, [r5, #2950]
+ ldr r2, [r4, #980]
movs r0, #12
mov r3, r6
-.L3180:
+.L3184:
cmp r3, r1
- bge .L3185
+ bge .L3189
mla lr, r0, r3, r2
ldr lr, [lr, #4]
cmp lr, #0
- bge .L3181
-.L3185:
- ldrh r2, [r4, #1040]
+ bge .L3185
+.L3189:
+ ldrh r2, [r4, #788]
cmp r3, r1
add r2, r2, #1
- strh r2, [r4, #1040] @ movhi
+ strh r2, [r4, #788] @ movhi
bge .L3195
- b .L3182
-.L3181:
+ b .L3186
+.L3185:
adds r3, r3, #1
- b .L3180
+ b .L3184
.L3195:
- ldrh r3, [r7, #-208]
+ ldrh r3, [r7, #-204]
cmp r3, #0
- beq .L3186
-.L3182:
+ beq .L3190
+.L3186:
ldr r0, .L3196+12
bl FtlSuperblockPowerLostFix
ldr r0, .L3196+16
bl FtlSuperblockPowerLostFix
- ldrh r1, [r4, #788]
- ldr r2, [r4, #768]
- ldrh r0, [r4, #792]
+ ldrh r1, [r4, #836]
+ ldr r2, [r4, #816]
+ ldrh r0, [r4, #840]
ldrh r3, [r2, r1, lsl #1]
subs r3, r3, r0
strh r3, [r2, r1, lsl #1] @ movhi
- ldr r1, [r4, #768]
- ldrh r3, [r5, #2898]
- ldrh r0, [r4, #836]
- ldrh r7, [r4, #840]
- strh r3, [r4, #790] @ movhi
+ ldr r1, [r4, #816]
+ ldrh r3, [r5, #2910]
+ ldrh r0, [r4, #884]
+ ldrh r7, [r4, #888]
+ strh r3, [r4, #838] @ movhi
movs r3, #0
- strb r3, [r4, #794]
- strh r3, [r4, #792] @ movhi
+ strb r3, [r4, #842]
+ strh r3, [r4, #840] @ movhi
ldrh r2, [r1, r0, lsl #1]
subs r2, r2, r7
strh r2, [r1, r0, lsl #1] @ movhi
- ldrh r2, [r5, #2898]
+ ldrh r2, [r5, #2910]
ldr r0, .L3196+20
- strb r3, [r4, #842]
- strh r2, [r4, #838] @ movhi
- strh r3, [r4, #840] @ movhi
+ strb r3, [r4, #890]
+ strh r2, [r4, #886] @ movhi
+ strh r3, [r4, #888] @ movhi
bl FtlMapBlkWriteDumpData
ldr r0, .L3196+24
bl FtlMapBlkWriteDumpData
- ldrh r3, [r4, #1042]
+ ldrh r3, [r4, #790]
adds r3, r3, #1
- strh r3, [r4, #1042] @ movhi
+ strh r3, [r4, #790] @ movhi
bl l2p_flush
bl FtlVpcTblFlush
bl FtlVpcTblFlush
-.L3186:
- ldrh r2, [r4, #788]
+.L3190:
+ ldrh r2, [r4, #836]
movw r3, #65535
ldr r5, .L3196+8
cmp r2, r3
- bne .L3187
-.L3189:
- ldrh r3, [r4, #1040]
- lsls r3, r3, #27
- bne .L3178
- bl FtlVpcCheckAndModify
- b .L3178
-.L3187:
- ldrh r3, [r5, #792]
- cmp r3, #0
- bne .L3189
+ beq .L3191
ldrh r3, [r5, #840]
- cmp r3, #0
- bne .L3189
+ cbnz r3, .L3191
+ ldrh r3, [r5, #888]
+ cbnz r3, .L3191
bl FtlVpcTblFlush
- ldrh r0, [r5, #788]
- bl FtlGcRefreshOpenBlock
ldrh r0, [r5, #836]
bl FtlGcRefreshOpenBlock
- add r0, r5, #788
- bl allocate_new_data_superblock
+ ldrh r0, [r5, #884]
+ bl FtlGcRefreshOpenBlock
add r0, r5, #836
bl allocate_new_data_superblock
- addw r0, r5, #4088
+ add r0, r5, #884
+ bl allocate_new_data_superblock
+ addw r0, r5, #4092
bl FtlMapBlkWriteDumpData
- mov r5, #4096
-.L3190:
- movs r0, #1
- mov r1, r0
- bl rk_ftl_garbage_collect
- subs r5, r5, #1
- bne .L3190
- b .L3189
-.L3178:
+.L3191:
+ ldrh r3, [r4, #788]
+ lsls r3, r3, #27
+ bne .L3182
+ bl FtlVpcCheckAndModify
+.L3182:
mov r0, r6
pop {r3, r4, r5, r6, r7, pc}
.L3197:
@@ -19440,13 +19478,56 @@ FtlSysBlkInit:
.word .LANCHOR0
.word .LANCHOR4
.word .LANCHOR2
- .word .LANCHOR2+788
.word .LANCHOR2+836
- .word .LANCHOR2+1864
- .word .LANCHOR2+4088
+ .word .LANCHOR2+884
+ .word .LANCHOR2+1868
+ .word .LANCHOR2+4092
.fnend
.size FtlSysBlkInit, .-FtlSysBlkInit
.align 1
+ .global Ftl_get_new_temp_ppa
+ .thumb
+ .thumb_func
+ .type Ftl_get_new_temp_ppa, %function
+Ftl_get_new_temp_ppa:
+ .fnstart
+ @ args = 0, pretend = 0, frame = 0
+ @ frame_needed = 0, uses_anonymous_args = 0
+ push {r3, r4, r5, lr}
+ .save {r3, r4, r5, lr}
+ movw r3, #65535
+ ldr r4, .L3201
+ ldrh r2, [r4, #932]
+ cmp r2, r3
+ beq .L3199
+ ldrh r3, [r4, #936]
+ cbnz r3, .L3200
+.L3199:
+ movs r5, #0
+ bl FtlCacheWriteBack
+ movs r0, #0
+ bl FtlGcFreeTempBlock
+ ldr r0, .L3201+4
+ strb r5, [r4, #940]
+ bl allocate_data_superblock
+ strh r5, [r4, #1680] @ movhi
+ strh r5, [r4, #1688] @ movhi
+ bl l2p_flush
+ mov r0, r5
+ bl FtlEctTblFlush
+ bl FtlVpcTblFlush
+.L3200:
+ ldr r0, .L3201+4
+ pop {r3, r4, r5, lr}
+ b get_new_active_ppa
+.L3202:
+ .align 2
+.L3201:
+ .word .LANCHOR2
+ .word .LANCHOR2+932
+ .fnend
+ .size Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa
+ .align 1
.global FtlInit
.thumb
.thumb_func
@@ -19457,76 +19538,75 @@ FtlInit:
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, lr}
.save {r4, r5, r6, lr}
- mov r4, r0
- ldr r2, .L3212
mov r3, #-1
- ldr r6, .L3212+4
- ldr r5, .L3212+8
- ldr r1, .L3212+12
- ldr r0, .L3212+16
+ ldr r2, .L3217
+ ldr r6, .L3217+4
+ ldr r5, .L3217+8
+ ldr r4, .L3217+12
+ ldr r1, .L3217+16
+ ldr r0, .L3217+20
str r3, [r6, #504]
movs r3, #0
- str r3, [r2, #-56]
- str r3, [r5, #740]
+ str r3, [r2, #-52]
+ str r3, [r5, #744]
bl printk
- mov r0, r4
- ldr r4, .L3212+20
+ add r0, r4, #1864
bl FtlConstantsInit
bl FtlMemInit
bl FtlVariablesInit
- ldrh r0, [r4, #2832]
+ ldrh r0, [r4, #2844]
bl FtlFreeSysBlkQueueInit
bl FtlLoadBbt
- cbz r0, .L3199
- ldr r0, .L3212+24
- b .L3211
-.L3199:
+ cbz r0, .L3204
+ ldr r0, .L3217+24
+ b .L3216
+.L3204:
bl FtlSysBlkInit
- cbz r0, .L3201
- ldr r0, .L3212+28
-.L3211:
- ldr r1, .L3212+32
+ cbz r0, .L3206
+ ldr r0, .L3217+28
+.L3216:
+ ldr r1, .L3217+32
bl printk
- b .L3200
-.L3201:
+ b .L3205
+.L3206:
movs r1, #1
str r1, [r6, #504]
- bl rk_ftl_garbage_collect
- ldrh r3, [r5, #784]
+ bl ftl_do_gc
+ ldrh r3, [r5, #832]
cmp r3, #15
- bhi .L3202
+ bhi .L3207
mov r4, #1024
-.L3203:
+.L3208:
movs r0, #1
mov r1, r0
- bl rk_ftl_garbage_collect
+ bl ftl_do_gc
subs r4, r4, #1
- bne .L3203
- b .L3200
-.L3202:
+ bne .L3208
+ b .L3205
+.L3207:
ldrb r3, [r4, #76] @ zero_extendqisi2
- cbz r3, .L3200
+ cbz r3, .L3205
movs r4, #128
-.L3205:
+.L3210:
movs r0, #1
mov r1, r0
- bl rk_ftl_garbage_collect
+ bl ftl_do_gc
subs r4, r4, #1
- bne .L3205
-.L3200:
+ bne .L3210
+.L3205:
movs r0, #0
pop {r4, r5, r6, pc}
-.L3213:
+.L3218:
.align 2
-.L3212:
+.L3217:
.word .LANCHOR4
.word .LANCHOR1
.word .LANCHOR2
- .word .LC75
- .word .LC74
.word .LANCHOR0
- .word .LC137
- .word .LC138
+ .word .LC78
+ .word .LC77
+ .word .LC139
+ .word .LC140
.word .LANCHOR3+40
.fnend
.size FtlInit, .-FtlInit
@@ -19543,54 +19623,179 @@ rk_ftl_init:
.save {r4, r5, r6, lr}
mov r0, #2048
bl ftl_malloc
- ldr r6, .L3218
- ldr r4, .L3218+4
+ ldr r6, .L3223
+ ldr r4, .L3223+4
movs r5, #0
mov r1, r6
- str r5, [r1, #-48]!
- str r5, [r4, #3980]
- str r0, [r6, #-52]
- addw r0, r4, #3980
+ str r5, [r1, #-44]!
+ str r5, [r4, #3984]
+ str r0, [r6, #-48]
+ add r0, r4, #3984
bl rknand_get_reg_addr
- ldr r3, [r4, #3980]
- cbz r3, .L3217
+ ldr r3, [r4, #3984]
+ cbz r3, .L3222
bl rk_nandc_irq_init
mov r1, r5
mov r2, r5
mov r3, #2048
- ldr r0, [r6, #-52]
+ ldr r0, [r6, #-48]
bl FlashSramLoadStore
bl rknand_flash_cs_init
- ldr r0, [r4, #3980]
+ ldr r0, [r4, #3984]
bl FlashInit
mov r4, r0
- cbnz r0, .L3216
- ldr r0, .L3218+8
+ cbnz r0, .L3221
bl FtlInit
-.L3216:
+.L3221:
mov r1, r4
- ldr r0, .L3218+12
+ ldr r0, .L3223+8
bl printk
mov r0, r4
pop {r4, r5, r6, pc}
-.L3217:
+.L3222:
mov r0, #-1
pop {r4, r5, r6, pc}
-.L3219:
+.L3224:
.align 2
-.L3218:
+.L3223:
.word .LANCHOR4
.word .LANCHOR2
- .word .LANCHOR0+1864
- .word .LC139
+ .word .LC141
.fnend
.size rk_ftl_init, .-rk_ftl_init
.align 1
- .global FtlRead
+ .global ftl_fix_nand_power_lost_error
.thumb
.thumb_func
- .type FtlRead, %function
-FtlRead:
+ .type ftl_fix_nand_power_lost_error, %function
+ftl_fix_nand_power_lost_error:
+ .fnstart
+ @ args = 0, pretend = 0, frame = 48
+ @ frame_needed = 0, uses_anonymous_args = 0
+ ldr r3, .L3240
+ push {r4, r5, r6, r7, r8, r9, r10, lr}
+ .save {r4, r5, r6, r7, r8, r9, r10, lr}
+ .pad #48
+ sub sp, sp, #48
+ ldrb r2, [r3, #76] @ zero_extendqisi2
+ mov r8, r3
+ cmp r2, #0
+ beq .L3225
+ ldr r4, .L3240+4
+ movw r7, #4097
+ ldr r6, .L3240+8
+ ldr r0, .L3240+12
+ ldr r3, [r4, #816]
+ ldrh r5, [r6, #-206]
+ mov r1, r5
+ ldrh r2, [r3, r5, lsl #1]
+ bl printk
+ ldrh r0, [r4, #836]
+ bl FtlGcRefreshOpenBlock
+ ldrh r0, [r4, #884]
+ bl FtlGcRefreshOpenBlock
+ add r0, r4, #836
+ bl allocate_new_data_superblock
+ add r0, r4, #884
+ bl allocate_new_data_superblock
+ lsl r9, r5, #1
+.L3227:
+ subs r7, r7, #1
+ beq .L3231
+ movs r0, #1
+ mov r1, r0
+ bl ftl_do_gc
+ ldr r3, [r4, #816]
+ ldrh r3, [r3, r9]
+ cmp r3, #0
+ bne .L3227
+.L3231:
+ ldr r3, [r4, #816]
+ mov r1, r5
+ ldr r0, .L3240+12
+ ldrh r2, [r3, r5, lsl #1]
+ bl printk
+ ldr r3, [r4, #816]
+ ldrh r7, [r3, r5, lsl #1]
+ cbnz r7, .L3229
+ add r0, sp, #48
+ mov r10, #36
+ movw r9, #65535
+ strh r5, [r0, #-48]! @ movhi
+ bl make_superblock
+ ldr r3, .L3240+4
+ ldrh ip, [r8, #2840]
+ add r0, sp, #14
+ ldr r8, [r3, #748]
+ mov r3, r7
+ mov lr, r3
+.L3232:
+ uxth r2, r3
+ cmp r2, ip
+ bcs .L3239
+ ldrh r2, [r0, #2]!
+ cmp r2, r9
+ beq .L3233
+ mla r1, r10, r7, r8
+ adds r7, r7, #1
+ lsls r2, r2, #10
+ uxth r7, r7
+ str r2, [r1, #4]
+ str lr, [r1, #8]
+ str lr, [r1, #12]
+.L3233:
+ adds r3, r3, #1
+ b .L3232
+.L3239:
+ ldr r3, [r4, #816]
+ mov r1, r5
+ ldr r0, .L3240+16
+ ldrh r2, [r3, r5, lsl #1]
+ bl printk
+ movs r1, #0
+ mov r2, r7
+ ldr r0, [r4, #748]
+ bl FlashEraseBlocks
+ ldr r0, [r4, #748]
+ movs r1, #1
+ mov r2, r7
+ bl FlashEraseBlocks
+.L3229:
+ movw r3, #65535
+ strh r3, [r6, #-206] @ movhi
+.L3225:
+ add sp, sp, #48
+ @ sp needed
+ pop {r4, r5, r6, r7, r8, r9, r10, pc}
+.L3241:
+ .align 2
+.L3240:
+ .word .LANCHOR0
+ .word .LANCHOR2
+ .word .LANCHOR4
+ .word .LC142
+ .word .LC143
+ .fnend
+ .size ftl_fix_nand_power_lost_error, .-ftl_fix_nand_power_lost_error
+ .align 1
+ .global rk_ftl_garbage_collect
+ .thumb
+ .thumb_func
+ .type rk_ftl_garbage_collect, %function
+rk_ftl_garbage_collect:
+ .fnstart
+ @ args = 0, pretend = 0, frame = 0
+ @ frame_needed = 0, uses_anonymous_args = 0
+ @ link register save eliminated.
+ b ftl_do_gc
+ .fnend
+ .size rk_ftl_garbage_collect, .-rk_ftl_garbage_collect
+ .align 1
+ .global ftl_read
+ .thumb
+ .thumb_func
+ .type ftl_read, %function
+ftl_read:
.fnstart
@ args = 0, pretend = 0, frame = 56
@ frame_needed = 0, uses_anonymous_args = 0
@@ -19602,98 +19807,98 @@ FtlRead:
mov r6, r1
mov r7, r3
str r2, [sp, #16]
- bne .L3221
+ bne .L3244
add r0, r1, #256
mov r1, r2
mov r2, r3
bl FtlVendorPartRead
- b .L3222
-.L3221:
+ b .L3245
+.L3244:
ldr r3, [sp, #16]
adds r3, r1, r3
str r3, [sp, #12]
- ldr r3, .L3261
+ ldr r3, .L3284
ldr r1, [sp, #12]
- ldr r2, [r3, #2940]
+ ldr r2, [r3, #1896]
cmp r1, r2
- bhi .L3242
- ldrh r4, [r3, #2904]
+ bhi .L3265
+ ldrh r4, [r3, #2916]
mov r0, r6
mov r1, r4
bl __aeabi_uidiv
- mov r1, r4
ldr r3, [sp, #12]
+ mov r1, r4
str r0, [sp, #4]
subs r0, r3, #1
bl __aeabi_uidiv
ldr r3, [sp, #4]
ldr r1, [sp, #16]
rsb r3, r3, #1
- str r0, [sp, #8]
add r3, r3, r0
str r3, [sp]
- ldr r3, .L3261+4
+ ldr r3, .L3284+4
+ str r0, [sp, #8]
ldr r0, [sp, #4]
- ldr r2, [r3, #980]
+ ldr r2, [r3, #1024]
add r2, r2, r1
ldr r1, [sp]
- str r2, [r3, #980]
- ldr r2, [r3, #952]
+ str r2, [r3, #1024]
+ ldr r2, [r3, #996]
add r2, r2, r1
ldr r1, [sp, #8]
- str r2, [r3, #952]
+ str r2, [r3, #996]
bl FtlCacheMetchLpa
- cbz r0, .L3223
+ cbz r0, .L3246
bl FtlCacheWriteBack
-.L3223:
+.L3246:
mov r9, #0
ldr r4, [sp, #4]
- ldr r10, .L3261+4
- ldr r8, .L3261
+ ldr r10, .L3284+4
+ ldr r8, .L3284
mov r5, r9
str r9, [sp, #20]
str r9, [sp, #24]
-.L3224:
+.L3247:
ldr r3, [sp]
cmp r3, #0
- beq .L3260
+ beq .L3283
add r1, sp, #52
movs r2, #0
mov r0, r4
bl log2phys
ldr r2, [sp, #52]
adds r1, r2, #1
- bne .L3257
+ bne .L3280
mov fp, #0
-.L3225:
- ldrh r0, [r8, #2904]
+.L3248:
+ ldrh r0, [r8, #2916]
cmp fp, r0
- bcs .L3229
+ bcs .L3252
mla r0, r0, r4, fp
cmp r0, r6
- bcc .L3227
+ bcc .L3250
ldr r3, [sp, #12]
cmp r0, r3
- bcs .L3227
+ bcs .L3250
subs r0, r0, r6
mov r1, #512
add r0, r7, r0, lsl #9
bl __memzero
-.L3227:
+.L3250:
add fp, fp, #1
- b .L3225
-.L3257:
+ b .L3248
+.L3280:
ldr r1, [r10, #1764]
mov fp, #36
ldr r3, [sp, #4]
mla fp, fp, r5, r1
cmp r4, r3
str r2, [fp, #4]
- bne .L3230
- ldr r2, [r10, #1788]
+ bne .L3253
+ ldr r2, [r10, #1792]
mov r0, r6
str r2, [fp, #8]
- ldrh r2, [r8, #2904]
+ ldrh r2, [r8, #2916]
mov r1, r2
str r2, [sp, #20]
bl __aeabi_uidivmod
@@ -19707,50 +19912,50 @@ FtlRead:
movcs r3, r0
cmp r3, r2
str r3, [sp, #20]
- bne .L3231
+ bne .L3254
str r7, [fp, #8]
- b .L3231
-.L3230:
+ b .L3254
+.L3253:
ldr r3, [sp, #8]
cmp r4, r3
- bne .L3232
- ldr r2, [r10, #1792]
- ldrh r1, [r8, #2904]
+ bne .L3255
+ ldr r2, [r10, #1796]
+ ldrh r1, [r8, #2916]
ldr r3, [sp, #12]
str r2, [fp, #8]
mul r2, r1, r4
rsb r9, r2, r3
cmp r9, r1
- bne .L3231
- b .L3258
-.L3232:
- ldrh r2, [r8, #2904]
+ bne .L3254
+ b .L3281
+.L3255:
+ ldrh r2, [r8, #2916]
muls r2, r4, r2
-.L3258:
+.L3281:
subs r2, r2, r6
add r2, r7, r2, lsl #9
str r2, [fp, #8]
-.L3231:
- ldrh r2, [r8, #2910]
- ldr r1, [r10, #1800]
+.L3254:
+ ldrh r2, [r8, #2922]
+ ldr r1, [r10, #1804]
str r4, [fp, #16]
muls r2, r5, r2
adds r5, r5, #1
bic r2, r2, #3
add r2, r2, r1
str r2, [fp, #12]
-.L3229:
+.L3252:
ldr r3, [sp]
adds r4, r4, #1
subs r3, r3, #1
str r3, [sp]
- beq .L3233
- ldrh r2, [r8, #2828]
+ beq .L3256
+ ldrh r2, [r8, #2840]
cmp r5, r2, lsl #3
- bne .L3224
-.L3233:
+ bne .L3247
+.L3256:
cmp r5, #0
- beq .L3224
+ beq .L3247
ldr r0, [r10, #1764]
mov r1, r5
movs r2, #0
@@ -19764,7 +19969,7 @@ FtlRead:
str r3, [sp, #36]
lsl r3, r9, #9
str r3, [sp, #40]
-.L3239:
+.L3262:
movs r3, #36
ldr r2, [r10, #1764]
mul ip, r3, fp
@@ -19772,86 +19977,99 @@ FtlRead:
add r2, r2, ip
ldr r1, [r2, #16]
cmp r1, r3
- bne .L3235
+ bne .L3258
ldr r1, [r2, #8]
- ldr r2, [r10, #1788]
+ ldr r2, [r10, #1792]
cmp r1, r2
- bne .L3236
+ bne .L3259
ldr r3, [sp, #32]
mov r0, r7
str ip, [sp, #44]
add r1, r1, r3
ldr r2, [sp, #36]
- b .L3259
-.L3235:
+ b .L3282
+.L3258:
ldr r3, [sp, #8]
cmp r1, r3
- bne .L3236
+ bne .L3259
ldr r1, [r2, #8]
- ldr r2, [r10, #1792]
+ ldr r2, [r10, #1796]
cmp r1, r2
- bne .L3236
- ldrh r0, [r8, #2904]
+ bne .L3259
+ ldrh r0, [r8, #2916]
ldr r2, [sp, #40]
str ip, [sp, #44]
muls r0, r3, r0
subs r0, r0, r6
add r0, r7, r0, lsl #9
-.L3259:
+.L3282:
bl ftl_memcpy
ldr ip, [sp, #44]
-.L3236:
+.L3259:
ldr r2, [r10, #1764]
add lr, r2, ip
ldr r0, [r2, ip]
adds r3, r0, #1
itttt eq
streq r0, [sp, #24]
- ldreq r1, [r10, #1200]
+ ldreq r1, [r10, #1196]
addeq r1, r1, #1
- streq r1, [r10, #1200]
+ streq r1, [r10, #1196]
ldr r2, [r2, ip]
cmp r2, #256
- bne .L3238
+ bne .L3261
ldr r0, [lr, #4]
ubfx r0, r0, #10, #16
bl P2V_block_in_plane
bl FtlGcRefreshBlock
-.L3238:
+.L3261:
add fp, fp, #1
cmp fp, r5
- bne .L3239
+ bne .L3262
movs r5, #0
- b .L3224
-.L3260:
- ldr r3, .L3261+4
- ldrh r3, [r3, #1698]
- cbz r3, .L3241
+ b .L3247
+.L3283:
+ ldr r3, .L3284+4
+ ldrh r3, [r3, #1694]
+ cbz r3, .L3264
ldr r0, [sp]
movs r1, #1
- bl rk_ftl_garbage_collect
-.L3241:
+ bl ftl_do_gc
+.L3264:
ldr r0, [sp, #24]
- b .L3222
-.L3242:
+ b .L3245
+.L3265:
mov r0, #-1
-.L3222:
+.L3245:
add sp, sp, #60
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L3262:
+.L3285:
.align 2
-.L3261:
+.L3284:
.word .LANCHOR0
.word .LANCHOR2
.fnend
+ .size ftl_read, .-ftl_read
+ .align 1
+ .global FtlRead
+ .thumb
+ .thumb_func
+ .type FtlRead, %function
+FtlRead:
+ .fnstart
+ @ args = 0, pretend = 0, frame = 0
+ @ frame_needed = 0, uses_anonymous_args = 0
+ @ link register save eliminated.
+ b ftl_read
+ .fnend
.size FtlRead, .-FtlRead
.align 1
- .global FtlWrite
+ .global ftl_write
.thumb
.thumb_func
- .type FtlWrite, %function
-FtlWrite:
+ .type ftl_write, %function
+ftl_write:
.fnstart
@ args = 0, pretend = 0, frame = 88
@ frame_needed = 0, uses_anonymous_args = 0
@@ -19859,172 +20077,166 @@ FtlWrite:
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.pad #92
sub sp, sp, #92
- ldr r5, .L3334
+ ldr r9, .L3356+12
mov r8, r1
str r3, [sp, #8]
- mov fp, r2
- ldr r3, [r5, #740]
+ str r2, [sp, #4]
+ ldr r3, [r9, #744]
cmp r3, #0
- bne .L3305
+ bne .L3328
cmp r0, #16
- bne .L3265
+ bne .L3289
add r0, r1, #256
mov r1, r2
ldr r2, [sp, #8]
bl FtlVendorPartWrite
- b .L3264
-.L3265:
- ldr r10, .L3334+8
- adds r7, r1, r2
- ldr r3, [r10, #2940]
- cmp r7, r3
- bhi .L3306
- ldrh r4, [r10, #2904]
+ b .L3288
+.L3289:
+ ldr r7, .L3356
+ ldr r3, [sp, #4]
+ adds r6, r1, r3
+ ldr r3, [r7, #1896]
+ cmp r6, r3
+ bhi .L3329
+ ldrh r4, [r7, #2916]
mov r3, #2048
- ldr r6, .L3334+4
+ ldr r5, .L3356+4
mov r0, r1
mov r1, r4
- str r3, [r6, #-44]
+ str r3, [r5, #-40]
bl __aeabi_uidiv
mov r1, r4
- str r0, [sp, #4]
- subs r0, r7, #1
+ mov fp, r0
+ subs r0, r6, #1
bl __aeabi_uidiv
- cmp fp, r4, lsl #1
- add r7, r5, #788
- ldr r2, [sp, #4]
+ rsb r6, fp, r0
str r0, [sp, #20]
- rsb r9, r2, r0
- add r3, r9, #1
+ adds r3, r6, #1
str r3, [sp, #12]
ldr r2, [sp, #12]
- ldr r3, [r5, #960]
+ ldr r3, [r9, #1004]
+ add r3, r3, r2
+ ldr r2, [sp, #4]
+ str r3, [r9, #1004]
+ ldr r3, [r9, #1020]
+ cmp r2, r4, lsl #1
add r3, r3, r2
- ldr r2, [r10, #2952]
- str r3, [r5, #960]
- ldr r3, [r5, #976]
- add r3, r3, fp
- str r3, [r5, #976]
+ str r3, [r9, #1020]
+ mov r3, r2
+ ldr r2, [r7, #2960]
ite cs
movcs r3, #1
movcc r3, #0
str r3, [sp, #28]
- add r3, r5, #836
- cmp fp, #8
- it ls
- movls r7, r3
cmp r2, #0
- beq .L3268
+ beq .L3291
movs r3, #36
- ldr r7, [r10, #2956]
+ ldr r7, [r7, #2964]
muls r3, r2, r3
- ldr r2, [sp, #4]
subs r3, r3, #36
add r7, r7, r3
ldr r3, [r7, #16]
- cmp r2, r3
- bne .L3269
- ldr r3, [r5, #964]
+ cmp fp, r3
+ bne .L3292
+ ldr r3, [r9, #1008]
mov r1, r4
mov r0, r8
adds r3, r3, #1
- str r3, [r5, #964]
- ldr r3, [r6, #-40]
+ str r3, [r9, #1008]
+ ldr r3, [r5, #-36]
adds r3, r3, #1
- str r3, [r6, #-40]
+ str r3, [r5, #-36]
bl __aeabi_uidivmod
+ ldr r3, [sp, #4]
ldr r0, [r7, #8]
subs r4, r4, r1
add r0, r0, r1, lsl #9
- cmp r4, fp
+ cmp r4, r3
ldr r1, [sp, #8]
it cs
- movcs r4, fp
- lsls r5, r4, #9
- mov r2, r5
+ movcs r4, r3
+ lsl r9, r4, #9
+ mov r2, r9
bl ftl_memcpy
- cmp r9, #0
- bne .L3270
- ldr r3, [r6, #-40]
+ cbnz r6, .L3293
+ ldr r3, [r5, #-36]
cmp r3, #2
- ble .L3305
-.L3270:
- ldr r3, [sp, #8]
- rsb fp, r4, fp
- add r8, r8, r4
- str r9, [sp, #12]
- add r3, r3, r5
- str r3, [sp, #8]
+ ble .L3328
+.L3293:
ldr r3, [sp, #4]
- adds r3, r3, #1
+ add r8, r8, r4
+ add fp, fp, #1
+ str r6, [sp, #12]
+ subs r3, r3, r4
str r3, [sp, #4]
-.L3269:
- ldr r3, .L3334+4
- movs r2, #0
- ldr r7, [r3, #-64]
- str r2, [r3, #-40]
-.L3268:
- ldr r0, [sp, #4]
+ ldr r3, [sp, #8]
+ add r3, r3, r9
+ str r3, [sp, #8]
+.L3292:
+ movs r3, #0
+ str r3, [r5, #-36]
+.L3291:
+ mov r0, fp
ldr r1, [sp, #20]
bl FtlCacheMetchLpa
- cbz r0, .L3271
+ cbz r0, .L3294
bl FtlCacheWriteBack
-.L3271:
- ldr r4, .L3334+8
- ldr r3, .L3334+4
- ldr r6, [sp, #4]
+.L3294:
+ ldr r4, .L3356
+ mov r6, fp
+ ldr r7, .L3356+8
mov r10, r4
- str r7, [r3, #-64]
-.L3272:
+ str r7, [r5, #-60]
+.L3295:
ldr r3, [sp, #12]
- ldr r5, .L3334
+ ldr r5, .L3356+12
cmp r3, #0
- beq .L3333
+ beq .L3355
ldrh r3, [r7, #4]
- cbnz r3, .L3273
- add r2, r5, #788
- ldr r9, .L3334+20
+ cbnz r3, .L3296
+ add r2, r5, #836
+ ldr r9, .L3356+24
cmp r7, r2
- bne .L3274
- ldrh r7, [r5, #840]
- cbnz r7, .L3275
- add r0, r5, #836
+ bne .L3297
+ ldrh r7, [r5, #888]
+ cbnz r7, .L3298
+ add r0, r5, #884
bl allocate_new_data_superblock
- str r7, [r9, #3004]
-.L3275:
- ldr r0, .L3334+12
+ str r7, [r9, #3068]
+.L3298:
+ ldr r0, .L3356+8
bl allocate_new_data_superblock
- ldr r3, [r9, #3004]
- cbnz r3, .L3308
-.L3277:
- ldr r7, .L3334+12
- b .L3276
-.L3274:
- str r3, [r9, #3004]
- ldrh r3, [r5, #792]
+ ldr r3, [r9, #3068]
+ cbnz r3, .L3330
+.L3300:
+ ldr r7, .L3356+8
+ b .L3299
+.L3297:
+ str r3, [r9, #3068]
+ ldrh r3, [r5, #840]
cmp r3, #0
- bne .L3277
+ bne .L3300
mov r0, r7
bl allocate_new_data_superblock
- b .L3276
-.L3308:
- ldr r7, .L3334+16
-.L3276:
+ b .L3299
+.L3330:
+ ldr r7, .L3356+16
+.L3299:
ldrh r3, [r7, #4]
- cbnz r3, .L3278
+ cbnz r3, .L3301
mov r0, r7
bl allocate_new_data_superblock
-.L3278:
- ldr r3, .L3334+4
- str r7, [r3, #-64]
-.L3273:
+.L3301:
+ ldr r3, .L3356+4
+ str r7, [r3, #-60]
+.L3296:
ldr r2, [r5, #1760]
- ldr r3, [r4, #2952]
+ ldr r3, [r4, #2960]
ldrh ip, [r7, #4]
subs r3, r2, r3
ldr r2, [sp, #12]
cmp ip, r3
- ldr r9, .L3334
+ ldr r9, .L3356+12
it cs
movcs ip, r3
cmp ip, r2
@@ -20034,27 +20246,28 @@ FtlWrite:
str r3, [sp, #44]
movs r3, #0
str r3, [sp, #24]
-.L3279:
+.L3302:
ldr r3, [sp, #24]
ldr r2, [sp, #44]
cmp r3, r2
- beq .L3280
+ beq .L3303
ldrh r3, [r7, #4]
cmp r3, #0
- beq .L3280
+ beq .L3303
ldr r3, [sp, #28]
- cbz r3, .L3281
+ cbz r3, .L3304
ldr r3, [sp, #20]
cmp r6, r3
- bne .L3281
+ bne .L3304
ldr r3, [sp, #24]
- cbz r3, .L3281
- ldrh r2, [r4, #2904]
- add r3, r8, fp
+ cbz r3, .L3304
+ ldr r3, [sp, #4]
+ ldrh r2, [r4, #2916]
+ add r3, r8, r3
mls r3, r2, r6, r3
cmp r3, r2
- bne .L3280
-.L3281:
+ bne .L3303
+.L3304:
add r1, sp, #48
movs r2, #0
mov r0, r6
@@ -20062,62 +20275,62 @@ FtlWrite:
bl log2phys
mov r0, r7
bl get_new_active_ppa
- ldr r3, [r4, #2952]
- ldr r1, [r4, #2956]
- ldrh r2, [r4, #2910]
+ ldr r3, [r4, #2960]
+ ldr r1, [r4, #2964]
+ ldrh r2, [r4, #2922]
mla r1, r5, r3, r1
mul ip, r3, r2
str r6, [r1, #16]
str r0, [r1, #4]
lsr r0, ip, #2
str r0, [sp, #36]
- ldr r0, [r9, #1804]
+ ldr r0, [r9, #1808]
mov lr, r0
str r0, [sp, #40]
ldr r0, [sp, #36]
add r0, lr, r0, lsl #2
- ldrh lr, [r4, #2908]
+ ldrh lr, [r4, #2920]
str r0, [sp, #16]
str r0, [r1, #12]
mul r3, r3, lr
- ldr r0, [r9, #1784]
+ ldr r0, [r9, #1788]
bic r3, r3, #3
add r3, r3, r0
ldr r0, [sp, #16]
str r3, [r1, #8]
movs r1, #0
bl ftl_memset
- ldr r3, [sp, #4]
- cmp r6, r3
- beq .L3282
+ cmp r6, fp
+ beq .L3305
ldr r3, [sp, #20]
cmp r6, r3
- bne .L3330
- ldrh r3, [r4, #2904]
- add r5, r8, fp
+ bne .L3352
+ ldr r3, [sp, #4]
+ add r5, r8, r3
+ ldrh r3, [r4, #2916]
smulbb r3, r3, r6
subs r5, r5, r3
movs r3, #0
str r3, [sp, #32]
uxth r5, r5
- b .L3285
-.L3282:
- ldrh r5, [r4, #2904]
+ b .L3308
+.L3305:
+ ldrh r5, [r4, #2916]
mov r0, r8
mov r1, r5
bl __aeabi_uidivmod
+ ldr r3, [sp, #4]
subs r5, r5, r1
str r1, [sp, #32]
- cmp r5, fp
+ cmp r5, r3
it cs
- movcs r5, fp
-.L3285:
- ldrh r3, [r4, #2904]
+ movcs r5, r3
+.L3308:
+ ldrh r3, [r4, #2916]
cmp r5, r3
- bne .L3286
- ldr r3, [sp, #4]
+ bne .L3309
+ cmp r6, fp
mov lr, #36
- cmp r6, r3
ittet ne
mulne r1, r6, r5
ldrne r3, [sp, #8]
@@ -20126,37 +20339,28 @@ FtlWrite:
it ne
addne r1, r3, r1, lsl #9
ldr r3, [sp, #28]
- cbz r3, .L3288
- ldr r2, [r10, #2952]
- ldr r5, [r10, #2956]
+ cbz r3, .L3311
+ ldr r2, [r10, #2960]
+ ldr r5, [r10, #2964]
mla r2, lr, r2, r5
str r1, [r2, #8]
- b .L3289
-.L3288:
- ldr r0, [r10, #2956]
- ldr r3, [r10, #2952]
- ldrh r2, [r10, #2908]
+ b .L3312
+.L3311:
+ ldr r0, [r10, #2964]
+ ldr r3, [r10, #2960]
+ ldrh r2, [r10, #2920]
mla r3, lr, r3, r0
ldr r0, [r3, #8]
- b .L3331
-.L3335:
- .align 2
-.L3334:
- .word .LANCHOR2
- .word .LANCHOR4
- .word .LANCHOR0
- .word .LANCHOR2+788
- .word .LANCHOR2+836
- .word .LANCHOR1
-.L3286:
+ b .L3353
+.L3309:
ldr r2, [sp, #48]
movs r3, #36
adds r1, r2, #1
- beq .L3290
- ldr r1, [r4, #2956]
+ beq .L3313
+ ldr r1, [r4, #2964]
add r0, sp, #52
str r2, [sp, #56]
- ldr r2, [r4, #2952]
+ ldr r2, [r4, #2960]
str r6, [sp, #68]
mla r3, r3, r2, r1
movs r1, #1
@@ -20168,98 +20372,107 @@ FtlWrite:
bl FlashReadPages
ldr r3, [sp, #52]
adds r3, r3, #1
- bne .L3291
- ldr r3, [r9, #1200]
+ bne .L3314
+ ldr r3, [r9, #1196]
adds r3, r3, #1
- str r3, [r9, #1200]
- b .L3293
-.L3291:
+ str r3, [r9, #1196]
+ b .L3316
+.L3314:
ldr r3, [sp, #16]
ldr r3, [r3, #8]
cmp r3, r6
- beq .L3293
- ldr r3, [r9, #1200]
+ beq .L3316
+ ldr r3, [r9, #1196]
mov r2, r6
- ldr r0, .L3336
+ ldr r0, .L3356+20
adds r3, r3, #1
- str r3, [r9, #1200]
+ str r3, [r9, #1196]
ldr r3, [sp, #16]
ldr r1, [r3, #8]
bl printk
- b .L3293
-.L3290:
- ldr r1, [r4, #2956]
- ldr r2, [r4, #2952]
+ b .L3316
+.L3357:
+ .align 2
+.L3356:
+ .word .LANCHOR0
+ .word .LANCHOR4
+ .word .LANCHOR2+836
+ .word .LANCHOR2
+ .word .LANCHOR2+884
+ .word .LC144
+ .word .LANCHOR1
+.L3313:
+ ldr r1, [r4, #2964]
+ ldr r2, [r4, #2960]
mla r2, r3, r2, r1
movs r1, #0
ldr r0, [r2, #8]
- ldrh r2, [r4, #2908]
+ ldrh r2, [r4, #2920]
bl ftl_memset
-.L3293:
- ldr r3, [sp, #4]
+.L3316:
+ cmp r6, fp
mov lr, #36
- lsls r2, r5, #9
- cmp r6, r3
- bne .L3294
- ldr r1, [r4, #2952]
- ldr r5, [r4, #2956]
+ lsl r2, r5, #9
+ bne .L3317
+ ldr r1, [r4, #2960]
+ ldr r5, [r4, #2964]
ldr r3, [sp, #32]
mla r1, lr, r1, r5
ldr r0, [r1, #8]
ldr r1, [sp, #8]
add r0, r0, r3, lsl #9
- b .L3331
-.L3294:
- ldr r0, [r4, #2956]
- ldr r3, [r4, #2952]
- ldrh r1, [r4, #2904]
+ b .L3353
+.L3317:
+ ldr r0, [r4, #2964]
+ ldr r3, [r4, #2960]
+ ldrh r1, [r4, #2916]
mla r3, lr, r3, r0
muls r1, r6, r1
ldr r0, [r3, #8]
rsb r1, r8, r1
ldr r3, [sp, #8]
add r1, r3, r1, lsl #9
- b .L3331
-.L3330:
+ b .L3353
+.L3352:
ldr r3, [sp, #28]
- cbz r3, .L3295
- ldr r3, [r4, #2952]
- ldr r2, [r4, #2956]
+ cbz r3, .L3318
+ ldr r3, [r4, #2960]
+ ldr r2, [r4, #2964]
mla r5, r5, r3, r2
- ldrh r3, [r4, #2904]
+ ldrh r3, [r4, #2916]
ldr r2, [sp, #8]
muls r3, r6, r3
rsb r3, r8, r3
add r3, r2, r3, lsl #9
str r3, [r5, #8]
- b .L3289
-.L3295:
- ldr r2, [r4, #2956]
- ldr r3, [r4, #2952]
- ldrh r1, [r4, #2904]
+ b .L3312
+.L3318:
+ ldr r2, [r4, #2964]
+ ldr r3, [r4, #2960]
+ ldrh r1, [r4, #2916]
mla r3, r5, r3, r2
- ldrh r2, [r4, #2908]
+ ldrh r2, [r4, #2920]
muls r1, r6, r1
ldr r0, [r3, #8]
rsb r1, r8, r1
ldr r3, [sp, #8]
add r1, r3, r1, lsl #9
-.L3331:
+.L3353:
bl ftl_memcpy
-.L3289:
+.L3312:
ldr r2, [sp, #40]
movw r3, #61589
ldr r1, [sp, #36]
strh r3, [r2, r1, lsl #2] @ movhi
ldr r2, [sp, #16]
- ldr r3, [r9, #988]
+ ldr r3, [r9, #1032]
str r3, [r2, #4]
adds r3, r3, #1
adds r2, r3, #1
ldr r2, [sp, #16]
it eq
moveq r3, #0
- str r3, [r9, #988]
+ str r3, [r9, #1032]
ldr r3, [sp, #16]
str r6, [r3, #8]
adds r6, r6, #1
@@ -20267,77 +20480,141 @@ FtlWrite:
str r3, [r2, #12]
ldrh r3, [r7]
strh r3, [r2, #2] @ movhi
- ldr r3, [r4, #2952]
+ ldr r3, [r4, #2960]
adds r3, r3, #1
- str r3, [r4, #2952]
+ str r3, [r4, #2960]
ldr r3, [sp, #24]
adds r3, r3, #1
str r3, [sp, #24]
- b .L3279
-.L3280:
+ b .L3302
+.L3303:
ldr r3, [sp, #12]
ldr r2, [sp, #24]
subs r3, r3, r2
str r3, [sp, #12]
- ldr r3, .L3336+4
- ldr r2, [r10, #2952]
+ ldr r3, .L3358
+ ldr r2, [r10, #2960]
ldr r3, [r3, #1760]
cmp r2, r3
- bcs .L3299
+ bcs .L3322
ldr r3, [sp, #28]
- cbnz r3, .L3299
+ cbnz r3, .L3322
ldrh r3, [r7, #4]
- cbz r3, .L3299
-.L3301:
+ cbz r3, .L3322
+.L3324:
movs r3, #0
str r3, [sp, #28]
- b .L3272
-.L3299:
+ b .L3295
+.L3322:
bl FtlCacheWriteBack
movs r3, #0
- str r3, [r10, #2952]
+ str r3, [r10, #2960]
ldr r3, [sp, #12]
- cmp r3, #3
- bls .L3301
- b .L3272
-.L3333:
+ cmp r3, #1
+ bhi .L3295
+ b .L3324
+.L3355:
mov r0, r3
- ldr r2, [sp, #4]
ldr r3, [sp, #20]
- subs r1, r3, r2
- bl rk_ftl_garbage_collect
- ldrh r3, [r5, #784]
+ rsb r1, fp, r3
+ bl ftl_do_gc
+ ldrh r3, [r5, #832]
cmp r3, #31
- bhi .L3305
+ bhi .L3328
movs r4, #16
movs r3, #128
- strh r3, [r5, #1642] @ movhi
- strh r3, [r5, #1640] @ movhi
-.L3304:
+ strh r3, [r5, #1638] @ movhi
+ strh r3, [r5, #1636] @ movhi
+.L3327:
movs r0, #0
movs r1, #1
- bl rk_ftl_garbage_collect
- ldr r3, [r5, #740]
- cbnz r3, .L3305
+ bl ftl_do_gc
+ ldr r3, [r5, #744]
+ cbnz r3, .L3328
subs r4, r4, #1
- bne .L3304
- b .L3305
-.L3306:
+ bne .L3327
+ b .L3328
+.L3329:
mov r0, #-1
- b .L3264
-.L3305:
+ b .L3288
+.L3328:
movs r0, #0
-.L3264:
+.L3288:
add sp, sp, #92
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L3337:
+.L3359:
.align 2
-.L3336:
- .word .LC140
+.L3358:
.word .LANCHOR2
.fnend
- .size FtlWrite, .-FtlWrite
+ .size ftl_write, .-ftl_write
+ .align 1
+ .global ftl_vendor_write
+ .thumb
+ .thumb_func
+ .type ftl_vendor_write, %function
+ftl_vendor_write:
+ .fnstart
+ @ args = 0, pretend = 0, frame = 0
+ @ frame_needed = 0, uses_anonymous_args = 0
+ push {r4, r5, lr}
+ .save {r4, r5, lr}
+ mov r5, r0
+ mov r4, r1
+ mov r3, r2
+ mov r1, r5
+ mov r2, r4
+ movs r0, #16
+ pop {r4, r5, lr}
+ b ftl_write
+ .fnend
+ .size ftl_vendor_write, .-ftl_vendor_write
+ .align 1
+ .global FlashBootVendorWrite
+ .thumb
+ .thumb_func
+ .type FlashBootVendorWrite, %function
+FlashBootVendorWrite:
+ .fnstart
+ @ args = 0, pretend = 0, frame = 0
+ @ frame_needed = 0, uses_anonymous_args = 0
+ push {r4, r5, r6, lr}
+ .save {r4, r5, r6, lr}
+ mov r6, r0
+ mov r5, r1
+ mov r4, r2
+ bl rknand_device_lock
+ mov r2, r4
+ mov r1, r5
+ mov r0, r6
+ bl ftl_vendor_write
+ mov r4, r0
+ bl rknand_device_unlock
+ mov r0, r4
+ pop {r4, r5, r6, pc}
+ .fnend
+ .size FlashBootVendorWrite, .-FlashBootVendorWrite
+ .align 1
+ .global ftl_sys_write
+ .thumb
+ .thumb_func
+ .type ftl_sys_write, %function
+ftl_sys_write:
+ .fnstart
+ @ args = 0, pretend = 0, frame = 0
+ @ frame_needed = 0, uses_anonymous_args = 0
+ push {r4, lr}
+ .save {r4, lr}
+ mov r4, r1
+ mov r3, r2
+ add r1, r0, #256
+ mov r2, r4
+ movs r0, #16
+ pop {r4, lr}
+ b ftl_write
+ .fnend
+ .size ftl_sys_write, .-ftl_sys_write
.align 1
.global StorageSysDataStore
.thumb
@@ -20352,11 +20629,10 @@ StorageSysDataStore:
mov r4, r1
mov r5, r0
bl rknand_device_lock
- mov r3, r4
- add r1, r5, #256
- movs r2, #1
- movs r0, #16
- bl FtlWrite
+ mov r2, r4
+ movs r1, #1
+ mov r0, r5
+ bl ftl_sys_write
mov r4, r0
bl rknand_device_unlock
mov r0, r4
@@ -20364,6 +20640,19 @@ StorageSysDataStore:
.fnend
.size StorageSysDataStore, .-StorageSysDataStore
.align 1
+ .global FtlWrite
+ .thumb
+ .thumb_func
+ .type FtlWrite, %function
+FtlWrite:
+ .fnstart
+ @ args = 0, pretend = 0, frame = 0
+ @ frame_needed = 0, uses_anonymous_args = 0
+ @ link register save eliminated.
+ b ftl_write
+ .fnend
+ .size FtlWrite, .-FtlWrite
+ .align 1
.global FlashReadFacBbtData
.thumb
.thumb_func
@@ -20372,7 +20661,7 @@ FlashReadFacBbtData:
.fnstart
@ args = 0, pretend = 0, frame = 40
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L3353
+ ldr r3, .L3379
push {r4, r5, r6, r7, r8, r9, r10, lr}
.save {r4, r5, r6, r7, r8, r9, r10, lr}
mov r8, r2
@@ -20383,20 +20672,20 @@ FlashReadFacBbtData:
sub sp, sp, #40
mov r5, r0
smulbb r3, r2, r3
- ldr r2, .L3353+4
- ldr r1, [r2, #3984]
+ ldr r2, .L3379+4
+ ldr r1, [r2, #3988]
mov r9, r2
uxth r3, r3
subs r6, r3, #1
str r1, [sp, #12]
mul r10, r3, r7
- ldr r1, [r2, #4016]
+ ldr r1, [r2, #4020]
uxth r6, r6
sub r4, r3, #16
str r1, [sp, #16]
-.L3340:
+.L3366:
cmp r6, r4
- ble .L3352
+ ble .L3378
movs r1, #1
add r3, r6, r10
add r0, sp, #4
@@ -20406,62 +20695,62 @@ FlashReadFacBbtData:
bl FlashReadPages
ldr r3, [sp, #4]
adds r3, r3, #1
- beq .L3341
- ldr r3, [r9, #4016]
+ beq .L3367
+ ldr r3, [r9, #4020]
ldrh r2, [r3]
movw r3, #61664
cmp r2, r3
- bne .L3341
- cbz r5, .L3347
- cbz r7, .L3348
-.L3345:
- ldr r1, [r9, #3984]
+ bne .L3367
+ cbz r5, .L3373
+ cbz r7, .L3374
+.L3371:
+ ldr r1, [r9, #3988]
mov r2, r8
mov r0, r5
bl ftl_memcpy
movs r2, #4
- ldr r0, .L3353+8
+ ldr r0, .L3379+8
mov r1, r5
mov r3, r2
bl rknand_print_hex
movs r0, #0
- b .L3342
-.L3348:
- ldr r6, .L3353+4
+ b .L3368
+.L3374:
+ ldr r6, .L3379+4
mov lr, #1
-.L3343:
- ldr r2, [r9, #4004]
+.L3369:
+ ldr r2, [r9, #4008]
uxth r3, r7
adds r7, r7, #1
cmp r3, r2
- bcs .L3345
- ldr r2, [r6, #3984]
+ bcs .L3371
+ ldr r2, [r6, #3988]
lsrs r1, r3, #5
and r4, r3, #31
lsl r3, lr, r4
ldr r0, [r2, r1, lsl #2]
orrs r3, r3, r0
str r3, [r2, r1, lsl #2]
- b .L3343
-.L3341:
+ b .L3369
+.L3367:
subs r6, r6, #1
uxth r6, r6
- b .L3340
-.L3352:
+ b .L3366
+.L3378:
mov r0, #-1
- b .L3342
-.L3347:
+ b .L3368
+.L3373:
mov r0, r5
-.L3342:
+.L3368:
add sp, sp, #40
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, pc}
-.L3354:
+.L3380:
.align 2
-.L3353:
+.L3379:
.word .LANCHOR0
.word .LANCHOR2
- .word .LC141
+ .word .LC145
.fnend
.size FlashReadFacBbtData, .-FlashReadFacBbtData
.align 1
@@ -20473,36 +20762,36 @@ FlashGetBadBlockList:
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L3365
+ ldr r3, .L3391
push {r4, r5, r6, r7, r8, lr}
.save {r4, r5, r6, r7, r8, lr}
mov r5, r0
ldr r3, [r3, #1788]
- ldr r6, .L3365+4
+ ldr r6, .L3391+4
ldrb r4, [r3, #13] @ zero_extendqisi2
ldrh r3, [r3, #14]
- ldr r0, [r6, #4012]
+ ldr r0, [r6, #4016]
smulbb r4, r4, r3
uxth r4, r4
adds r2, r4, #7
asrs r2, r2, #3
bl FlashReadFacBbtData
adds r0, r0, #1
- bne .L3356
-.L3360:
+ bne .L3382
+.L3386:
movs r3, #0
- b .L3357
-.L3356:
+ b .L3383
+.L3382:
movs r1, #0
lsr lr, r4, #4
mov ip, #1
subs r4, r4, #1
mov r3, r1
-.L3358:
+.L3384:
uxth r2, r1
cmp r2, r4
- bge .L3357
- ldr r7, [r6, #4012]
+ bge .L3383
+ ldr r7, [r6, #4016]
lsrs r0, r2, #5
and r8, r2, #31
adds r1, r1, #1
@@ -20514,16 +20803,16 @@ FlashGetBadBlockList:
addne r0, r3, #1
uxthne r3, r0
cmp r3, lr
- bcc .L3358
- b .L3360
-.L3357:
+ bcc .L3384
+ b .L3386
+.L3383:
movw r2, #65535
movs r0, #0
strh r2, [r5, r3, lsl #1] @ movhi
pop {r4, r5, r6, r7, r8, pc}
-.L3366:
+.L3392:
.align 2
-.L3365:
+.L3391:
.word .LANCHOR0
.word .LANCHOR2
.fnend
@@ -20540,65 +20829,65 @@ FtlMakeBbt:
push {r0, r1, r2, r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.pad #12
- ldr r4, .L3389
- ldr r5, [r4, #740]
+ ldr r4, .L3415
+ ldr r5, [r4, #744]
cmp r5, #0
- bne .L3368
+ bne .L3394
bl FtlBbtMemInit
- ldr r7, .L3389+4
+ ldr r7, .L3415+4
bl FtlLoadFactoryBbt
mov fp, r4
sub r9, r7, #18
- subw r8, r7, #2996
-.L3369:
- ldrh r3, [r8, #2850]
- ldr r6, .L3389+8
+ subw r8, r7, #3000
+.L3395:
+ ldrh r3, [r8, #2862]
+ ldr r6, .L3415+8
cmp r5, r3
- bcs .L3387
+ bcs .L3413
ldrh r3, [r9, #2]!
movw r2, #65535
- ldr r0, [r4, #756]
- ldr r10, [r4, #1796]
+ ldr r0, [r4, #1776]
+ ldr r10, [r4, #1800]
cmp r3, r2
- str r0, [r4, #4056]
- str r10, [r4, #4060]
- beq .L3370
- ldrh ip, [r8, #2894]
+ str r0, [r4, #4060]
+ str r10, [r4, #4064]
+ beq .L3396
+ ldrh ip, [r8, #2906]
movs r1, #1
- ldr r0, .L3389+12
+ ldr r0, .L3415+12
mov r2, r1
mla ip, ip, r5, r3
lsl r3, ip, #10
str ip, [sp, #4]
- str r3, [fp, #4052]
+ str r3, [fp, #4056]
bl FlashReadPages
- ldrh r2, [r8, #2894]
+ ldrh r2, [r8, #2906]
ldr r0, [r7]
adds r2, r2, #7
- ldr r1, [fp, #4056]
+ ldr r1, [fp, #4060]
asrs r2, r2, #3
bl ftl_memcpy
ldr ip, [sp, #4]
- b .L3371
-.L3370:
+ b .L3397
+.L3396:
mov r1, r5
bl FlashGetBadBlockList
- ldr r0, [fp, #4056]
+ ldr r0, [fp, #4060]
ldr r1, [r7]
bl FtlBbt2Bitmap
- ldrh r6, [r8, #2894]
-.L3373:
+ ldrh r6, [r8, #2906]
+.L3399:
subs r6, r6, #1
uxth r6, r6
-.L3372:
- ldr r3, .L3389+8
- ldrh r0, [r3, #2894]
+.L3398:
+ ldr r3, .L3415+8
+ ldrh r0, [r3, #2906]
smlabb r0, r0, r5, r6
uxth r0, r0
bl FtlBbmIsBadBlock
cmp r0, #1
- beq .L3373
- ldr r0, [r4, #1796]
+ beq .L3399
+ ldr r0, [r4, #1800]
movs r1, #16
strh r6, [r9] @ movhi
bl __memzero
@@ -20607,125 +20896,125 @@ FtlMakeBbt:
movs r3, #0
str r3, [r10, #4]
ldrh r3, [r9]
- ldrh ip, [r8, #2894]
- ldrh r2, [r4, #1860]
+ ldrh ip, [r8, #2906]
+ ldrh r2, [r4, #1864]
strh r3, [r10, #2] @ movhi
ldrh r3, [r9]
ldr r1, [r7]
lsls r2, r2, #2
- ldr r0, [r4, #4056]
+ ldr r0, [r4, #4060]
mla ip, ip, r5, r3
lsl r3, ip, #10
- str r3, [r4, #4052]
str ip, [sp, #4]
+ str r3, [r4, #4056]
bl ftl_memcpy
movs r1, #1
- ldr r0, .L3389+12
+ ldr r0, .L3415+12
mov r2, r1
bl FlashEraseBlocks
movs r1, #1
- ldr r0, .L3389+12
+ ldr r0, .L3415+12
mov r3, r1
mov r2, r1
bl FlashProgPages
- ldr r3, [r4, #4048]
- adds r3, r3, #1
+ ldr r3, [r4, #4052]
ldr ip, [sp, #4]
- bne .L3371
+ adds r3, r3, #1
+ bne .L3397
uxth r0, ip
bl FtlBbmMapBadBlock
- b .L3372
-.L3371:
+ b .L3398
+.L3397:
uxth r0, ip
adds r5, r5, #1
bl FtlBbmMapBadBlock
adds r7, r7, #4
- b .L3369
-.L3387:
+ b .L3395
+.L3413:
movs r5, #0
-.L3376:
- ldrh r3, [r6, #2912]
+.L3402:
+ ldrh r3, [r6, #2924]
uxth r0, r5
- ldr r7, .L3389+8
+ ldr r7, .L3415+8
adds r5, r5, #1
cmp r3, r0
- bls .L3388
+ bls .L3414
bl FtlBbmMapBadBlock
- b .L3376
-.L3388:
- ldrh r5, [r7, #2980]
+ b .L3402
+.L3414:
+ ldrh r5, [r7, #2984]
movw r8, #65535
subs r5, r5, #1
uxth r5, r5
-.L3378:
- ldrh r3, [r6, #2980]
+.L3404:
+ ldrh r3, [r6, #2984]
subs r3, r3, #48
cmp r5, r3
- ble .L3382
+ ble .L3408
mov r0, r5
bl FtlBbmIsBadBlock
cmp r0, #1
- beq .L3379
+ beq .L3405
mov r0, r5
bl FlashTestBlk
- cbz r0, .L3380
+ cbz r0, .L3406
mov r0, r5
bl FtlBbmMapBadBlock
- b .L3379
-.L3380:
- ldrh r3, [r7, #2968]
+ b .L3405
+.L3406:
+ ldrh r3, [r7, #2972]
cmp r3, r8
- bne .L3381
- strh r5, [r7, #2968] @ movhi
- b .L3379
-.L3381:
- ldr r3, .L3389+8
- strh r5, [r3, #2972] @ movhi
- b .L3382
-.L3379:
+ bne .L3407
+ strh r5, [r7, #2972] @ movhi
+ b .L3405
+.L3407:
+ ldr r3, .L3415+8
+ strh r5, [r3, #2976] @ movhi
+ b .L3408
+.L3405:
subs r5, r5, #1
uxth r5, r5
- b .L3378
-.L3382:
- ldr r0, [r4, #744]
+ b .L3404
+.L3408:
+ ldr r0, [r4, #748]
movs r5, #0
- ldrh r3, [r6, #2968]
+ ldrh r3, [r6, #2972]
movs r2, #2
- str r5, [r6, #2976]
+ str r5, [r6, #2980]
movs r1, #1
- strh r5, [r6, #2970] @ movhi
+ strh r5, [r6, #2974] @ movhi
lsls r3, r3, #10
str r3, [r0, #4]
- ldrh r3, [r6, #2972]
+ ldrh r3, [r6, #2976]
lsls r3, r3, #10
str r3, [r0, #40]
bl FlashEraseBlocks
- ldrh r0, [r6, #2968]
- bl FtlBbmMapBadBlock
ldrh r0, [r6, #2972]
bl FtlBbmMapBadBlock
+ ldrh r0, [r6, #2976]
+ bl FtlBbmMapBadBlock
bl FtlBbmTblFlush
- ldr r3, [r6, #2976]
- ldrh r2, [r6, #2972]
+ ldr r3, [r6, #2980]
+ ldrh r2, [r6, #2976]
adds r3, r3, #1
- str r3, [r6, #2976]
- ldrh r3, [r6, #2968]
- strh r5, [r6, #2970] @ movhi
- strh r2, [r6, #2968] @ movhi
- strh r3, [r6, #2972] @ movhi
+ str r3, [r6, #2980]
+ ldrh r3, [r6, #2972]
+ strh r5, [r6, #2974] @ movhi
+ strh r2, [r6, #2972] @ movhi
+ strh r3, [r6, #2976] @ movhi
bl FtlBbmTblFlush
-.L3368:
+.L3394:
movs r0, #0
add sp, sp, #12
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L3390:
+.L3416:
.align 2
-.L3389:
+.L3415:
.word .LANCHOR2
- .word .LANCHOR0+2996
+ .word .LANCHOR0+3000
.word .LANCHOR0
- .word .LANCHOR2+4048
+ .word .LANCHOR2+4052
.fnend
.size FtlMakeBbt, .-FtlMakeBbt
.align 1
@@ -20739,43 +21028,53 @@ FtlLowFormat:
@ frame_needed = 0, uses_anonymous_args = 0
push {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r3, r4, r5, r6, r7, r8, r9, r10, fp, lr}
- ldr r4, .L3425
- ldr r3, [r4, #740]
- cmp r3, #0
- bne .L3393
- ldr r5, .L3425+4
- str r3, [r4, #984]
- str r3, [r4, #988]
- ldrh r0, [r5, #2832]
+ ldr r4, .L3451
+ ldr r6, [r4, #744]
+ cmp r6, #0
+ bne .L3419
+ ldr r5, .L3451+4
+ mov r1, r6
+ ldr r0, [r4, #1852]
+ ldrh r2, [r5, #2948]
+ lsls r2, r2, #2
+ bl ftl_memset
+ ldrh r2, [r5, #2948]
+ mov r1, r6
+ ldr r0, [r4, #1848]
+ lsls r2, r2, #2
+ bl ftl_memset
+ ldrh r0, [r5, #2844]
+ str r6, [r4, #1028]
+ str r6, [r4, #1032]
bl FtlFreeSysBlkQueueInit
bl FtlLoadBbt
- cbz r0, .L3394
+ cbz r0, .L3420
bl FtlMakeBbt
-.L3394:
- ldr r0, .L3425+8
+.L3420:
+ ldr r0, .L3451+8
movs r2, #0
-.L3395:
- ldrh r1, [r5, #2904]
+.L3421:
+ ldrh r1, [r5, #2916]
uxth r3, r2
adds r2, r2, #1
cmp r3, r1, lsl #7
- bge .L3422
- ldr r6, [r4, #1788]
+ bge .L3448
+ ldr r6, [r4, #1792]
mvns r1, r3
orr r1, r3, r1, lsl #16
str r1, [r6, r3, lsl #2]
- ldr r1, [r4, #1792]
+ ldr r1, [r4, #1796]
str r0, [r1, r3, lsl #2]
- b .L3395
-.L3422:
- ldr r3, .L3425+4
+ b .L3421
+.L3448:
+ ldr r3, .L3451+4
movs r6, #0
- ldrh r7, [r3, #2836]
-.L3397:
- ldrh r3, [r5, #2838]
- ldr r8, .L3425+4
+ ldrh r7, [r3, #2848]
+.L3423:
+ ldrh r3, [r5, #2850]
+ ldr r8, .L3451+4
cmp r3, r7
- bls .L3423
+ bls .L3449
mov r0, r7
movs r1, #1
bl FtlLowFormatEraseBlock
@@ -20783,223 +21082,222 @@ FtlLowFormat:
uxth r7, r7
add r0, r0, r6
uxth r6, r0
- b .L3397
-.L3423:
- ldrh r1, [r8, #2828]
+ b .L3423
+.L3449:
+ ldrh r1, [r8, #2840]
subs r3, r6, #3
cmp r3, r1, lsl #1
- bge .L3399
-.L3403:
+ bge .L3425
+.L3429:
movs r6, #0
mov r7, r6
- b .L3400
-.L3399:
+ b .L3426
+.L3425:
mov r0, r6
bl __aeabi_uidiv
- ldr r3, [r8, #2932]
+ ldr r3, [r8, #2944]
add r0, r0, r3
uxth r0, r0
bl FtlSysBlkNumInit
- ldrh r0, [r8, #2832]
+ ldrh r0, [r8, #2844]
bl FtlFreeSysBlkQueueInit
- ldrh r6, [r8, #2836]
-.L3401:
- ldrh r3, [r5, #2838]
+ ldrh r6, [r8, #2848]
+.L3427:
+ ldrh r3, [r5, #2850]
cmp r3, r6
- bls .L3403
+ bls .L3429
mov r0, r6
adds r6, r6, #1
movs r1, #1
bl FtlLowFormatEraseBlock
uxth r6, r6
- b .L3401
-.L3400:
- ldrh r3, [r5, #2836]
+ b .L3427
+.L3426:
+ ldrh r3, [r5, #2848]
uxth r0, r6
- ldr r10, .L3425+4
+ ldr r10, .L3451+4
adds r6, r6, #1
cmp r3, r0
- bls .L3424
+ bls .L3450
movs r1, #0
bl FtlLowFormatEraseBlock
add r0, r0, r7
uxth r7, r0
- b .L3400
-.L3424:
- ldrh r3, [r10, #2838]
- ldrh r6, [r10, #2828]
- ldr fp, [r10, #2840]
- str r3, [r10, #2964]
+ b .L3426
+.L3450:
+ ldrh r3, [r10, #2850]
+ ldrh r6, [r10, #2840]
+ ldr fp, [r10, #2852]
+ str r3, [r4, #1752]
mov r1, r6
mov r0, fp
bl __aeabi_uidiv
ubfx r8, r0, #5, #16
mov r9, r0
add r3, r8, #36
- strh r3, [r4, #1060] @ movhi
+ strh r3, [r4, #1056] @ movhi
movs r3, #24
- str r0, [r10, #2960]
+ str r0, [r10, #2968]
muls r3, r6, r3
cmp r7, r3
- ble .L3405
+ ble .L3431
rsb r0, r7, fp
mov r1, r6
bl __aeabi_uidiv
- ldr r3, .L3425
- str r0, [r10, #2960]
+ ldr r3, .L3451
+ str r0, [r10, #2968]
lsrs r0, r0, #5
adds r0, r0, #24
- strh r0, [r3, #1060] @ movhi
-.L3405:
- ldr r3, [r4, #948]
- ldr fp, .L3425
+ strh r0, [r3, #1056] @ movhi
+.L3431:
+ ldr r3, [r5, #2832]
cmp r3, #1
- bne .L3406
+ bne .L3432
mov r0, r7
mov r1, r6
bl __aeabi_uidiv
- ldrh r10, [fp, #1060]
+ ldrh r10, [r4, #1056]
uxtah r0, r10, r0
add r10, r10, r0, asr #2
- strh r10, [fp, #1060] @ movhi
-.L3406:
+ strh r10, [r4, #1056] @ movhi
+.L3432:
ldrb r3, [r5, #76] @ zero_extendqisi2
- cbz r3, .L3407
+ cbz r3, .L3433
mov r0, r7
mov r1, r6
bl __aeabi_uidiv
- ldrh r10, [r4, #1060]
+ ldrh r10, [r4, #1056]
uxtah r0, r10, r0
add r10, r10, r0, asr #2
- strh r10, [r4, #1060] @ movhi
-.L3407:
- ldrh r3, [r5, #2890]
- cbz r3, .L3409
- ldrh r2, [r4, #1060]
+ strh r10, [r4, #1056] @ movhi
+.L3433:
+ ldrh r3, [r5, #2902]
+ cbz r3, .L3435
+ ldrh r2, [r4, #1056]
add r2, r2, r3, lsr #1
- strh r2, [r4, #1060] @ movhi
+ strh r2, [r4, #1056] @ movhi
mul r2, r6, r3
cmp r2, r7
itttt gt
addgt r3, r3, #32
- ldrgt r2, .L3425+4
+ ldrgt r2, .L3451+4
addgt r3, r3, r8
- strgt r9, [r2, #2960]
+ strgt r9, [r2, #2968]
itt gt
- ldrgt r2, .L3425
- strhgt r3, [r2, #1060] @ movhi
-.L3409:
- ldrh r2, [r4, #1060]
- ldr r3, [r5, #2960]
- ldr r7, .L3425
+ ldrgt r2, .L3451
+ strhgt r3, [r2, #1056] @ movhi
+.L3435:
+ ldrh r2, [r4, #1056]
+ ldr r3, [r5, #2968]
+ ldr r7, .L3451
subs r3, r3, r2
muls r6, r3, r6
- ldrh r3, [r5, #2898]
- str r6, [r4, #4084]
+ ldrh r3, [r5, #2910]
+ str r6, [r4, #4088]
muls r6, r3, r6
- ldrh r3, [r5, #2904]
- str r6, [r5, #2960]
+ ldrh r3, [r5, #2916]
+ str r6, [r5, #2968]
muls r6, r3, r6
- str r6, [r5, #2940]
+ str r6, [r5, #1896]
bl FtlBbmTblFlush
- ldrh r2, [r5, #2838]
+ ldrh r2, [r5, #2850]
movs r1, #0
- ldr r0, [r4, #768]
+ ldr r0, [r4, #816]
movw r6, #65535
lsls r2, r2, #1
bl ftl_memset
- ldrh r2, [r5, #2836]
- ldr r0, [r4, #944]
+ ldrh r2, [r5, #2848]
+ ldr r0, [r4, #992]
movs r1, #255
movs r3, #0
- strh r6, [r4, #1076] @ movhi
+ strh r6, [r4, #1072] @ movhi
lsrs r2, r2, #3
- str r3, [r4, #940]
- strh r3, [r4, #1078] @ movhi
- strb r3, [r4, #1082]
- strb r3, [r4, #1084]
- strh r3, [r4, #790] @ movhi
- strb r3, [r4, #794]
- strh r3, [r4, #788] @ movhi
+ str r3, [r4, #988]
+ strh r3, [r4, #1074] @ movhi
+ strb r3, [r4, #1078]
+ strb r3, [r4, #1080]
+ strh r3, [r4, #838] @ movhi
+ strb r3, [r4, #842]
+ strh r3, [r4, #836] @ movhi
movs r3, #1
- strb r3, [r4, #796]
+ strb r3, [r4, #844]
bl ftl_memset
-.L3411:
- ldr r5, .L3425
- add r0, r5, #788
+.L3437:
+ ldr r5, .L3451
+ add r0, r5, #836
bl make_superblock
- ldrb r3, [r4, #795] @ zero_extendqisi2
- ldrh r2, [r4, #788]
- cbnz r3, .L3412
- ldr r3, [r7, #768]
+ ldrb r3, [r4, #843] @ zero_extendqisi2
+ ldrh r2, [r4, #836]
+ cbnz r3, .L3438
+ ldr r3, [r7, #816]
strh r6, [r3, r2, lsl #1] @ movhi
- ldrh r3, [r7, #788]
+ ldrh r3, [r7, #836]
adds r3, r3, #1
- strh r3, [r7, #788] @ movhi
- b .L3411
-.L3412:
- ldr r3, [r5, #984]
+ strh r3, [r7, #836] @ movhi
+ b .L3437
+.L3438:
+ ldr r3, [r5, #1028]
movw r7, #65535
- ldrh r1, [r5, #792]
- str r3, [r5, #800]
+ ldrh r1, [r5, #840]
+ str r3, [r5, #848]
adds r3, r3, #1
- str r3, [r5, #984]
- ldr r3, [r5, #768]
+ str r3, [r5, #1028]
+ ldr r3, [r5, #816]
strh r1, [r3, r2, lsl #1] @ movhi
movs r3, #0
- strh r3, [r5, #838] @ movhi
- strb r3, [r5, #842]
- ldrh r3, [r5, #788]
+ strh r3, [r5, #886] @ movhi
+ strb r3, [r5, #890]
+ ldrh r3, [r5, #836]
adds r3, r3, #1
- strh r3, [r5, #836] @ movhi
+ strh r3, [r5, #884] @ movhi
movs r3, #1
- strb r3, [r5, #844]
-.L3413:
- ldr r6, .L3425
- add r0, r6, #836
+ strb r3, [r5, #892]
+.L3439:
+ ldr r6, .L3451
+ add r0, r6, #884
bl make_superblock
- ldrb r3, [r4, #843] @ zero_extendqisi2
- ldrh r2, [r4, #836]
- cbnz r3, .L3414
- ldr r3, [r5, #768]
+ ldrb r3, [r4, #891] @ zero_extendqisi2
+ ldrh r2, [r4, #884]
+ cbnz r3, .L3440
+ ldr r3, [r5, #816]
strh r7, [r3, r2, lsl #1] @ movhi
- ldrh r3, [r5, #836]
+ ldrh r3, [r5, #884]
adds r3, r3, #1
- strh r3, [r5, #836] @ movhi
- b .L3413
-.L3414:
- ldr r3, [r6, #984]
+ strh r3, [r5, #884] @ movhi
+ b .L3439
+.L3440:
+ ldr r3, [r6, #1028]
movw r4, #65535
- ldrh r1, [r6, #840]
- str r3, [r6, #848]
+ ldrh r1, [r6, #888]
+ str r3, [r6, #896]
adds r3, r3, #1
- str r3, [r6, #984]
- ldr r3, [r6, #768]
+ str r3, [r6, #1028]
+ ldr r3, [r6, #816]
strh r1, [r3, r2, lsl #1] @ movhi
- strh r4, [r6, #884] @ movhi
+ strh r4, [r6, #932] @ movhi
bl FtlFreeSysBlkQueueOut
movs r3, #0
+ strh r3, [r6, #1062] @ movhi
+ ldr r3, [r6, #4088]
+ strh r4, [r6, #1064] @ movhi
strh r3, [r6, #1066] @ movhi
- ldr r3, [r6, #4084]
- strh r4, [r6, #1068] @ movhi
- strh r3, [r6, #1070] @ movhi
- ldr r3, [r6, #984]
- str r3, [r6, #1072]
+ ldr r3, [r6, #1028]
+ str r3, [r6, #1068]
adds r3, r3, #1
- str r3, [r6, #984]
- strh r0, [r6, #1064] @ movhi
+ str r3, [r6, #1028]
+ strh r0, [r6, #1060] @ movhi
bl FtlVpcTblFlush
bl FtlSysBlkInit
- cbnz r0, .L3393
- ldr r3, .L3425+12
+ cbnz r0, .L3419
+ ldr r3, .L3451+12
movs r2, #1
str r2, [r3, #504]
-.L3393:
+.L3419:
movs r0, #0
pop {r3, r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L3426:
+.L3452:
.align 2
-.L3425:
+.L3451:
.word .LANCHOR2
.word .LANCHOR0
.word 168778952
@@ -21018,34 +21316,34 @@ FtlReInitForSDUpdata:
push {r0, r1, r2, r3, r4, r5, r6, lr}
.save {r4, r5, r6, lr}
.pad #16
- ldr r4, .L3456
+ ldr r4, .L3481
ldrb r3, [r4, #76] @ zero_extendqisi2
- cbz r3, .L3428
-.L3430:
+ cbz r3, .L3454
+.L3456:
movs r0, #0
- b .L3429
-.L3428:
- ldr r5, .L3456+4
- ldr r0, [r5, #3980]
+ b .L3455
+.L3454:
+ ldr r5, .L3481+4
+ ldr r0, [r5, #3984]
bl FlashInit
cmp r0, #0
- bne .L3430
+ bne .L3456
bl FlashLoadFactorBbt
- cbz r0, .L3431
+ cbz r0, .L3457
bl FlashMakeFactorBbt
-.L3431:
- ldr r0, [r5, #4012]
+.L3457:
+ ldr r0, [r5, #4016]
bl FlashReadIdbDataRaw
- cbz r0, .L3432
+ cbz r0, .L3458
movs r1, #0
movs r2, #16
mov r0, sp
movs r6, #1
bl FlashReadFacBbtData
movs r3, #0
- mov r2, r3
ldr r1, [sp]
-.L3433:
+ mov r2, r3
+.L3459:
lsl r5, r6, r2
adds r0, r3, #1
tst r5, r1
@@ -21053,12 +21351,12 @@ FtlReInitForSDUpdata:
it ne
movne r3, r0
cmp r2, #16
- bne .L3433
+ bne .L3459
cmp r3, #6
- bls .L3452
+ bls .L3477
movs r2, #0
movs r6, #1
-.L3436:
+.L3462:
lsl r5, r6, r2
adds r0, r3, #1
tst r5, r1
@@ -21066,58 +21364,58 @@ FtlReInitForSDUpdata:
it ne
movne r3, r0
cmp r2, #24
- bne .L3436
+ bne .L3462
cmp r3, #17
- bhi .L3437
-.L3452:
+ bhi .L3463
+.L3477:
strb r2, [r4, #1]
- b .L3435
-.L3437:
+ b .L3461
+.L3463:
movs r3, #36
strb r3, [r4, #1]
-.L3435:
+.L3461:
ldrb r3, [r4, #1] @ zero_extendqisi2
strh r3, [r4, #1890] @ movhi
-.L3432:
- ldr r1, .L3456+8
- ldr r0, .L3456+12
+.L3458:
+ ldr r1, .L3481+8
+ ldr r0, .L3481+12
bl printk
- ldr r0, .L3456+16
+ ldr r0, .L3481+16
bl FtlConstantsInit
bl FtlVariablesInit
- ldrh r0, [r4, #2832]
+ ldrh r0, [r4, #2844]
bl FtlFreeSysBlkQueueInit
movs r4, #1
-.L3438:
+.L3464:
bl FtlLoadBbt
- cbz r0, .L3439
-.L3454:
+ cbz r0, .L3465
+.L3479:
bl FtlLowFormat
cmp r4, #3
- bhi .L3455
+ bhi .L3480
adds r4, r4, #1
- b .L3438
-.L3455:
+ b .L3464
+.L3480:
mov r0, #-1
- b .L3429
-.L3439:
+ b .L3455
+.L3465:
bl FtlSysBlkInit
cmp r0, #0
- bne .L3454
- ldr r3, .L3456+20
+ bne .L3479
+ ldr r3, .L3481+20
movs r2, #1
str r2, [r3, #504]
-.L3429:
+.L3455:
add sp, sp, #16
@ sp needed
pop {r4, r5, r6, pc}
-.L3457:
+.L3482:
.align 2
-.L3456:
+.L3481:
.word .LANCHOR0
.word .LANCHOR2
- .word .LC75
- .word .LC74
+ .word .LC78
+ .word .LC77
.word .LANCHOR0+1864
.word .LANCHOR1
.fnend
@@ -21132,17 +21430,17 @@ flash_boot_enter_slc_mode:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L3460
- ldr r2, [r3, #2772]
- ldr r3, .L3460+4
+ ldr r3, .L3485
+ ldr r2, [r3, #2768]
+ ldr r3, .L3485+4
cmp r2, r3
- bne .L3458
+ bne .L3483
b flash_enter_slc_mode
-.L3458:
+.L3483:
bx lr
-.L3461:
+.L3486:
.align 2
-.L3460:
+.L3485:
.word .LANCHOR0
.word 1446522928
.fnend
@@ -21157,438 +21455,493 @@ flash_boot_exit_slc_mode:
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
@ link register save eliminated.
- ldr r3, .L3464
- ldr r2, [r3, #2772]
- ldr r3, .L3464+4
+ ldr r3, .L3489
+ ldr r2, [r3, #2768]
+ ldr r3, .L3489+4
cmp r2, r3
- bne .L3462
+ bne .L3487
b flash_exit_slc_mode
-.L3462:
+.L3487:
bx lr
-.L3465:
+.L3490:
.align 2
-.L3464:
+.L3489:
.word .LANCHOR0
.word 1446522928
.fnend
.size flash_boot_exit_slc_mode, .-flash_boot_exit_slc_mode
.align 1
- .global IdBlockReadData
.thumb
.thumb_func
.type IdBlockReadData, %function
IdBlockReadData:
.fnstart
- @ args = 0, pretend = 0, frame = 32
+ @ args = 0, pretend = 0, frame = 16
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
- .pad #36
- sub sp, sp, #36
- ldr r4, .L3474
mov r6, r0
- str r2, [sp, #12]
- mov r7, r1
- ldr r0, .L3474+4
+ ldr r4, .L3499
+ mov r8, r1
+ .pad #20
+ sub sp, sp, #20
mov r1, r6
- ldr r2, [r4, #1788]
- mov fp, r4
- ldr r3, [r4, #4]
- ldrb r5, [r2, #9] @ zero_extendqisi2
- mov r2, r7
- smulbb r5, r5, r3
- bl printk
+ mov fp, r2
+ ldr r0, .L3499+4
ldr r3, [r4, #1788]
+ mov r2, r8
+ movs r7, #0
+ ldrb r9, [r3, #9] @ zero_extendqisi2
+ ldrh r5, [r3, #10]
+ bl printk
mov r0, r6
- ldrb r10, [r3, #9] @ zero_extendqisi2
+ smulbb r5, r5, r9
uxth r5, r5
mov r1, r5
- movs r5, #0
bl __aeabi_uidivmod
- mul ip, r10, r1
- mov r8, r1
+ mul ip, r9, r1
+ mov r10, r1
subs r3, r6, r1
- str r3, [sp, #4]
+ str r3, [sp]
ubfx ip, ip, #2, #2
-.L3467:
- cmp r5, r7
- bcs .L3473
- add r9, r5, r8
- rsb r3, ip, #4
- ubfx r9, r9, #2, #16
- ldrb r2, [r4, #76] @ zero_extendqisi2
- uxth r3, r3
- str r3, [sp, #8]
- add r3, r4, r9, lsl #1
+.L3492:
+ cmp r7, r8
+ bcs .L3498
+ add r2, r7, r10
+ ldrb r1, [r4, #76] @ zero_extendqisi2
+ ubfx r2, r2, #2, #16
+ rsb r5, ip, #4
+ add r3, r4, r2, lsl #1
+ uxth r5, r5
ldrh r3, [r3, #80]
- cbz r2, .L3468
- ldr r2, [r4, #2772]
- ldr r1, .L3474+8
- cmp r2, r1
+ cbz r1, .L3493
+ ldr r1, .L3499
+ ldr r0, .L3499+8
+ ldr r1, [r1, #2768]
+ cmp r1, r0
it eq
- moveq r3, r9
-.L3468:
- ldr r2, [sp, #4]
- ldr r9, .L3474+16
+ moveq r3, r2
+.L3493:
+ ldr r2, [sp]
+ add r7, r7, r5
add r2, ip, r2
- ldr r1, [fp, #1788]
- ldrb ip, [fp, #1892] @ zero_extendqisi2
- mla r3, r10, r3, r2
- ldrb r1, [r1, #9] @ zero_extendqisi2
- ldr r2, [r9, #4012]
- ldrb r0, [r9, #4010] @ zero_extendqisi2
- str ip, [sp, #16]
- str r2, [sp, #24]
- str r3, [sp, #28]
- str r1, [sp, #20]
+ ldrb ip, [r4, #1892] @ zero_extendqisi2
+ uxth r7, r7
+ mla r3, r9, r3, r2
+ ldr r2, [r4, #1788]
+ str ip, [sp, #4]
+ ldrb r1, [r2, #9] @ zero_extendqisi2
+ str r3, [sp, #12]
+ ldr r3, .L3499+12
+ str r1, [sp, #8]
+ ldrb r0, [r3, #4014] @ zero_extendqisi2
bl FlashBchSel
movs r0, #0
bl flash_boot_enter_slc_mode
- ldr r3, [sp, #28]
- ldr r1, [sp, #20]
+ ldr r3, [sp, #12]
+ ldr r1, [sp, #8]
mov r0, r3
bl __aeabi_uidiv
+ mov r2, fp
+ add fp, fp, r5, lsl #9
mov r1, r0
movs r0, #0
- ldr r2, [sp, #24]
mov r3, r0
bl FlashReadPage
movs r0, #0
bl flash_boot_exit_slc_mode
- ldr ip, [sp, #16]
+ ldr ip, [sp, #4]
mov r0, ip
bl FlashBchSel
- ldr r1, [r9, #4012]
- mov r2, #2048
- ldr r3, [sp, #12]
- add r0, r3, r5, lsl #9
- bl ftl_memcpy
mov ip, #0
- ldr r3, [sp, #8]
- add r3, r3, r5
- uxth r5, r3
- b .L3467
-.L3473:
+ b .L3492
+.L3498:
mov r1, r6
- mov r2, r7
+ mov r2, r8
movs r3, #0
- ldr r0, .L3474+12
+ ldr r0, .L3499+16
bl printk
movs r0, #0
- add sp, sp, #36
+ add sp, sp, #20
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L3475:
+.L3500:
.align 2
-.L3474:
+.L3499:
.word .LANCHOR0
- .word .LC142
+ .word .LC146
.word 1446522928
- .word .LC143
.word .LANCHOR2
+ .word .LC147
.fnend
.size IdBlockReadData, .-IdBlockReadData
.align 1
- .global IDBlockWriteData
+ .global write_idblock
.thumb
.thumb_func
- .type IDBlockWriteData, %function
-IDBlockWriteData:
+ .type write_idblock, %function
+write_idblock:
.fnstart
- @ args = 0, pretend = 0, frame = 88
+ @ args = 0, pretend = 0, frame = 112
@ frame_needed = 0, uses_anonymous_args = 0
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
- .pad #92
- sub sp, sp, #92
- ldr r4, .L3492
- mov r7, r0
- str r2, [sp, #8]
- mov r8, r1
- ldr r0, .L3492+4
- mov r1, r7
- ldr r2, [r4, #1788]
- mov fp, r4
- ldr r3, [r4, #4]
- ldrb r5, [r2, #9] @ zero_extendqisi2
- mov r2, r8
- smulbb r5, r5, r3
+ mov r5, r2
+ ldr r7, .L3542
+ .pad #124
+ sub sp, sp, #124
+ mov r4, r0
+ mov r0, #256000
+ mov r6, r1
+ ldr r2, [r7, #1788]
+ ldrb r10, [r2, #9] @ zero_extendqisi2
+ ldrh r8, [r2, #10]
+ bl ftl_malloc
+ mov r9, r0
+ cmp r0, #0
+ beq .L3524
+ addw r4, r4, #511
+ lsrs r4, r4, #9
+ cmp r4, #8
+ bls .L3523
+ cmp r4, #500
+ bhi .L3524
+ b .L3503
+.L3523:
+ movs r4, #8
+.L3503:
+ smulbb r3, r10, r8
+ mov r0, r4
+ uxth r3, r3
+ str r3, [sp, #8]
+ mov r1, r3
+ bl __aeabi_uidiv
+ movs r3, #0
+ movw r2, #63999
+ str r0, [sp, #28]
+ add r0, r6, #254976
+ add r0, r0, #1020
+.L3507:
+ ldr r1, [r0]
+ cbnz r1, .L3504
+ ldr r1, [r6, r3, lsl #2]
+ adds r3, r3, #1
+ cmp r3, #4096
+ add r2, r2, #-1
+ it hi
+ movhi r3, #0
+ cmp r2, #4096
+ str r1, [r0], #-4
+ bne .L3507
+ b .L3506
+.L3504:
+ ldr r0, .L3542+4
+ bl printk
+.L3506:
+ mov r1, r5
+ movs r3, #5
+ ldr r0, .L3542+8
+ movs r2, #4
+ bl rknand_print_hex
+ ldrb r2, [r7, #1] @ zero_extendqisi2
+ ldr r1, [r6, #512]
+ subs r5, r5, #4
+ ldr r0, .L3542+12
+ bl printk
+ ldr r2, .L3542+16
+ ldrh r3, [r7, #1890]
+ mov r1, r4
+ ldr r0, .L3542+20
+ ldr r2, [r2, #4008]
+ str r2, [sp]
+ mov r2, r4
+ bl printk
+ ldrb r3, [r7, #1] @ zero_extendqisi2
+ ldr r7, .L3542
+ ldr r2, [r6, #512]
+ cmp r2, r3
+ it hi
+ strhi r3, [r6, #512]
+ lsls r3, r4, #7
+ str r3, [sp, #32]
+ movs r3, #0
+ str r3, [sp, #16]
+ str r3, [sp, #12]
+.L3521:
+ ldr r2, [r5, #4]
+ ldrb r3, [r7, #1] @ zero_extendqisi2
+ cmp r2, r3
+ bcs .L3509
+ ldr r3, .L3542+16
+ ldr r3, [r3, #4008]
+ cmp r2, r3
+ bcc .L3509
+ ldr r3, [sp, #28]
+ cmp r3, #1
+ bls .L3510
+ ldr r3, [sp, #12]
+ cbz r3, .L3510
+ ldr r3, [r5]
+ adds r3, r3, #1
+ cmp r2, r3
+ beq .L3509
+.L3510:
+ mov r0, r9
+ mov r1, #512
+ bl __memzero
+ ldr r3, [r5, #4]
+ ldr r2, [sp, #8]
+ ldr r0, .L3542+24
+ mul r8, r3, r2
+ ldr r3, .L3542
+ ldr r3, [r3, #1788]
+ mov r1, r8
+ ldrb r2, [r3, #9] @ zero_extendqisi2
+ ldrh r10, [r3, #10]
+ str r2, [sp, #20]
+ mov r2, r4
+ ldrh r3, [sp, #20]
+ smulbb r10, r10, r3
bl printk
movs r0, #0
bl flash_boot_enter_slc_mode
- ldrh r1, [r4, #1884]
- mov r0, r7
+ ldr r1, [sp, #20]
+ mov r0, r8
bl __aeabi_uidiv
- uxth r5, r5
+ uxth r10, r10
mov r1, r0
movs r0, #0
mov r2, r0
bl FlashEraseBlock
+ cmp r4, r10
+ bls .L3525
+ movs r0, #0
+ add r1, r8, r10
+ mov fp, #2
+ mov r2, r0
+ bl FlashEraseBlock
+ b .L3511
+.L3525:
+ mov fp, #1
+.L3511:
movs r0, #0
bl flash_boot_exit_slc_mode
- ldr r3, [r4, #1788]
- mov r1, r5
- mov r0, r7
- movs r5, #0
- ldrb r3, [r3, #9] @ zero_extendqisi2
- str r3, [sp]
+ ldr r3, [r7, #1788]
+ ldrh r0, [r3, #10]
+ ldrb r1, [r3, #12] @ zero_extendqisi2
+ lsls r0, r0, #2
+ mul r0, fp, r0
+ bl __aeabi_idiv
+ mov r1, r10
+ mov r10, #0
+ str r0, [sp, #44]
+ mov r0, r8
bl __aeabi_uidivmod
- ldr ip, .L3492+16
- rsb r10, r1, r7
- mov r9, r1
-.L3477:
- cmp r5, r8
- bcs .L3491
- add r3, r5, r9
- ubfx r3, r3, #2, #16
- cbz r3, .L3478
- adds r1, r3, #1
- ldrb r0, [r4, #76] @ zero_extendqisi2
- add r2, r4, r1, lsl #1
- ldrh r2, [r2, #80]
- cbz r0, .L3479
- ldr r0, [fp, #2772]
- cmp r0, ip
+ str r6, [sp, #24]
+ mov ip, r1
+ rsb r3, r1, r8
+ str r3, [sp, #36]
+.L3512:
+ ldr r3, [sp, #44]
+ cmp r10, r3
+ bcs .L3541
+ add r2, r10, ip
+ ubfx r2, r2, #2, #16
+ cbz r2, .L3513
+ adds r3, r2, #1
+ add r1, r7, r3, lsl #1
+ ldrh fp, [r1, #80]
+ ldrb r1, [r7, #76] @ zero_extendqisi2
+ cbz r1, .L3514
+ ldr r1, [r7, #2768]
+ ldr r0, .L3542+28
+ cmp r1, r0
it eq
- uxtheq r2, r1
-.L3479:
- subs r2, r2, #1
- lsls r2, r2, #2
- str r2, [sp, #24]
- movs r2, #0
- str r2, [sp, #28]
-.L3478:
- add r2, r4, r3, lsl #1
- ldrh r6, [r2, #80]
- ldrb r2, [r4, #76] @ zero_extendqisi2
- cbz r2, .L3480
- ldr r2, [fp, #2772]
- cmp r2, ip
+ moveq fp, r3
+.L3514:
+ add fp, fp, #1073741824
+ add fp, fp, #-1
+ lsl r3, fp, #2
+ str r3, [sp, #56]
+.L3513:
+ movw r3, #61424
+ str r3, [sp, #60]
+ add r3, r7, r2, lsl #1
+ ldrh fp, [r3, #80]
+ ldrb r3, [r7, #76] @ zero_extendqisi2
+ cbz r3, .L3515
+ ldr r3, [r7, #2768]
+ ldr r1, .L3542+28
+ cmp r3, r1
it eq
- moveq r6, r3
-.L3480:
- ldr r3, [sp]
- str ip, [sp, #20]
- mla r1, r3, r6, r10
- ldr r3, [sp, #8]
- add r2, r3, r5, lsl #9
- ldrb r3, [r4, #1892] @ zero_extendqisi2
- str r2, [sp, #12]
- adds r5, r5, #4
- str r3, [sp, #4]
- uxth r5, r5
- ldr r3, .L3492+8
- str r1, [sp, #16]
- ldrb r0, [r3, #4010] @ zero_extendqisi2
+ moveq fp, r2
+.L3515:
+ ldr r3, [sp, #20]
+ add r10, r10, #4
+ ldr r2, [sp, #36]
+ str ip, [sp, #52]
+ uxth r10, r10
+ mla r2, r3, fp, r2
+ ldr r3, .L3542
+ ldrb r3, [r3, #1892] @ zero_extendqisi2
+ str r2, [sp, #48]
+ str r3, [sp, #40]
+ ldr r3, .L3542+16
+ ldrb r0, [r3, #4014] @ zero_extendqisi2
bl FlashBchSel
movs r0, #0
bl flash_boot_enter_slc_mode
- ldr r3, [r4, #1788]
- ldr r1, [sp, #16]
- mov r0, r1
+ ldr r3, .L3542
+ ldr r2, [sp, #48]
+ ldr r3, [r3, #1788]
+ mov r0, r2
ldrb r1, [r3, #9] @ zero_extendqisi2
bl __aeabi_uidiv
+ add r3, sp, #56
+ ldr r2, [sp, #24]
mov r1, r0
- ldr r2, [sp, #12]
- add r3, sp, #24
movs r0, #0
bl FlashProgPage
movs r0, #0
bl flash_boot_exit_slc_mode
- ldr r0, [sp, #4]
+ ldr r0, [sp, #40]
bl FlashBchSel
- mov r0, r10
- ldr r1, [sp]
+ ldr r1, [sp, #20]
+ ldr r0, [sp, #36]
bl __aeabi_uidiv
- adds r2, r6, #1
+ add r2, fp, #1
uxth r2, r2
mov r1, r0
movs r0, #0
bl FlashPageProgMsbFFData
- ldr ip, [sp, #20]
- b .L3477
-.L3491:
- mov r1, r7
- mov r2, r8
- movs r3, #0
- ldr r0, .L3492+12
- bl printk
- movs r0, #0
- add sp, sp, #92
- @ sp needed
- pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L3493:
+ ldr r3, [sp, #24]
+ ldr ip, [sp, #52]
+ add r3, r3, #2048
+ str r3, [sp, #24]
+ b .L3512
+.L3543:
.align 2
-.L3492:
+.L3542:
.word .LANCHOR0
- .word .LC144
+ .word .LC148
+ .word .LC149
+ .word .LC150
.word .LANCHOR2
- .word .LC145
+ .word .LC151
+ .word .LC152
.word 1446522928
- .fnend
- .size IDBlockWriteData, .-IDBlockWriteData
- .align 1
- .global write_idblock
- .thumb
- .thumb_func
- .type write_idblock, %function
-write_idblock:
- .fnstart
- @ args = 0, pretend = 0, frame = 8
- @ frame_needed = 0, uses_anonymous_args = 0
- push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
- .save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
- mov fp, r0
- ldr r5, .L3506
- .pad #20
- sub sp, sp, #20
- mov r0, #256000
- mov r8, r1
- mov r9, r2
- ldr r3, [r5, #1788]
- ldr r6, [r5, #4]
- ldrb r10, [r3, #9] @ zero_extendqisi2
- bl ftl_malloc
- mov r7, r0
- cmp r0, #0
- beq .L3503
- addw r4, fp, #511
- lsrs r4, r4, #9
- cmp r4, #255
- bhi .L3496
- add r0, r8, r4, lsl #9
+.L3541:
mov r1, r8
- rsb r2, r4, #256
- bl memcpy
-.L3496:
- adds r4, r4, #128
- movs r3, #5
- cmp r4, #256
- ldr r0, .L3506+4
- mov r1, r9
- mov r2, #4
- it cs
- movcs r4, #256
- bl rknand_print_hex
- ldrb r2, [r5, #1] @ zero_extendqisi2
- ldr r1, [r8, #512]
- ldr r0, .L3506+8
+ mov r2, r4
+ movs r3, #0
+ ldr r0, .L3544
bl printk
- ldrb r3, [r5, #1] @ zero_extendqisi2
- ldr r2, [r8, #512]
+ ldr r0, [r5, #4]
+ ldr r3, [sp, #8]
mov r1, r4
- ldr r0, .L3506+12
- movs r5, #0
+ mov r2, r9
+ mov r8, #0
+ muls r0, r3, r0
+ bl IdBlockReadData
+ mov r0, r9
+ mov r1, r6
+.L3520:
+ mov fp, r0
+ mov r10, r1
+ ldr r2, [fp]
+ adds r0, r0, #4
+ ldr r3, [r10]
+ adds r1, r1, #4
cmp r2, r3
- mov r2, fp
- it hi
- strhi r3, [r8, #512]
- mov fp, r5
- bl printk
- smulbb r10, r10, r6
- mov r6, r9
- lsls r3, r4, #7
- uxth r10, r10
- str r3, [sp, #8]
-.L3502:
- ldr r2, .L3506
- ldr r3, [r6]
- ldrh r2, [r2, #1890]
- cmp r3, r2
- bcs .L3498
- ldr r2, .L3506+16
- ldr r2, [r2, #4004]
- cmp r3, r2
- bcc .L3498
- mov r0, r7
+ beq .L3517
+ mov r0, r9
mov r1, #512
bl __memzero
- ldr r0, [r6]
- mov r1, r4
- mov r2, r8
- mov r9, #0
- mul r0, r0, r10
- bl IDBlockWriteData
- ldr r0, [r6]
- mov r1, r4
- mov r2, r7
- mul r0, r0, r10
- bl IdBlockReadData
-.L3501:
- ldr r2, [r7, r9, lsl #2]
- ldr r3, [r8, r9, lsl #2]
- cmp r2, r3
- beq .L3499
- stmia sp, {r2, r3}
- mov r1, fp
- ldr r2, [r6]
- mov r3, r9
- ldr r0, .L3506+20
+ ldr r3, [fp]
+ ldr r1, [sp, #12]
+ ldr r0, .L3544+4
+ str r3, [sp]
+ ldr r3, [r10]
+ bic r10, r8, #255
+ lsl r10, r10, #2
+ str r3, [sp, #4]
+ mov r3, r8
+ ldr r2, [r5, #4]
bl printk
- bic ip, r9, #255
- ldr r0, .L3506+24
+ ldr r0, .L3544+8
+ add r1, r6, r10
movs r2, #4
- lsl ip, ip, #2
mov r3, #256
- add r1, r8, ip
- str ip, [sp, #12]
bl rknand_print_hex
- mov r3, #256
+ add r1, r9, r10
movs r2, #4
- ldr r0, .L3506+28
- ldr ip, [sp, #12]
- add r1, r7, ip
+ mov r3, #256
+ ldr r0, .L3544+12
bl rknand_print_hex
- mov r0, r7
- mov r1, #512
- bl __memzero
- ldr r0, [r6]
- movs r1, #4
- mov r2, r7
- mul r0, r0, r10
- bl IDBlockWriteData
- ldr r0, .L3506+32
- bl printk
+ movs r0, #0
+ bl flash_boot_enter_slc_mode
ldr r3, [sp, #8]
- cmp r9, r3
- bcc .L3498
- b .L3500
-.L3499:
+ ldr r1, [r5, #4]
+ movs r0, #0
+ mov r2, r0
+ muls r1, r3, r1
+ bl FlashEraseBlock
+ ldr r3, [sp, #28]
+ cmp r3, #1
+ bls .L3518
+ ldr r1, [r5, #4]
+ movs r0, #0
ldr r3, [sp, #8]
- add r9, r9, #1
- cmp r9, r3
- bne .L3501
-.L3500:
- adds r5, r5, #1
-.L3498:
- add fp, fp, #1
- adds r6, r6, #4
- cmp fp, #5
- bne .L3502
- clz r5, r5
- mov r0, r7
+ mov r2, r0
+ mla r1, r1, r3, r3
+ bl FlashEraseBlock
+.L3518:
+ movs r0, #0
+ bl flash_boot_exit_slc_mode
+ ldr r0, .L3544+16
+ ldr r1, [r5, #4]
+ bl printk
+ ldr r3, [sp, #32]
+ cmp r8, r3
+ bcc .L3509
+ b .L3519
+.L3517:
+ ldr r3, [sp, #32]
+ add r8, r8, #1
+ cmp r8, r3
+ bne .L3520
+.L3519:
+ ldr r3, [sp, #16]
+ adds r3, r3, #1
+ str r3, [sp, #16]
+.L3509:
+ ldr r3, [sp, #12]
+ adds r5, r5, #4
+ adds r3, r3, #1
+ str r3, [sp, #12]
+ cmp r3, #5
+ bne .L3521
+ mov r0, r9
bl ftl_free
- lsrs r5, r5, #5
- negs r0, r5
- b .L3495
-.L3503:
+ ldr r3, [sp, #16]
+ clz r0, r3
+ lsrs r0, r0, #5
+ negs r0, r0
+ b .L3502
+.L3524:
mov r0, #-1
-.L3495:
- add sp, sp, #20
+.L3502:
+ add sp, sp, #124
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L3507:
+.L3545:
.align 2
-.L3506:
- .word .LANCHOR0
- .word .LC146
- .word .LC147
- .word .LC148
- .word .LANCHOR2
- .word .LC149
- .word .LC150
- .word .LC151
- .word .LC152
+.L3544:
+ .word .LC153
+ .word .LC154
+ .word .LC155
+ .word .LC156
+ .word .LC157
.fnend
.size write_idblock, .-write_idblock
.align 1
@@ -21603,23 +21956,23 @@ CRC_32:
push {r4, lr}
.save {r4, lr}
add r1, r1, r0
- ldr r4, .L3512
+ ldr r4, .L3550
movs r2, #0
-.L3509:
+.L3547:
cmp r0, r1
- beq .L3511
+ beq .L3549
ldrb r3, [r0], #1 @ zero_extendqisi2
eor r3, r3, r2, lsr #24
add r3, r4, r3, lsl #2
- ldr r3, [r3, #3008]
+ ldr r3, [r3, #3072]
eor r2, r3, r2, lsl #8
- b .L3509
-.L3511:
+ b .L3547
+.L3549:
mov r0, r2
pop {r4, pc}
-.L3513:
+.L3551:
.align 2
-.L3512:
+.L3550:
.word .LANCHOR1
.fnend
.size CRC_32, .-CRC_32
@@ -21632,7 +21985,7 @@ rknand_sys_storage_ioctl:
.fnstart
@ args = 0, pretend = 0, frame = 528
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L3619
+ ldr r3, .L3660
push {r4, r5, r6, r7, lr}
.save {r4, r5, r6, r7, lr}
cmp r1, r3
@@ -21640,259 +21993,255 @@ rknand_sys_storage_ioctl:
sub sp, sp, #532
mov r4, r1
mov r5, r2
- beq .L3516
- bhi .L3517
+ beq .L3554
+ bhi .L3555
subw r3, r3, #3461
cmp r1, r3
- beq .L3518
- bhi .L3519
+ beq .L3556
+ bhi .L3557
subs r3, r3, #125
cmp r1, r3
- beq .L3520
- bhi .L3521
+ beq .L3558
+ bhi .L3559
subs r3, r3, #237
cmp r1, r3
- bne .L3577
+ bne .L3615
bl rknand_dev_flush
- b .L3608
-.L3521:
- ldr r3, .L3619+4
+ b .L3648
+.L3559:
+ ldr r3, .L3660+4
cmp r1, r3
- beq .L3523
+ beq .L3561
adds r3, r3, #1
cmp r1, r3
- beq .L3524
- b .L3577
-.L3519:
- ldr r3, .L3619+8
+ beq .L3562
+ b .L3615
+.L3557:
+ ldr r3, .L3660+8
cmp r1, r3
- beq .L3525
- bhi .L3526
+ beq .L3563
+ bhi .L3564
mvn r1, #1960
add r3, r3, r1
cmp r4, r3
- beq .L3527
- b .L3577
-.L3526:
- ldr r3, .L3619+12
+ beq .L3565
+ b .L3615
+.L3564:
+ ldr r3, .L3660+12
cmp r1, r3
- beq .L3525
+ beq .L3563
adds r3, r3, #10
cmp r1, r3
- beq .L3525
- b .L3577
-.L3517:
- ldr r3, .L3619+16
+ beq .L3563
+ b .L3615
+.L3555:
+ ldr r3, .L3660+16
cmp r1, r3
- beq .L3528
- bhi .L3529
+ beq .L3566
+ bhi .L3567
subs r3, r3, #78
cmp r1, r3
- beq .L3530
- bcc .L3531
+ beq .L3568
+ bcc .L3569
adds r3, r3, #21
cmp r1, r3
- beq .L3532
+ beq .L3570
adds r3, r3, #56
cmp r1, r3
- beq .L3533
- b .L3577
-.L3529:
- ldr r3, .L3619+20
+ beq .L3571
+ b .L3615
+.L3567:
+ ldr r3, .L3660+20
cmp r1, r3
mov r6, r3
- beq .L3534
- bhi .L3535
+ beq .L3572
+ bhi .L3573
mvn r2, #956
add r3, r3, r2
cmp r1, r3
- beq .L3536
+ beq .L3574
add r3, r3, #956
cmp r1, r3
- beq .L3537
- b .L3577
-.L3535:
- ldr r3, .L3619+24
+ beq .L3575
+ b .L3615
+.L3573:
+ ldr r3, .L3660+24
cmp r1, r3
- beq .L3537
+ beq .L3575
adds r3, r3, #1
cmp r1, r3
- beq .L3534
- b .L3577
-.L3531:
- ldr r0, .L3619+28
+ beq .L3572
+ b .L3615
+.L3569:
+ ldr r0, .L3660+28
bl printk
mov r0, #4096
bl ftl_malloc
mov r4, r0
- cbnz r0, .L3538
-.L3543:
+ cbnz r0, .L3576
+.L3581:
mvn r0, #11
- b .L3515
-.L3538:
+ b .L3553
+.L3576:
mov r1, r5
mov r2, #512
bl rk_copy_from_user
- cbnz r0, .L3614
- ldr r0, .L3619+32
+ cbnz r0, .L3654
+ ldr r0, .L3660+32
ldmia r4, {r1, r2}
bl printk
ldr r3, [r4, #4]
cmp r3, #8
str r3, [sp, #4]
- bhi .L3611
+ bhi .L3652
bl rknand_device_lock
+ ldr r1, [sp, #4]
mov r2, r4
ldr r0, [r4]
- ldr r1, [sp, #4]
bl IdBlockReadData
bl rknand_device_unlock
+ ldr r2, [sp, #4]
mov r0, r5
mov r1, r4
- ldr r2, [sp, #4]
lsls r2, r2, #9
bl rk_copy_to_user
cmp r0, #0
- beq .L3607
- ldr r0, .L3619+36
-.L3610:
+ beq .L3647
+ ldr r0, .L3660+36
+.L3650:
bl printk
-.L3611:
+.L3652:
mov r0, r4
-.L3612:
+.L3653:
bl ftl_free
-.L3613:
+.L3651:
mvn r0, #13
- b .L3515
-.L3530:
- ldr r0, .L3619+40
+ b .L3553
+.L3568:
+ ldr r0, .L3660+40
bl printk
mov r0, #4096
bl ftl_malloc
mov r4, r0
cmp r0, #0
- beq .L3543
+ beq .L3581
mov r1, r5
mov r2, #4096
bl rk_copy_from_user
- cbz r0, .L3544
-.L3614:
- ldr r0, .L3619+44
- b .L3610
-.L3544:
- ldr r5, .L3619+48
- ldr r0, .L3619+52
+ cbz r0, .L3582
+.L3654:
+ ldr r0, .L3660+44
+ b .L3650
+.L3582:
+ ldr r5, .L3660+48
+ ldr r0, .L3660+52
ldmia r4, {r1, r2}
bl printk
- ldr r3, [r5, #-36]
+ ldr r3, [r5, #-32]
mov r6, r5
- cbnz r3, .L3545
+ cbnz r3, .L3583
mov r0, #260096
bl ftl_malloc
- str r0, [r5, #-36]
+ str r0, [r5, #-32]
cmp r0, #0
- beq .L3611
-.L3545:
+ beq .L3652
+ mov r1, #260096
+ bl __memzero
+.L3583:
ldr r2, [r4, #4]
movw r3, #4088
cmp r2, r3
- bhi .L3611
+ bhi .L3652
ldr r3, [r4]
cmp r3, #251904
- bhi .L3611
- ldr r0, [r6, #-36]
+ bhi .L3652
+ ldr r0, [r6, #-32]
add r1, r4, #8
add r0, r0, r3
bl memcpy
-.L3607:
+.L3647:
mov r0, r4
bl ftl_free
-.L3608:
+.L3648:
movs r4, #0
- b .L3542
-.L3533:
- ldr r0, .L3619+56
+ b .L3580
+.L3571:
+ ldr r0, .L3660+56
bl printk
mov r0, #4096
bl ftl_malloc
mov r6, r0
cmp r0, #0
- beq .L3543
+ beq .L3581
mov r1, r5
movs r2, #28
bl rk_copy_from_user
- cbz r0, .L3547
- ldr r0, .L3619+44
+ cbz r0, .L3586
+ ldr r0, .L3660+44
bl printk
- b .L3548
-.L3547:
+ b .L3587
+.L3586:
ldmia r6, {r1, r2}
- ldr r0, .L3619+60
+ ldr r0, .L3660+60
bl printk
ldr r1, [r6]
cmp r1, #256000
- bhi .L3548
- ldr r5, .L3619+48
- ldr r0, [r5, #-36]
- cbz r0, .L3548
+ bhi .L3587
+ ldr r5, .L3660+48
+ ldr r0, [r5, #-32]
+ cbz r0, .L3587
bl CRC_32
ldr r3, [r6, #4]
cmp r3, r0
- beq .L3550
+ beq .L3589
mov r0, r6
bl ftl_free
- b .L3578
-.L3550:
+ b .L3616
+.L3589:
bl rknand_device_lock
- ldr r1, [r5, #-36]
+ ldr r1, [r5, #-32]
add r2, r6, #8
ldr r0, [r6]
bl write_idblock
movs r4, #0
bl rknand_device_unlock
- ldr r0, [r5, #-36]
+ ldr r0, [r5, #-32]
bl ftl_free
- str r4, [r5, #-36]
+ str r4, [r5, #-32]
mov r0, r6
- b .L3555
-.L3548:
+ b .L3593
+.L3587:
mov r0, r6
- b .L3612
-.L3532:
- ldr r0, .L3619+64
+ b .L3653
+.L3570:
+ ldr r0, .L3660+64
bl printk
mov r0, #4096
bl ftl_malloc
mov r6, r0
cmp r0, #0
- beq .L3543
- bl ReadFlashInfo
+ beq .L3581
+ bl ftl_read_flash_info
mov r0, r5
mov r1, r6
movs r2, #11
- b .L3617
-.L3516:
- ldr r0, .L3619+68
+ b .L3658
+.L3554:
+ ldr r0, .L3660+68
bl printk
- bl rknand_device_lock
- bl FtlReInitForSDUpdata
- mov r4, r0
- bl rknand_device_unlock
- cmp r4, #0
- bne .L3613
bl nand_blk_add_whole_disk
mov r0, #4096
bl ftl_malloc
mov r6, r0
cmp r0, #0
- beq .L3543
+ beq .L3581
bl rknand_device_lock
- mov r1, r4
+ movs r1, #0
movs r2, #64
mov r0, r6
bl FlashReadFacBbtData
bl rknand_device_unlock
- ldr r0, .L3619+72
+ ldr r0, .L3660+72
mov r1, r6
movs r2, #4
movs r3, #8
@@ -21900,26 +22249,30 @@ rknand_sys_storage_ioctl:
mov r0, r5
mov r1, r6
movs r2, #64
- b .L3617
-.L3528:
- ldr r0, .L3619+76
+ b .L3658
+.L3566:
+ ldr r0, .L3660+76
bl printk
- ldr r3, .L3619+48
- mov r0, r5
+ ldr r3, .L3660+48
+ add r1, sp, #4
movs r2, #4
- ldr r3, [r3, #-32]
+ mov r0, r5
+ ldr r3, [r3, #-28]
ldr r3, [r3, #20]
- add r1, sp, #4
str r3, [sp, #4]
- b .L3603
-.L3536:
- ldr r0, .L3619+80
+.L3642:
+ bl rk_copy_to_user
+ cmp r0, #0
+ bne .L3651
+ b .L3648
+.L3574:
+ ldr r0, .L3660+80
bl printk
mov r0, #4096
bl ftl_malloc
mov r6, r0
cmp r0, #0
- beq .L3543
+ beq .L3581
bl rknand_device_lock
movs r1, #2
mov r2, r6
@@ -21929,31 +22282,31 @@ rknand_sys_storage_ioctl:
mov r2, #1024
mov r0, r5
mov r1, r6
-.L3617:
+.L3658:
bl rk_copy_to_user
mov r4, r0
mov r0, r6
cmp r4, #0
- bne .L3612
-.L3555:
+ bne .L3653
+.L3593:
bl ftl_free
- b .L3542
-.L3520:
- ldr r0, .L3619+84
+ b .L3580
+.L3558:
+ ldr r0, .L3660+84
bl printk
+ add r0, sp, #8
mov r1, r5
mov r2, #520
- add r0, sp, #8
bl rk_copy_from_user
mov r4, r0
- cbz r0, .L3556
-.L3561:
- ldr r0, .L3619+44
+ cbz r0, .L3594
+.L3599:
+ ldr r0, .L3660+44
bl printk
- b .L3613
-.L3620:
+ b .L3651
+.L3661:
.align 2
-.L3619:
+.L3660:
.word 1074033155
.word 1074029570
.word 1074031656
@@ -21961,88 +22314,80 @@ rknand_sys_storage_ioctl:
.word 1074033235
.word 1074034193
.word 1074034194
- .word .LC153
- .word .LC155
- .word .LC156
- .word .LC157
- .word .LC154
- .word .LANCHOR4
.word .LC158
- .word .LC159
.word .LC160
.word .LC161
.word .LC162
+ .word .LC159
+ .word .LANCHOR4
.word .LC163
.word .LC164
.word .LC165
.word .LC166
-.L3556:
+ .word .LC167
+ .word .LC168
+ .word .LC169
+ .word .LC170
+ .word .LC171
+.L3594:
ldr r2, [sp, #8]
- ldr r3, .L3621
+ ldr r3, .L3662
cmp r2, r3
- beq .L3557
-.L3558:
+ beq .L3595
+.L3596:
mov r4, #-1
- b .L3542
-.L3557:
+ b .L3580
+.L3595:
ldr r3, [sp, #12]
cmp r3, #512
- bhi .L3558
- ldr r6, .L3621+4
+ bhi .L3596
+ ldr r6, .L3662+4
mov r2, #512
add r0, sp, #8
- ldr r1, [r6, #-32]
+ ldr r1, [r6, #-28]
bl memcpy
- ldr r2, [r6, #-28]
- ldr r3, .L3621+8
+ ldr r2, [r6, #-24]
+ ldr r3, .L3662+8
cmp r2, r3
- beq .L3559
+ beq .L3597
add r0, sp, #72
movs r1, #128
str r4, [sp, #16]
str r4, [sp, #20]
bl __memzero
-.L3559:
+.L3597:
add r0, sp, #264
mov r1, #256
movs r3, #0
str r3, [sp, #24]
bl __memzero
-.L3604:
- add r1, sp, #8
- mov r2, #520
- mov r0, r5
-.L3603:
- bl rk_copy_to_user
- cmp r0, #0
- bne .L3613
- b .L3608
-.L3523:
- ldr r0, .L3621+12
+ b .L3656
+.L3561:
+ ldr r0, .L3662+12
bl printk
+ add r0, sp, #8
mov r1, r5
mov r2, #520
- add r0, sp, #8
bl rk_copy_from_user
cmp r0, #0
- bne .L3561
+ bne .L3599
ldr r2, [sp, #8]
- ldr r3, .L3621
+ ldr r3, .L3662
cmp r2, r3
- bne .L3558
+ bne .L3596
ldr r3, [sp, #12]
cmp r3, #512
- bhi .L3558
- ldr r2, .L3621+4
- ldr r3, .L3621+8
- ldr r1, [r2, #-28]
+ bhi .L3596
+ ldr r2, .L3662+4
+ ldr r3, .L3662+8
+ ldr r1, [r2, #-24]
cmp r1, r3
- bne .L3578
+ bne .L3616
ldr r3, [sp, #20]
subs r1, r3, #1
cmp r1, #127
- bhi .L3579
- ldr r4, [r2, #-32]
+ bhi .L3617
+ ldr r4, [r2, #-28]
add r1, sp, #72
add r0, r4, #64
str r3, [r4, #12]
@@ -22050,62 +22395,62 @@ rknand_sys_storage_ioctl:
bl memcpy
movs r0, #1
mov r1, r4
- b .L3609
-.L3527:
- ldr r0, .L3621+16
+ b .L3649
+.L3565:
+ ldr r0, .L3662+16
bl printk
+ add r0, sp, #8
mov r1, r5
mov r2, #520
- add r0, sp, #8
bl rk_copy_from_user
cmp r0, #0
- bne .L3561
+ bne .L3599
ldr r2, [sp, #8]
- ldr r3, .L3621+20
+ ldr r3, .L3662+20
cmp r2, r3
- bne .L3558
+ bne .L3596
ldr r3, [sp, #12]
cmp r3, #512
- bhi .L3558
- ldr r5, .L3621+4
- ldr r3, [r5, #-24]
- cbnz r3, .L3562
-.L3565:
- movs r0, #0
- b .L3515
-.L3562:
+ bhi .L3596
+ ldr r5, .L3662+4
ldr r3, [r5, #-20]
- ldr r2, .L3621+24
+ cbnz r3, .L3600
+.L3603:
+ movs r0, #0
+ b .L3553
+.L3600:
+ ldr r3, [r5, #-16]
+ ldr r2, .L3662+24
ldr r1, [r3]
cmp r1, r2
- beq .L3563
+ beq .L3601
str r2, [r3]
mov r2, #504
- ldr r3, [r5, #-20]
+ ldr r3, [r5, #-16]
str r2, [r3, #4]
movs r2, #0
str r2, [r3, #8]
str r2, [r3, #12]
-.L3563:
- ldr r1, [r5, #-20]
+.L3601:
+ ldr r1, [r5, #-16]
movs r4, #0
mov r0, r4
str r4, [r1, #16]
bl StorageSysDataStore
- ldr r3, [r5, #-32]
- ldr r2, .L3621
+ ldr r3, [r5, #-28]
+ ldr r2, .L3662
ldr r1, [r3]
cmp r1, r2
it ne
strne r2, [r3]
- ldr r0, [r5, #-32]
+ ldr r0, [r5, #-28]
itt ne
movne r2, #504
- ldrne r3, .L3621+4
+ ldrne r3, .L3662+4
mov r1, #128
add r0, r0, #64
itt ne
- ldrne r3, [r3, #-32]
+ ldrne r3, [r3, #-28]
strne r4, [r3, #8]
mov r4, #0
it ne
@@ -22113,41 +22458,41 @@ rknand_sys_storage_ioctl:
str r4, [r0, #-52]
bl __memzero
movs r0, #1
- ldr r1, [r5, #-32]
+ ldr r1, [r5, #-28]
bl StorageSysDataStore
+ str r4, [r5, #-20]
str r4, [r5, #-24]
- str r4, [r5, #-28]
- b .L3542
-.L3518:
- ldr r0, .L3621+28
+ b .L3580
+.L3556:
+ ldr r0, .L3662+28
bl printk
+ add r0, sp, #8
mov r1, r5
mov r2, #520
- add r0, sp, #8
bl rk_copy_from_user
cmp r0, #0
- bne .L3561
+ bne .L3599
ldr r2, [sp, #8]
- ldr r3, .L3621+32
+ ldr r3, .L3662+32
cmp r2, r3
- bne .L3558
+ bne .L3596
ldr r3, [sp, #12]
cmp r3, #512
- bhi .L3558
- ldr r5, .L3621+4
- ldr r3, [r5, #-24]
- cmp r3, #1
- beq .L3565
+ bhi .L3596
+ ldr r5, .L3662+4
ldr r3, [r5, #-20]
- ldr r2, .L3621+24
+ cmp r3, #1
+ beq .L3603
+ ldr r3, [r5, #-16]
+ ldr r2, .L3662+24
ldr r1, [r3]
cmp r1, r2
it ne
strne r2, [r3]
- ldr r1, [r5, #-20]
+ ldr r1, [r5, #-16]
itttt ne
movne r2, #504
- ldrne r3, [r5, #-20]
+ ldrne r3, [r5, #-16]
strne r2, [r3, #4]
strne r0, [r3, #8]
it ne
@@ -22156,80 +22501,80 @@ rknand_sys_storage_ioctl:
movs r0, #0
str r3, [r1, #16]
bl StorageSysDataStore
- ldr r3, [r5, #-32]
- ldr r2, .L3621
+ ldr r3, [r5, #-28]
+ ldr r2, .L3662
ldr r1, [r3]
cmp r1, r2
- beq .L3567
+ beq .L3605
str r2, [r3]
mov r2, #504
- ldr r3, .L3621+4
- ldr r3, [r3, #-32]
+ ldr r3, .L3662+4
+ ldr r3, [r3, #-28]
str r2, [r3, #4]
movs r2, #0
str r2, [r3, #8]
-.L3567:
- ldr r0, [r5, #-32]
+.L3605:
+ ldr r0, [r5, #-28]
movs r1, #128
movs r4, #0
adds r0, r0, #64
str r4, [r0, #-52]
bl __memzero
movs r0, #1
- ldr r1, [r5, #-32]
+ ldr r1, [r5, #-28]
bl StorageSysDataStore
movs r3, #1
- str r3, [r5, #-24]
- b .L3542
-.L3524:
- ldr r0, .L3621+36
+ str r3, [r5, #-20]
+ b .L3580
+.L3562:
+ ldr r0, .L3662+36
bl printk
+ add r0, sp, #8
mov r1, r5
mov r2, #520
- add r0, sp, #8
bl rk_copy_from_user
cmp r0, #0
- bne .L3561
+ bne .L3599
ldr r2, [sp, #8]
- ldr r3, .L3621+40
+ ldr r3, .L3662+40
cmp r2, r3
- bne .L3558
+ bne .L3596
ldr r2, [sp, #12]
cmp r2, #512
- bhi .L3558
+ bhi .L3596
add r0, sp, #16
- ldr r1, .L3621+44
- b .L3605
-.L3525:
- ldr r0, .L3621+48
+ ldr r1, .L3662+44
+ b .L3655
+.L3563:
+ ldr r0, .L3662+48
cmp r4, r0
mov r7, r0
- bne .L3568
- ldr r0, .L3621+52
- b .L3606
-.L3568:
- ldr r3, .L3621+56
+ bne .L3606
+ ldr r0, .L3662+52
+ b .L3645
+.L3606:
+ ldr r3, .L3662+56
cmp r4, r3
ite eq
- ldreq r0, .L3621+60
- ldrne r0, .L3621+64
-.L3606:
+ ldreq r0, .L3662+60
+ ldrne r0, .L3662+64
+.L3645:
bl printk
+ add r0, sp, #8
mov r1, r5
mov r2, #520
- add r0, sp, #8
bl rk_copy_from_user
cmp r0, #0
- bne .L3561
+ bne .L3599
ldr r2, [sp, #8]
- ldr r3, .L3621+68
+ ldr r3, .L3662+68
cmp r2, r3
- bne .L3613
- ldr r3, .L3621+56
- ldr r6, .L3621+4
+ bne .L3651
+ ldr r3, .L3662+56
+ ldr r6, .L3662+4
cmp r4, r3
- bne .L3571
- ldr r3, [r6, #-32]
+ bne .L3609
+ ldr r3, [r6, #-28]
mov r0, r5
add r1, sp, #8
movs r2, #16
@@ -22238,29 +22583,29 @@ rknand_sys_storage_ioctl:
strb r3, [sp, #16]
bl rk_copy_to_user
cmp r0, #0
- beq .L3515
- b .L3613
-.L3571:
- ldr r3, [r6, #496]
+ beq .L3553
+ b .L3651
+.L3609:
+ ldr r3, [r6, #500]
cmp r3, #10
- bhi .L3613
- ldr r1, [r6, #-32]
+ bhi .L3651
+ ldr r1, [r6, #-28]
ldr r3, [sp, #12]
ldr r2, [r1, #24]
cmp r2, r3
- beq .L3572
- cbz r2, .L3572
+ beq .L3610
+ cbz r2, .L3610
mov r1, r3
- ldr r0, .L3621+72
+ ldr r0, .L3662+72
bl printk
- ldr r3, [r6, #496]
+ ldr r3, [r6, #500]
adds r3, r3, #1
- str r3, [r6, #496]
- b .L3613
-.L3572:
+ str r3, [r6, #500]
+ b .L3651
+.L3610:
movs r2, #0
cmp r4, r7
- str r2, [r6, #496]
+ str r2, [r6, #500]
mov r0, #1
itet eq
moveq r3, r2
@@ -22270,120 +22615,124 @@ rknand_sys_storage_ioctl:
str r2, [r1, #20]
bl StorageSysDataStore
adds r0, r0, #1
- bne .L3608
+ bne .L3648
mvn r4, #1
- b .L3542
-.L3622:
+ b .L3580
+.L3663:
.align 2
-.L3621:
+.L3662:
.word 1263358532
.word .LANCHOR4
.word -1067903959
- .word .LC167
- .word .LC168
+ .word .LC172
+ .word .LC173
.word 1112753220
.word 1146313043
- .word .LC169
+ .word .LC174
.word 1112755781
- .word .LC170
+ .word .LC175
.word 1094995539
- .word .LANCHOR4-16
+ .word .LANCHOR4-12
.word 1074031666
- .word .LC171
+ .word .LC176
.word 1074031676
- .word .LC172
- .word .LC173
+ .word .LC177
+ .word .LC178
.word 1280262987
- .word .LC174
-.L3537:
- ldr r0, .L3623
+ .word .LC179
+.L3575:
+ ldr r0, .L3664
bl printk
+ add r0, sp, #8
mov r1, r5
mov r2, #520
- add r0, sp, #8
bl rk_copy_from_user
cmp r0, #0
- bne .L3561
+ bne .L3599
ldr r2, [sp, #8]
- ldr r3, .L3623+4
+ ldr r3, .L3664+4
cmp r2, r3
- bne .L3558
+ bne .L3596
ldr r2, [sp, #12]
cmp r2, #504
- bhi .L3558
- ldr r3, .L3623+8
+ bhi .L3596
+ ldr r3, .L3664+8
add r0, sp, #16
cmp r4, r3
- ldr r3, .L3623+12
+ ldr r3, .L3664+12
ite eq
- ldreq r1, [r3, #500]
- ldrne r1, [r3, #504]
+ ldreq r1, [r3, #504]
+ ldrne r1, [r3, #508]
adds r1, r1, #8
-.L3605:
+.L3655:
bl memcpy
- b .L3604
-.L3534:
- ldr r0, .L3623+16
+.L3656:
+ mov r0, r5
+ add r1, sp, #8
+ mov r2, #520
+ b .L3642
+.L3572:
+ ldr r0, .L3664+16
bl printk
+ add r0, sp, #8
mov r1, r5
mov r2, #520
- add r0, sp, #8
bl rk_copy_from_user
cmp r0, #0
- bne .L3561
+ bne .L3599
ldr r2, [sp, #8]
- ldr r3, .L3623+4
+ ldr r3, .L3664+4
cmp r2, r3
- bne .L3558
+ bne .L3596
ldr r2, [sp, #12]
cmp r2, #504
- bhi .L3558
+ bhi .L3596
cmp r4, r6
add r2, r2, #8
- ldr r4, .L3623+12
- bne .L3576
+ ldr r4, .L3664+12
+ bne .L3614
add r1, sp, #8
- ldr r0, [r4, #500]
+ ldr r0, [r4, #504]
bl memcpy
movs r0, #2
- ldr r1, [r4, #500]
- b .L3609
-.L3576:
+ ldr r1, [r4, #504]
+ b .L3649
+.L3614:
add r1, sp, #8
- ldr r0, [r4, #504]
+ ldr r0, [r4, #508]
bl memcpy
- ldr r1, [r4, #504]
+ ldr r1, [r4, #508]
movs r0, #3
-.L3609:
+.L3649:
bl StorageSysDataStore
mov r4, r0
-.L3542:
- ldr r0, .L3623+20
+.L3580:
+ ldr r0, .L3664+20
mov r1, r4
bl printk
mov r0, r4
- b .L3515
-.L3577:
+ b .L3553
+.L3615:
mvn r0, #21
- b .L3515
-.L3578:
+ b .L3553
+.L3616:
mvn r0, #1
- b .L3515
-.L3579:
+ b .L3553
+.L3617:
mvn r0, #2
-.L3515:
+.L3553:
add sp, sp, #532
@ sp needed
pop {r4, r5, r6, r7, pc}
-.L3624:
+.L3665:
.align 2
-.L3623:
- .word .LC175
+.L3664:
+ .word .LC180
.word 1145980246
.word 1074034192
.word .LANCHOR4
- .word .LC176
- .word .LC177
+ .word .LC181
+ .word .LC182
.fnend
.size rknand_sys_storage_ioctl, .-rknand_sys_storage_ioctl
.align 1
@@ -22398,55 +22747,55 @@ rk_ftl_storage_sys_init:
push {r3, r4, r5, r6, r7, lr}
.save {r3, r4, r5, r6, r7, lr}
mov r2, #512
- ldr r4, .L3634
+ ldr r4, .L3675
movs r5, #0
- sub r0, r4, #16
- ldr r1, [r4, #-52]
- str r5, [r4, #-36]
+ sub r0, r4, #12
+ ldr r1, [r4, #-48]
+ str r5, [r4, #-32]
add r3, r1, #512
- str r3, [r4, #-32]
- str r1, [r4, #-20]
+ str r3, [r4, #-28]
+ str r1, [r4, #-16]
add r3, r1, #1024
add r1, r1, #1536
- str r3, [r4, #500]
- str r1, [r4, #504]
+ str r3, [r4, #504]
+ str r1, [r4, #508]
bl ftl_memcpy
- ldr r6, [r4, #-20]
- str r5, [r4, #-28]
- str r5, [r4, #496]
+ ldr r6, [r4, #-16]
+ str r5, [r4, #-24]
+ str r5, [r4, #500]
ldr r3, [r6, #16]
ldr r7, [r6, #508]
- str r3, [r4, #-24]
- cbz r7, .L3626
+ str r3, [r4, #-20]
+ cbz r7, .L3667
mov r0, r6
mov r1, #508
bl JSHash
cmp r7, r0
- beq .L3626
+ beq .L3667
str r5, [r6, #16]
- ldr r0, .L3634+4
- str r5, [r4, #-24]
+ ldr r0, .L3675+4
+ str r5, [r4, #-20]
bl printk
-.L3626:
- ldr r3, [r4, #-24]
- cbz r3, .L3627
- ldr r2, .L3634+8
- ldr r3, .L3634
- str r2, [r3, #-28]
-.L3627:
- ldr r1, [r4, #500]
+.L3667:
+ ldr r3, [r4, #-20]
+ cbz r3, .L3668
+ ldr r2, .L3675+8
+ ldr r3, .L3675
+ str r2, [r3, #-24]
+.L3668:
+ ldr r1, [r4, #504]
movs r0, #2
bl StorageSysDataLoad
- ldr r1, [r4, #504]
+ ldr r1, [r4, #508]
movs r0, #3
bl StorageSysDataLoad
pop {r3, r4, r5, r6, r7, lr}
b rknand_sys_storage_init
-.L3635:
+.L3676:
.align 2
-.L3634:
+.L3675:
.word .LANCHOR4
- .word .LC178
+ .word .LC183
.word -1067903959
.fnend
.size rk_ftl_storage_sys_init, .-rk_ftl_storage_sys_init
@@ -22473,77 +22822,66 @@ rk_ftl_vendor_storage_init:
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- push {r4, r5, r6, r7, r8, r9, r10, lr}
- .save {r4, r5, r6, r7, r8, r9, r10, lr}
+ push {r3, r4, r5, r6, r7, r8, r9, lr}
+ .save {r3, r4, r5, r6, r7, r8, r9, lr}
mov r0, #65536
- ldr r1, .L3647
- movs r2, #4
- bl kmalloc_order
- ldr r5, .L3647+4
- str r0, [r5, #508]
+ bl ftl_malloc
+ ldr r5, .L3687
+ str r0, [r5, #512]
cmp r0, #0
- beq .L3643
+ beq .L3684
movs r7, #0
- ldr r9, .L3647+12
- mov r10, r5
+ ldr r8, .L3687+8
+ mov r9, r5
mov r4, r7
mov r6, r7
-.L3641:
- ldr r8, [r5, #508]
- bl rknand_device_lock
- adds r0, r6, #2
+.L3682:
+ lsls r0, r6, #7
movs r1, #128
- mov r2, r8
- lsls r0, r0, #7
- bl FtlVendorPartRead
- mov r8, r0
- bl rknand_device_unlock
- cmp r8, #0
- bne .L3639
- ldr r3, [r10, #508]
- ldr r0, .L3647+8
+ ldr r2, [r5, #512]
+ bl FlashBootVendorRead
+ cmp r0, #0
+ bne .L3680
+ ldr r3, [r9, #512]
+ ldr r0, .L3687+4
add r2, r3, #65280
adds r2, r2, #252
ldr r1, [r3]
ldr r3, [r3, #4]
ldr r2, [r2]
bl printk
- ldr r8, [r10, #508]
- ldr r3, [r8]
- cmp r3, r9
- bne .L3640
- add r3, r8, #65280
- ldr r2, [r8, #4]
+ ldr r2, [r9, #512]
+ ldr r3, [r2]
+ cmp r3, r8
+ bne .L3681
+ add r3, r2, #65280
+ ldr r1, [r2, #4]
adds r3, r3, #252
ldr r3, [r3]
- cmp r3, r2
- bne .L3640
+ cmp r3, r1
+ bne .L3681
cmp r4, r3
itt cc
movcc r7, r6
movcc r4, r3
-.L3640:
- cbnz r6, .L3646
+.L3681:
+ cbnz r6, .L3686
movs r6, #1
- b .L3641
-.L3646:
- cbz r4, .L3642
- bl rknand_device_lock
+ b .L3682
+.L3686:
+ cbz r4, .L3683
lsls r0, r7, #7
- add r0, r0, #256
movs r1, #128
- mov r2, r8
- bl FtlVendorPartRead
- mov r4, r0
- bl rknand_device_unlock
- cbz r4, .L3645
- b .L3639
-.L3642:
- mov r0, r8
+ bl FlashBootVendorRead
+ cbnz r0, .L3680
+ pop {r3, r4, r5, r6, r7, r8, r9, pc}
+.L3683:
+ mov r0, r2
mov r1, #65536
bl __memzero
- ldr r3, [r5, #508]
- ldr r2, .L3647+12
+ ldr r3, [r5, #512]
+ ldr r2, .L3687+8
+ mov r0, r4
str r6, [r3, #4]
str r2, [r3]
movw r2, #65532
@@ -22551,25 +22889,22 @@ rk_ftl_vendor_storage_init:
movw r2, #64504
strh r4, [r3, #12] @ movhi
strh r2, [r3, #14] @ movhi
-.L3645:
- mov r0, r4
- pop {r4, r5, r6, r7, r8, r9, r10, pc}
-.L3639:
- ldr r0, [r5, #508]
+ pop {r3, r4, r5, r6, r7, r8, r9, pc}
+.L3680:
+ ldr r0, [r5, #512]
bl kfree
movs r3, #0
mov r0, #-1
- str r3, [r5, #508]
- pop {r4, r5, r6, r7, r8, r9, r10, pc}
-.L3643:
+ str r3, [r5, #512]
+ pop {r3, r4, r5, r6, r7, r8, r9, pc}
+.L3684:
mvn r0, #11
- pop {r4, r5, r6, r7, r8, r9, r10, pc}
-.L3648:
+ pop {r3, r4, r5, r6, r7, r8, r9, pc}
+.L3688:
.align 2
-.L3647:
- .word 37748929
+.L3687:
.word .LANCHOR4
- .word .LC179
+ .word .LC184
.word 1380668996
.fnend
.size rk_ftl_vendor_storage_init, .-rk_ftl_vendor_storage_init
@@ -22584,18 +22919,18 @@ rk_ftl_vendor_read:
@ frame_needed = 0, uses_anonymous_args = 0
push {r3, r4, r5, r6, r7, lr}
.save {r3, r4, r5, r6, r7, lr}
- ldr r3, .L3655
- ldr r5, [r3, #508]
- cbz r5, .L3654
+ ldr r3, .L3695
+ ldr r5, [r3, #512]
+ cbz r5, .L3694
ldrh r7, [r5, #10]
movs r3, #0
-.L3651:
+.L3691:
cmp r3, r7
- bcs .L3654
+ bcs .L3694
add r6, r5, r3, lsl #3
ldrh r4, [r6, #16]
cmp r4, r0
- bne .L3652
+ bne .L3692
ldrh r3, [r6, #20]
mov r0, r1
cmp r2, r3
@@ -22608,15 +22943,15 @@ rk_ftl_vendor_read:
bl memcpy
mov r0, r4
pop {r3, r4, r5, r6, r7, pc}
-.L3652:
+.L3692:
adds r3, r3, #1
- b .L3651
-.L3654:
+ b .L3691
+.L3694:
mov r0, #-1
pop {r3, r4, r5, r6, r7, pc}
-.L3656:
+.L3696:
.align 2
-.L3655:
+.L3695:
.word .LANCHOR4
.fnend
.size rk_ftl_vendor_read, .-rk_ftl_vendor_read
@@ -22632,49 +22967,49 @@ rk_ftl_vendor_write:
push {r4, r5, r6, r7, r8, r9, r10, fp, lr}
.save {r4, r5, r6, r7, r8, r9, r10, fp, lr}
mov r9, r2
- ldr r2, .L3679
+ ldr r2, .L3719
.pad #28
sub sp, sp, #28
mov ip, r0
mov r3, r1
- ldr r4, [r2, #508]
+ ldr r4, [r2, #512]
cmp r4, #0
- beq .L3672
- add r6, r9, #63
+ beq .L3712
+ add r7, r9, #63
ldrh r1, [r4, #8]
ldrh r2, [r4, #10]
- bic r6, r6, #63
- movs r7, #0
+ bic r7, r7, #63
+ movs r6, #0
str r1, [sp, #4]
-.L3659:
- cmp r7, r2
- bcs .L3677
- add r5, r4, r7, lsl #3
+.L3699:
+ cmp r6, r2
+ bcs .L3717
+ add r5, r4, r6, lsl #3
ldrh r1, [r5, #16]
cmp r1, ip
- bne .L3660
+ bne .L3700
ldrh r1, [r5, #20]
add fp, r4, #1024
adds r1, r1, #63
bic r1, r1, #63
str r1, [sp, #8]
cmp r9, r1
- bls .L3661
+ bls .L3701
ldrh r1, [r4, #14]
- cmp r1, r6
- bcc .L3672
+ cmp r1, r7
+ bcc .L3712
ldrh r8, [r5, #18]
subs r2, r2, #1
str r2, [sp, #12]
-.L3662:
+.L3702:
ldr r2, [sp, #12]
adds r5, r5, #8
- cmp r7, r2
- bcs .L3678
+ cmp r6, r2
+ bcs .L3718
ldrh r2, [r5, #16]
add r0, fp, r8
ldrh r1, [r5, #18]
- adds r7, r7, #1
+ adds r6, r6, #1
strh r8, [r5, #10] @ movhi
strh r2, [r5, #8] @ movhi
add r1, r1, fp
@@ -22689,49 +23024,49 @@ rk_ftl_vendor_write:
bl memcpy
ldr r3, [sp, #20]
ldr ip, [sp, #16]
- b .L3662
-.L3678:
- add r7, r4, r7, lsl #3
- uxth r5, r8
- add r0, fp, r5
+ b .L3702
+.L3718:
+ add r6, r4, r6, lsl #3
+ uxth r8, r8
+ add r0, fp, r8
mov r1, r3
- strh r5, [r7, #18] @ movhi
+ strh r8, [r6, #18] @ movhi
mov r2, r9
- strh ip, [r7, #16] @ movhi
- uxth r6, r6
- strh r9, [r7, #20] @ movhi
- add r5, r5, r6
+ strh ip, [r6, #16] @ movhi
+ uxth r7, r7
+ strh r9, [r6, #20] @ movhi
+ add r8, r8, r7
bl memcpy
- ldrh r2, [r4, #14]
- strh r5, [r4, #12] @ movhi
+ ldrh r5, [r4, #14]
ldr r3, [sp, #8]
- add r3, r3, r2
- subs r6, r3, r6
- strh r6, [r4, #14] @ movhi
- b .L3676
-.L3661:
+ strh r8, [r4, #12] @ movhi
+ add r3, r3, r5
+ subs r7, r3, r7
+ strh r7, [r4, #14] @ movhi
+ b .L3716
+.L3701:
ldrh r0, [r5, #18]
mov r1, r3
mov r2, r9
add r0, r0, fp
bl memcpy
strh r9, [r5, #20] @ movhi
- b .L3676
-.L3660:
- adds r7, r7, #1
- b .L3659
-.L3677:
+ b .L3716
+.L3700:
+ adds r6, r6, #1
+ b .L3699
+.L3717:
ldrh r1, [r4, #14]
- cmp r1, r6
- bcc .L3672
+ cmp r1, r7
+ bcc .L3712
add r2, r4, r2, lsl #3
- uxth r6, r6
- subs r1, r1, r6
+ uxth r7, r7
+ subs r1, r1, r7
strh ip, [r2, #16] @ movhi
ldrh r0, [r4, #12]
strh r9, [r2, #20] @ movhi
strh r0, [r2, #18] @ movhi
- add r0, r0, r6
+ add r0, r0, r7
strh r1, [r4, #14] @ movhi
mov r1, r3
strh r0, [r4, #12] @ movhi
@@ -22743,12 +23078,14 @@ rk_ftl_vendor_write:
ldrh r3, [r4, #10]
adds r3, r3, #1
strh r3, [r4, #10] @ movhi
-.L3676:
+.L3716:
ldr r3, [r4, #4]
movw r2, #65532
+ movs r1, #128
adds r3, r3, #1
str r3, [r4, #4]
str r3, [r4, r2]
+ mov r2, r4
ldrh r3, [r4, #8]
adds r3, r3, #1
uxth r3, r3
@@ -22756,25 +23093,20 @@ rk_ftl_vendor_write:
it hi
movhi r3, #0
strh r3, [r4, #8] @ movhi
- bl rknand_device_lock
- movs r2, #128
- movs r0, #16
ldr r3, [sp, #4]
- lsls r1, r3, #7
- mov r3, r4
- bl FtlWrite
- bl rknand_device_unlock
+ lsls r0, r3, #7
+ bl FlashBootVendorWrite
movs r0, #0
- b .L3658
-.L3672:
+ b .L3698
+.L3712:
mov r0, #-1
-.L3658:
+.L3698:
add sp, sp, #28
@ sp needed
pop {r4, r5, r6, r7, r8, r9, r10, fp, pc}
-.L3680:
+.L3720:
.align 2
-.L3679:
+.L3719:
.word .LANCHOR4
.fnend
.size rk_ftl_vendor_write, .-rk_ftl_vendor_write
@@ -22787,44 +23119,42 @@ rk_ftl_vendor_storage_ioctl:
.fnstart
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 0, uses_anonymous_args = 0
- ldr r3, .L3697
push {r4, r5, r6, lr}
.save {r4, r5, r6, lr}
+ mov r0, #4096
mov r6, r1
- ldr r0, [r3, #48]
mov r5, r2
- ldr r1, .L3697+4
- bl kmem_cache_alloc
+ bl ftl_malloc
mov r4, r0
cmp r0, #0
- beq .L3690
- ldr r3, .L3697+8
+ beq .L3730
+ ldr r3, .L3737
cmp r6, r3
- beq .L3684
+ beq .L3724
adds r3, r3, #1
cmp r6, r3
- beq .L3685
- b .L3696
-.L3684:
+ beq .L3725
+ b .L3736
+.L3724:
mov r1, r5
movs r2, #8
bl rk_copy_from_user
cmp r0, #0
- bne .L3696
+ bne .L3736
ldr r2, [r4]
- ldr r3, .L3697+12
+ ldr r3, .L3737+4
cmp r2, r3
- beq .L3687
-.L3688:
+ beq .L3727
+.L3728:
mov r5, #-1
- b .L3683
-.L3687:
+ b .L3723
+.L3727:
ldrh r0, [r4, #4]
add r1, r4, #8
ldrh r2, [r4, #6]
bl rk_ftl_vendor_read
adds r3, r0, #1
- beq .L3688
+ beq .L3728
uxth r2, r0
strh r0, [r4, #6] @ movhi
mov r1, r4
@@ -22835,47 +23165,45 @@ rk_ftl_vendor_storage_ioctl:
ite eq
moveq r5, #0
mvnne r5, #13
- b .L3683
-.L3685:
+ b .L3723
+.L3725:
mov r1, r5
movs r2, #8
bl rk_copy_from_user
- cbnz r0, .L3696
+ cbnz r0, .L3736
ldr r2, [r4]
- ldr r3, .L3697+12
+ ldr r3, .L3737+4
cmp r2, r3
- bne .L3688
+ bne .L3728
ldrh r2, [r4, #6]
movw r3, #4087
cmp r2, r3
- bhi .L3688
+ bhi .L3728
mov r0, r4
mov r1, r5
adds r2, r2, #8
bl rk_copy_from_user
- cbnz r0, .L3696
+ cbnz r0, .L3736
ldrh r0, [r4, #4]
add r1, r4, #8
ldrh r2, [r4, #6]
bl rk_ftl_vendor_write
mov r5, r0
- b .L3683
-.L3696:
+ b .L3723
+.L3736:
mvn r5, #13
-.L3683:
+.L3723:
mov r0, r4
bl kfree
- b .L3682
-.L3690:
+ b .L3722
+.L3730:
mov r5, #-1
-.L3682:
+.L3722:
mov r0, r5
pop {r4, r5, r6, pc}
-.L3698:
+.L3738:
.align 2
-.L3697:
- .word kmalloc_caches
- .word 37748928
+.L3737:
.word 1074034177
.word 1448232273
.fnend
@@ -22910,7 +23238,6 @@ rk_ftl_vendor_storage_ioctl:
.global random_seed
.global gSlcNandParaInfo
.global gNandParaInfo
- .global NandFlashParaTbl
.global g_page_map_check_enable
.global g_power_lost_ecc_error_blk
.global g_power_lost_recovery_flag
@@ -23123,9 +23450,9 @@ rk_ftl_vendor_storage_ioctl:
.section .rodata
.align 2
.LANCHOR3 = . + 0
- .type __func__.21081, %object
- .size __func__.21081, 11
-__func__.21081:
+ .type __func__.17344, %object
+ .size __func__.17344, 11
+__func__.17344:
.ascii "FtlMemInit\000"
.LC0:
.byte 60
@@ -23133,14 +23460,14 @@ __func__.21081:
.byte 24
.byte 16
.space 1
- .type __func__.22011, %object
- .size __func__.22011, 21
-__func__.22011:
+ .type __func__.18293, %object
+ .size __func__.18293, 21
+__func__.18293:
.ascii "FtlVpcCheckAndModify\000"
.space 3
- .type __func__.21152, %object
- .size __func__.21152, 8
-__func__.21152:
+ .type __func__.17417, %object
+ .size __func__.17417, 8
+__func__.17417:
.ascii "FtlInit\000"
.section .rodata.str1.1,"aMS",%progbits,1
.LC1:
@@ -23151,360 +23478,371 @@ __func__.21152:
.LC3:
.ascii "remove_from_free_sys_Queue %x\012\000"
.LC4:
- .ascii "FLASH INFO:\012\000"
+ .ascii "FtlFreeSysBlkQueueOut free count = %d\012\000"
.LC5:
- .ascii "FLASH ID: %x\012\000"
+ .ascii "FtlFreeSysBlkQueueOut = %x, free count = %d, error\012"
+ .ascii "\000"
.LC6:
- .ascii "Device Capacity: %d MB\012\000"
+ .ascii "FtlFreeSysBlkQueueOut = %x, free count = %d\012\000"
.LC7:
- .ascii "FMWAIT: %x %x %x %x\012\000"
+ .ascii "FLASH INFO:\012\000"
.LC8:
- .ascii "FTL INFO:\012\000"
+ .ascii "FLASH ID: %x\012\000"
.LC9:
- .ascii "g_MaxLpn = 0x%x\012\000"
+ .ascii "Device Capacity: %d MB\012\000"
.LC10:
- .ascii "g_VaildLpn = 0x%x\012\000"
+ .ascii "FMWAIT: %x %x %x %x\012\000"
.LC11:
- .ascii "read_page_count = 0x%x\012\000"
+ .ascii "FTL INFO:\012\000"
.LC12:
- .ascii "discard_page_count = 0x%x\012\000"
+ .ascii "g_MaxLpn = 0x%x\012\000"
.LC13:
- .ascii "write_page_count = 0x%x\012\000"
+ .ascii "g_VaildLpn = 0x%x\012\000"
.LC14:
- .ascii "cache_write_count = 0x%x\012\000"
+ .ascii "read_page_count = 0x%x\012\000"
.LC15:
- .ascii "l2p_write_count = 0x%x\012\000"
+ .ascii "discard_page_count = 0x%x\012\000"
.LC16:
- .ascii "gc_page_count = 0x%x\012\000"
+ .ascii "write_page_count = 0x%x\012\000"
.LC17:
- .ascii "totle_write = %d MB\012\000"
+ .ascii "cache_write_count = 0x%x\012\000"
.LC18:
- .ascii "totle_read = %d MB\012\000"
+ .ascii "l2p_write_count = 0x%x\012\000"
.LC19:
- .ascii "GSV = 0x%x\012\000"
+ .ascii "gc_page_count = 0x%x\012\000"
.LC20:
- .ascii "GDV = 0x%x\012\000"
+ .ascii "totle_write = %d MB\012\000"
.LC21:
- .ascii "bad blk num = %d %d\012\000"
+ .ascii "totle_read = %d MB\012\000"
.LC22:
- .ascii "free_superblocks = 0x%x\012\000"
+ .ascii "GSV = 0x%x\012\000"
.LC23:
- .ascii "mlc_EC = 0x%x\012\000"
+ .ascii "GDV = 0x%x\012\000"
.LC24:
- .ascii "slc_EC = 0x%x\012\000"
+ .ascii "bad blk num = %d %d\012\000"
.LC25:
- .ascii "avg_EC = 0x%x\012\000"
+ .ascii "free_superblocks = 0x%x\012\000"
.LC26:
- .ascii "sys_EC = 0x%x\012\000"
+ .ascii "mlc_EC = 0x%x\012\000"
.LC27:
- .ascii "max_EC = 0x%x\012\000"
+ .ascii "slc_EC = 0x%x\012\000"
.LC28:
- .ascii "min_EC = 0x%x\012\000"
+ .ascii "avg_EC = 0x%x\012\000"
.LC29:
- .ascii "PLT = 0x%x\012\000"
+ .ascii "sys_EC = 0x%x\012\000"
.LC30:
- .ascii "POT = 0x%x\012\000"
+ .ascii "max_EC = 0x%x\012\000"
.LC31:
- .ascii "MaxSector = 0x%x\012\000"
+ .ascii "min_EC = 0x%x\012\000"
.LC32:
- .ascii "init_sys_blks_pp = 0x%x\012\000"
+ .ascii "PLT = 0x%x\012\000"
.LC33:
- .ascii "sys_blks_pp = 0x%x\012\000"
+ .ascii "POT = 0x%x\012\000"
.LC34:
- .ascii "free sysblock = 0x%x\012\000"
+ .ascii "MaxSector = 0x%x\012\000"
.LC35:
- .ascii "data_blks_pp = 0x%x\012\000"
+ .ascii "init_sys_blks_pp = 0x%x\012\000"
.LC36:
- .ascii "data_op_blks_pp = 0x%x\012\000"
+ .ascii "sys_blks_pp = 0x%x\012\000"
.LC37:
- .ascii "max_data_blks = 0x%x\012\000"
+ .ascii "free sysblock = 0x%x\012\000"
.LC38:
- .ascii "Sys.id = 0x%x\012\000"
+ .ascii "data_blks_pp = 0x%x\012\000"
.LC39:
- .ascii "Bbt.id = 0x%x\012\000"
+ .ascii "data_op_blks_pp = 0x%x\012\000"
.LC40:
- .ascii "ACT.page = 0x%x\012\000"
+ .ascii "max_data_blks = 0x%x\012\000"
.LC41:
- .ascii "ACT.plane = 0x%x\012\000"
+ .ascii "Sys.id = 0x%x\012\000"
.LC42:
- .ascii "ACT.id = 0x%x\012\000"
+ .ascii "Bbt.id = 0x%x\012\000"
.LC43:
- .ascii "ACT.mode = 0x%x\012\000"
+ .ascii "ACT.page = 0x%x\012\000"
.LC44:
- .ascii "ACT.a_pages = 0x%x\012\000"
+ .ascii "ACT.plane = 0x%x\012\000"
.LC45:
- .ascii "ACT VPC = 0x%x\012\000"
+ .ascii "ACT.id = 0x%x\012\000"
.LC46:
- .ascii "BUF.page = 0x%x\012\000"
+ .ascii "ACT.mode = 0x%x\012\000"
.LC47:
- .ascii "BUF.plane = 0x%x\012\000"
+ .ascii "ACT.a_pages = 0x%x\012\000"
.LC48:
- .ascii "BUF.id = 0x%x\012\000"
+ .ascii "ACT VPC = 0x%x\012\000"
.LC49:
- .ascii "BUF.mode = 0x%x\012\000"
+ .ascii "BUF.page = 0x%x\012\000"
.LC50:
- .ascii "BUF.a_pages = 0x%x\012\000"
+ .ascii "BUF.plane = 0x%x\012\000"
.LC51:
- .ascii "BUF VPC = 0x%x\012\000"
+ .ascii "BUF.id = 0x%x\012\000"
.LC52:
- .ascii "TMP.page = 0x%x\012\000"
+ .ascii "BUF.mode = 0x%x\012\000"
.LC53:
- .ascii "TMP.plane = 0x%x\012\000"
+ .ascii "BUF.a_pages = 0x%x\012\000"
.LC54:
- .ascii "TMP.id = 0x%x\012\000"
+ .ascii "BUF VPC = 0x%x\012\000"
.LC55:
- .ascii "TMP.mode = 0x%x\012\000"
+ .ascii "TMP.page = 0x%x\012\000"
.LC56:
- .ascii "TMP.a_pages = 0x%x\012\000"
+ .ascii "TMP.plane = 0x%x\012\000"
.LC57:
- .ascii "GC.page = 0x%x\012\000"
+ .ascii "TMP.id = 0x%x\012\000"
.LC58:
- .ascii "GC.plane = 0x%x\012\000"
+ .ascii "TMP.mode = 0x%x\012\000"
.LC59:
- .ascii "GC.id = 0x%x\012\000"
+ .ascii "TMP.a_pages = 0x%x\012\000"
.LC60:
- .ascii "GC.mode = 0x%x\012\000"
+ .ascii "GC.page = 0x%x\012\000"
.LC61:
- .ascii "GC.a_pages = 0x%x\012\000"
+ .ascii "GC.plane = 0x%x\012\000"
.LC62:
- .ascii "WR_CHK = 0x%x %x %x %x\012\000"
+ .ascii "GC.id = 0x%x\012\000"
.LC63:
- .ascii "Read Err Cnt = 0x%x\012\000"
+ .ascii "GC.mode = 0x%x\012\000"
.LC64:
- .ascii "Prog Err Cnt = 0x%x\012\000"
+ .ascii "GC.a_pages = 0x%x\012\000"
.LC65:
- .ascii "gc_free_blk_th= 0x%x\012\000"
+ .ascii "WR_CHK = 0x%x %x %x %x\012\000"
.LC66:
- .ascii "gc_merge_free_blk_th= 0x%x\012\000"
+ .ascii "Read Err Cnt = 0x%x\012\000"
.LC67:
- .ascii "gc_skip_write_count= 0x%x\012\000"
+ .ascii "Prog Err Cnt = 0x%x\012\000"
.LC68:
- .ascii "gc_blk_index= 0x%x\012\000"
+ .ascii "gc_free_blk_th= 0x%x\012\000"
.LC69:
- .ascii "free min EC= 0x%x\012\000"
+ .ascii "gc_merge_free_blk_th= 0x%x\012\000"
.LC70:
- .ascii "free max EC= 0x%x\012\000"
+ .ascii "gc_skip_write_count= 0x%x\012\000"
.LC71:
- .ascii "GC__SB VPC = 0x%x\012\000"
+ .ascii "gc_blk_index= 0x%x\012\000"
.LC72:
- .ascii "%d. [0x%x]=0x%x 0x%x 0x%x\012\000"
+ .ascii "free min EC= 0x%x\012\000"
.LC73:
- .ascii "free %d. [0x%x] 0x%x 0x%x\012\000"
+ .ascii "free max EC= 0x%x\012\000"
.LC74:
- .ascii "%s\012\000"
+ .ascii "GC__SB VPC = 0x%x\012\000"
.LC75:
- .ascii "FTL version: 5.0.47 20171213\000"
+ .ascii "%d. [0x%x]=0x%x 0x%x 0x%x\012\000"
.LC76:
- .ascii "swblk %x ,avg = %x max= %x vpc= %x,ec=%x ,max ec=%x"
- .ascii "\012\000"
+ .ascii "free %d. [0x%x] 0x%x 0x%x\012\000"
.LC77:
- .ascii "FtlGcRefreshBlock 0x%x\012\000"
+ .ascii "%s\012\000"
.LC78:
- .ascii "FtlGcMarkBadPhyBlk %d 0x%x\012\000"
+ .ascii "FTL version: 5.0.48 20180528\000"
.LC79:
- .ascii "%s error allocating memory. return -1\012\000"
+ .ascii "swblk %x ,avg = %x max= %x vpc= %x,ec=%x ,max ec=%x"
+ .ascii "\012\000"
.LC80:
- .ascii "%s 0x%x:\000"
+ .ascii "FtlGcRefreshBlock 0x%x\012\000"
.LC81:
- .ascii "%x \000"
+ .ascii "FtlGcMarkBadPhyBlk %d 0x%x\012\000"
.LC82:
- .ascii "\000"
+ .ascii "%s error allocating memory. return -1\012\000"
.LC83:
- .ascii "otp error! %d\000"
+ .ascii "%s %p:0x%x:\000"
.LC84:
- .ascii "rr\000"
+ .ascii "%x \000"
.LC85:
- .ascii "%d statReg->V6.mtrans_cnt=%d flReg.V6.page_num=%d\012"
.ascii "\000"
.LC86:
- .ascii "nandc:\000"
+ .ascii "otp error! %d\000"
.LC87:
- .ascii "%d flReg.d32=%x %x\012\000"
+ .ascii "rr\000"
.LC88:
- .ascii "sdr read ok %x ecc=%d\012\000"
+ .ascii "%d statReg->V6.mtrans_cnt=%d flReg.V6.page_num=%d\012"
+ .ascii "\000"
.LC89:
- .ascii "sync para %d\012\000"
+ .ascii "nandc:\000"
.LC90:
- .ascii "TOG mode Read error %x %x\012\000"
+ .ascii "%d flReg.d32=%x %x\012\000"
.LC91:
- .ascii "read retry status %x %x %x\012\000"
+ .ascii "sdr read ok %x ecc=%d\012\000"
.LC92:
- .ascii "micron RR %d row=%x,count %d,status=%d\012\000"
+ .ascii "sync para %d\012\000"
.LC93:
- .ascii "ECC:%d\012\000"
+ .ascii "TOG mode Read error %x %x\012\000"
.LC94:
- .ascii "No.%d FLASH ID:%x %x %x %x %x %x\012\000"
+ .ascii "read retry status %x %x %x\012\000"
.LC95:
- .ascii "FlashLoadPhyInfo fail %x!!\012\000"
+ .ascii "micron RR %d row=%x,count %d,status=%d\012\000"
.LC96:
- .ascii "Read pageadd=%x ecc=%x err=%x\012\000"
+ .ascii "ECC:%d\012\000"
.LC97:
- .ascii "data:\000"
+ .ascii "No.%d FLASH ID:%x %x %x %x %x %x\012\000"
.LC98:
- .ascii "spare:\000"
+ .ascii "FlashLoadPhyInfo fail %x!!\012\000"
.LC99:
- .ascii "ReadRetry pageadd=%x ecc=%x err=%x\012\000"
+ .ascii "Read pageadd=%x ecc=%x err=%x\012\000"
.LC100:
- .ascii "FLFB:%d %d\012\000"
+ .ascii "data:\000"
.LC101:
- .ascii "prog error: = %x\012\000"
+ .ascii "spare:\000"
.LC102:
- .ascii "prog read error: = %x\012\000"
+ .ascii "ReadRetry pageadd=%x ecc=%x err=%x\012\000"
.LC103:
- .ascii "prog read s error: = %x %x %x\012\000"
+ .ascii "FLFB:%d %d\012\000"
.LC104:
- .ascii "prog read d error: = %x %x %x\012\000"
+ .ascii "prog error: = %x\012\000"
.LC105:
- .ascii "FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000"
+ .ascii "prog read error: = %x\012\000"
.LC106:
- .ascii "FlashMakeFactorBbt %d\012\000"
+ .ascii "prog read s error: = %x %x %x\012\000"
.LC107:
- .ascii "bad block:%d %d\012\000"
+ .ascii "prog read d error: = %x %x %x\012\000"
.LC108:
- .ascii "FMFB:%d %d\012\000"
+ .ascii "FtlGcScanTempBlkError ID %x %x!!!!!!!\012\000"
.LC109:
- .ascii "E:bad block:%d\012\000"
+ .ascii "FlashMakeFactorBbt %d\012\000"
.LC110:
- .ascii "FMFB:Save %d %d\012\000"
+ .ascii "bad block:%d %d\012\000"
.LC111:
- .ascii "FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
+ .ascii "FMFB:%d %d\012\000"
.LC112:
- .ascii "FtlBbmTblFlush error:%x\012\000"
+ .ascii "E:bad block:%d\012\000"
.LC113:
- .ascii "FtlBbmTblFlush error = %x error count = %d\012\000"
+ .ascii "FMFB:Save %d %d\012\000"
.LC114:
- .ascii "FtlGcFreeBadSuperBlk 0x%x\012\000"
+ .ascii "FtlBbmTblFlush id=%x,page=%x,previd=%x cnt=%d\012\000"
.LC115:
- .ascii "decrement_vpc_count %x = %d\012\000"
+ .ascii "FtlBbmTblFlush error:%x\012\000"
.LC116:
- .ascii "FtlVpcTblFlush error = %x error count = %d\012\000"
+ .ascii "FtlBbmTblFlush error = %x error count = %d\012\000"
.LC117:
- .ascii "ftl_map_blk_gc blk info: %x %x %x\012\000"
+ .ascii "FtlGcFreeBadSuperBlk 0x%x\012\000"
.LC118:
- .ascii "page map lost: %x %x\012\000"
+ .ascii "decrement_vpc_count %x = %d\012\000"
.LC119:
- .ascii "FtlMapWritePage error = %x\012\000"
+ .ascii "FtlVpcTblFlush error = %x error count = %d\012\000"
.LC120:
- .ascii "FtlMapWritePage error = %x error count = %d\012\000"
+ .ascii "ftl_map_blk_gc blk info: %x %x %x\012\000"
.LC121:
- .ascii "load_l2p_region refresh = %x phyAddr = %x\012\000"
+ .ascii "page map lost: %x %x\012\000"
.LC122:
- .ascii "page map lost %x %x %x %x\012\000"
+ .ascii "FtlMapWritePage error = %x\012\000"
.LC123:
- .ascii "FtlVendorPartRead refresh = %x phyAddr = %x\012\000"
+ .ascii "FtlMapWritePage error = %x error count = %d\012\000"
.LC124:
- .ascii "no ect\000"
+ .ascii "page map lost %x %x %x %x\012\000"
.LC125:
- .ascii "slc mode\000"
+ .ascii "load_l2p_region refresh = %x phyAddr = %x\012\000"
.LC126:
- .ascii "RSB refresh addr %x\012\000"
+ .ascii "FtlVendorPartRead refresh = %x phyAddr = %x\012\000"
.LC127:
- .ascii "spuer block %x vpn is 0\012 \000"
+ .ascii "no ect\000"
.LC128:
- .ascii "g_recovery_ppa %x ver %x\012 \000"
+ .ascii "slc mode\000"
.LC129:
- .ascii "...%s enter...\012\000"
+ .ascii "RSB refresh addr %x\012\000"
.LC130:
- .ascii "FtlCheckVpc %x = %x %x\012\000"
+ .ascii "spuer block %x vpn is 0\012 \000"
.LC131:
- .ascii "%d GC datablk = %x vpc %x %x\012\000"
+ .ascii "g_recovery_ppa %x ver %x\012 \000"
.LC132:
- .ascii "SWL %x, FSB = %x vpc= %x,ec=%x th=%x\012\000"
+ .ascii "...%s enter...\012\000"
.LC133:
- .ascii "Ftlwrite decrement_vpc_count %x = %d\012\000"
+ .ascii "FtlCheckVpc %x = %x %x\012\000"
.LC134:
- .ascii "GC des block %x done\012\000"
+ .ascii "%d GC datablk = %x vpc %x %x\012\000"
.LC135:
- .ascii "fix power lost blk = %x vpc=%x\012\000"
+ .ascii "SWL %x, FSB = %x vpc= %x,ec=%x th=%x\012\000"
.LC136:
- .ascii "erase power lost blk = %x vpc=%x\012\000"
+ .ascii "Ftlwrite decrement_vpc_count %x = %d\012\000"
.LC137:
- .ascii "...%s: no bad block mapping table, format device\012"
- .ascii "\000"
+ .ascii "rk_ftl_de_init %x\012\000"
.LC138:
- .ascii "...%s FtlSysBlkInit error ,format device!\012\000"
+ .ascii "GC des block %x done\012\000"
.LC139:
- .ascii "FtlInit %x\012\000"
+ .ascii "...%s: no bad block mapping table, format device\012"
+ .ascii "\000"
.LC140:
- .ascii "FtlWrite: lpa error:%x %x\012\000"
+ .ascii "...%s FtlSysBlkInit error ,format device!\012\000"
.LC141:
- .ascii "BBT:\000"
+ .ascii "FtlInit %x\012\000"
.LC142:
- .ascii "IdBlockReadData %x %x\012\000"
+ .ascii "fix power lost blk = %x vpc=%x\012\000"
.LC143:
- .ascii "IdBlockReadData %x %x ret= %x\012\000"
+ .ascii "erase power lost blk = %x vpc=%x\012\000"
.LC144:
- .ascii "IDBlockWriteData %x %x\012\000"
+ .ascii "FtlWrite: lpa error:%x %x\012\000"
.LC145:
- .ascii "IDBlockWriteData %x %x ret= %x\012\000"
+ .ascii "BBT:\000"
.LC146:
- .ascii "idblk:\000"
+ .ascii "IdBlockReadData %x %x\012\000"
.LC147:
- .ascii "idb reverse %x %x\012\000"
+ .ascii "IdBlockReadData %x %x ret= %x\012\000"
.LC148:
- .ascii "write_idblock totle_sec %x %x\012\000"
+ .ascii "write_idblock fix data %x %x\012\000"
.LC149:
- .ascii "write and check error:%d idb=%x,offset=%x,r=%x,w=%x"
- .ascii "\012\000"
+ .ascii "idblk:\000"
.LC150:
- .ascii "write\000"
+ .ascii "idb reverse %x %x\012\000"
.LC151:
- .ascii "read\000"
+ .ascii "write_idblock totle_sec %x %x %x %x\012\000"
.LC152:
- .ascii "write_idblock error\012\000"
+ .ascii "IDBlockWriteData %x %x\012\000"
.LC153:
- .ascii "READ_SECTOR_IO\012\000"
+ .ascii "IDBlockWriteData %x %x ret= %x\012\000"
.LC154:
- .ascii "rk_copy_from_user error\012\000"
+ .ascii "write and check error:%d idb=%x,offset=%x,r=%x,w=%x"
+ .ascii "\012\000"
.LC155:
- .ascii "READ_SECTOR_IO %x %x\012\000"
+ .ascii "write\000"
.LC156:
- .ascii "rk_copy_to_user error\012\000"
+ .ascii "read\000"
.LC157:
- .ascii "WRITE_SECTOR_IO\012\000"
+ .ascii "write_idblock error %d\012\000"
.LC158:
- .ascii "WRITE_SECTOR_IO %x %x\012\000"
+ .ascii "READ_SECTOR_IO\012\000"
.LC159:
- .ascii "END_WRITE_SECTOR_IO\012\000"
+ .ascii "rk_copy_from_user error\012\000"
.LC160:
- .ascii "END_WRITE_SECTOR_IO %x %x\012\000"
+ .ascii "READ_SECTOR_IO %x %x\012\000"
.LC161:
- .ascii "GET_FLASH_INFO_IO\012\000"
+ .ascii "rk_copy_to_user error\012\000"
.LC162:
- .ascii "GET_BAD_BLOCK_IO\012\000"
+ .ascii "WRITE_SECTOR_IO\012\000"
.LC163:
- .ascii "bbt:\000"
+ .ascii "WRITE_SECTOR_IO %x %x\012\000"
.LC164:
- .ascii "GET_LOCK_FLAG_IO\012\000"
+ .ascii "END_WRITE_SECTOR_IO\012\000"
.LC165:
- .ascii "GET_PUBLIC_KEY_IO\012\000"
+ .ascii "END_WRITE_SECTOR_IO %x %x\012\000"
.LC166:
- .ascii "RKNAND_GET_DRM_KEY\012\000"
+ .ascii "GET_FLASH_INFO_IO\012\000"
.LC167:
- .ascii "RKNAND_STORE_DRM_KEY\012\000"
+ .ascii "GET_BAD_BLOCK_IO\012\000"
.LC168:
- .ascii "RKNAND_DIASBLE_SECURE_BOOT\012\000"
+ .ascii "bbt:\000"
.LC169:
- .ascii "RKNAND_ENASBLE_SECURE_BOOT\012\000"
+ .ascii "GET_LOCK_FLAG_IO\012\000"
.LC170:
- .ascii "RKNAND_GET_SN_SECTOR\012\000"
+ .ascii "GET_PUBLIC_KEY_IO\012\000"
.LC171:
- .ascii "RKNAND_LOADER_UNLOCK\012\000"
+ .ascii "RKNAND_GET_DRM_KEY\012\000"
.LC172:
- .ascii "RKNAND_LOADER_STATUS\012\000"
+ .ascii "RKNAND_STORE_DRM_KEY\012\000"
.LC173:
- .ascii "RKNAND_LOADER_LOCK\012\000"
+ .ascii "RKNAND_DIASBLE_SECURE_BOOT\012\000"
.LC174:
- .ascii "LockKey not match %d\012\000"
+ .ascii "RKNAND_ENASBLE_SECURE_BOOT\012\000"
.LC175:
- .ascii "RKNAND_GET_VENDOR_SECTOR\012\000"
+ .ascii "RKNAND_GET_SN_SECTOR\012\000"
.LC176:
- .ascii "RKNAND_STORE_VENDOR_SECTOR\012\000"
+ .ascii "RKNAND_LOADER_UNLOCK\012\000"
.LC177:
- .ascii "return ret = %lx\012\000"
+ .ascii "RKNAND_LOADER_STATUS\012\000"
.LC178:
- .ascii "secureBootEn check error\012\000"
+ .ascii "RKNAND_LOADER_LOCK\012\000"
.LC179:
+ .ascii "LockKey not match %d\012\000"
+.LC180:
+ .ascii "RKNAND_GET_VENDOR_SECTOR\012\000"
+.LC181:
+ .ascii "RKNAND_STORE_VENDOR_SECTOR\012\000"
+.LC182:
+ .ascii "return ret = %lx\012\000"
+.LC183:
+ .ascii "secureBootEn check error\012\000"
+.LC184:
.ascii "\0013vendor storage %x,%x,%x\012\000"
.data
.align 2
@@ -23896,7 +24234,7 @@ SamsungRefValue:
gFtlInitStatus:
.word -1
.type NandFlashParaTbl, %object
- .size NandFlashParaTbl, 2304
+ .size NandFlashParaTbl, 2368
NandFlashParaTbl:
.byte 6
.byte 44
@@ -24394,6 +24732,32 @@ NandFlashParaTbl:
.space 4
.byte 5
.byte 44
+ .byte -124
+ .byte 68
+ .byte 50
+ .byte -86
+ .byte 0
+ .byte 4
+ .byte 1
+ .byte 32
+ .short 512
+ .byte 2
+ .byte 1
+ .short 2184
+ .short 1479
+ .byte 5
+ .byte 19
+ .byte 60
+ .byte 32
+ .byte 1
+ .byte 0
+ .byte 1
+ .byte 0
+ .byte 1
+ .byte 0
+ .space 4
+ .byte 5
+ .byte 44
.byte 100
.byte 68
.byte 50
@@ -24406,7 +24770,7 @@ NandFlashParaTbl:
.byte 2
.byte 1
.short 1048
- .short 1503
+ .short 1479
.byte 5
.byte 19
.byte 60
@@ -24757,6 +25121,32 @@ NandFlashParaTbl:
.byte 0
.space 4
.byte 6
+ .byte -83
+ .byte -43
+ .byte -108
+ .byte -102
+ .byte 116
+ .byte 66
+ .byte 2
+ .byte 1
+ .byte 16
+ .short 256
+ .byte 2
+ .byte 1
+ .short 1024
+ .short 273
+ .byte 1
+ .byte 0
+ .byte 24
+ .byte 32
+ .byte 4
+ .byte 1
+ .byte 3
+ .byte 0
+ .byte 0
+ .byte 0
+ .space 4
+ .byte 6
.byte -119
.byte 100
.byte 68
@@ -25498,7 +25888,7 @@ NandFlashParaTbl:
.byte 2
.byte 2
.short 2106
- .short 1497
+ .short 473
.byte 2
.byte 68
.byte 40
@@ -25524,7 +25914,7 @@ NandFlashParaTbl:
.byte 2
.byte 2
.short 1074
- .short 1497
+ .short 473
.byte 2
.byte 68
.byte 40
@@ -26300,6 +26690,10 @@ gNandPhyInfo:
gNandFlashEccBits:
.space 1
.space 3
+ .type g_MaxLbaSector, %object
+ .size g_MaxLbaSector, 4
+g_MaxLbaSector:
+ .space 4
.type FlashWaitBusyScheduleEn, %object
.size FlashWaitBusyScheduleEn, 4
FlashWaitBusyScheduleEn:
@@ -26325,11 +26719,16 @@ read_retry_cur_offset:
.size gFlashInterfaceMode, 1
gFlashInterfaceMode:
.space 1
+ .space 3
+ .type g_nandc_version_data, %object
+ .size g_nandc_version_data, 4
+g_nandc_version_data:
+ .space 4
.type gFlashToggleModeEn, %object
.size gFlashToggleModeEn, 1
gFlashToggleModeEn:
.space 1
- .space 2
+ .space 3
.type gBootDdrMode, %object
.size gBootDdrMode, 4
gBootDdrMode:
@@ -26338,10 +26737,6 @@ gBootDdrMode:
.size gNandcVer, 4
gNandcVer:
.space 4
- .type g_nandc_version_data, %object
- .size g_nandc_version_data, 4
-g_nandc_version_data:
- .space 4
.type gMasterTempBuf, %object
.size gMasterTempBuf, 4
gMasterTempBuf:
@@ -26363,6 +26758,10 @@ gNandcEccBits:
gMultiPageProgEn:
.space 1
.space 3
+ .type g_inkDie_check_enable, %object
+ .size g_inkDie_check_enable, 4
+g_inkDie_check_enable:
+ .space 4
.type c_ftl_nand_sys_blks_per_plane, %object
.size c_ftl_nand_sys_blks_per_plane, 4
c_ftl_nand_sys_blks_per_plane:
@@ -26495,10 +26894,6 @@ c_ftl_nand_map_region_num:
.size c_ftl_nand_l2pmap_ram_region_num, 2
c_ftl_nand_l2pmap_ram_region_num:
.space 2
- .type g_MaxLbaSector, %object
- .size g_MaxLbaSector, 4
-g_MaxLbaSector:
- .space 4
.type g_page_map_check_enable, %object
.size g_page_map_check_enable, 2
g_page_map_check_enable:
@@ -26523,10 +26918,6 @@ req_wr_io:
.size g_MaxLpn, 4
g_MaxLpn:
.space 4
- .type g_cur_erase_blk, %object
- .size g_cur_erase_blk, 4
-g_cur_erase_blk:
- .space 4
.type gBbtInfo, %object
.size gBbtInfo, 60
gBbtInfo:
@@ -26551,10 +26942,10 @@ p_erase_count_table:
.size g_totle_sys_slc_erase_count, 4
g_totle_sys_slc_erase_count:
.space 4
- .type p_sys_data_buf, %object
- .size p_sys_data_buf, 4
-p_sys_data_buf:
- .space 4
+ .type g_sys_save_data, %object
+ .size g_sys_save_data, 48
+g_sys_save_data:
+ .space 48
.type p_data_block_list_table, %object
.size p_data_block_list_table, 4
p_data_block_list_table:
@@ -26617,10 +27008,6 @@ g_VaildLpn:
.size p_blk_mode_table, 4
p_blk_mode_table:
.space 4
- .type g_inkDie_check_enable, %object
- .size g_inkDie_check_enable, 4
-g_inkDie_check_enable:
- .space 4
.type g_totle_read_page_count, %object
.size g_totle_read_page_count, 4
g_totle_read_page_count:
@@ -26681,10 +27068,6 @@ g_max_erase_count:
.size g_min_erase_count, 4
g_min_erase_count:
.space 4
- .type g_sys_save_data, %object
- .size g_sys_save_data, 48
-g_sys_save_data:
- .space 48
.type c_ftl_nand_data_op_blks_per_plane, %object
.size c_ftl_nand_data_op_blks_per_plane, 2
c_ftl_nand_data_op_blks_per_plane:
@@ -26809,6 +27192,10 @@ g_gc_head_data_block:
.size g_gc_head_data_block_count, 4
g_gc_head_data_block_count:
.space 4
+ .type g_cur_erase_blk, %object
+ .size g_cur_erase_blk, 4
+g_cur_erase_blk:
+ .space 4
.type g_gc_refresh_block_temp_num, %object
.size g_gc_refresh_block_temp_num, 2
g_gc_refresh_block_temp_num:
@@ -26830,6 +27217,10 @@ req_gc_dst:
.size req_prgm, 4
req_prgm:
.space 4
+ .type p_sys_data_buf, %object
+ .size p_sys_data_buf, 4
+p_sys_data_buf:
+ .space 4
.type p_sys_data_buf_1, %object
.size p_sys_data_buf_1, 4
p_sys_data_buf_1:
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-05 12:30:09 +0000