arm64: dts: rockchip: rk3399pro-npu: add multi camera board

Change-Id: I3728e806f4d97d03228ce785f553b31032fd471a
Signed-off-by: Weixin Zhou <zwx@rock-chips.com>

2 files changed, 284 insertions, 0 deletions

diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index 2d4be1ecd886..58215a0fd192 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -119,6 +119,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-evb-v11.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-evb-v11-avb.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-evb-v11-linux.dtb
 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-npu-evb-v10.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-npu-evb-v10-multi-cam.dtb
 
 always		:= $(dtb-y)
 subdir-y	:= $(dts-dirs)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399pro-npu-evb-v10-multi-cam.dts b/arch/arm64/boot/dts/rockchip/rk3399pro-npu-evb-v10-multi-cam.dts
new file mode 100644
index 000000000000..b2f96fd68d6f
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3399pro-npu-evb-v10-multi-cam.dts
@@ -0,0 +1,283 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd
+ */
+
+/dts-v1/;
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include "rk3399pro-npu.dtsi"
+#include <dt-bindings/display/drm_mipi_dsi.h>
+
+/ {
+	model = "Rockchip RK3399pro-npu EVB V10 multi cam Board";
+	compatible = "rockchip,rk3399pro-npu-evb-v10-multi-cam", "rockchip,rk3399pro-npu";
+
+	chosen {
+		bootargs = "earlycon=uart8250,mmio32,0xff550000 console=ttyFIQ0 init=/init swiotlb=1 kpti=0";
+	};
+
+	keys: gpio-keys {
+		compatible = "gpio-keys";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pwr_key>;
+
+		power {
+			gpios = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
+			label = "GPIO Power";
+			linux,code = <116>;
+			wakeup-source;
+		};
+	};
+
+	fiq-debugger {
+		compatible = "rockchip,fiq-debugger";
+		rockchip,serial-id = <2>;
+		rockchip,wake-irq = <0>;
+		/* If enable uart uses irq instead of fiq */
+		rockchip,irq-mode-enable = <0>;
+		rockchip,baudrate = <1500000>;  /* Only 115200 and 1500000 */
+		interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&uart2m0_xfer>;
+		status = "okay";
+	};
+
+	vdd_cpu: vdd-cpu {
+		compatible = "regulator-fixed";
+		regulator-name = "vdd_cpu";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <850000>;
+		regulator-max-microvolt = <850000>;
+	};
+
+	vcc5v0_sys: vcc5v0-sys {
+		compatible = "regulator-fixed";
+		regulator-name = "vcc5v0_sys";
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+	};
+
+	display_subsystem: display-subsystem {
+		compatible = "rockchip,display-subsystem";
+		ports = <&vop_lite_out>, <&vop_raw_out>;
+		status = "okay";
+
+		route {
+			route_csi: route-csi {
+				status = "disabled";
+				connect = <&vop_raw_out_csi>;
+			};
+
+			route_dsi: route-dsi {
+				status = "disabled";
+				connect = <&vop_lite_out_dsi>;
+			};
+
+			route_rgb: route-rgb {
+				status = "disabled";
+				connect = <&vop_lite_out_rgb>;
+			};
+		};
+	};
+};
+
+&cpu0 {
+	cpu-supply = <&vdd_cpu>;
+};
+
+&cpu1 {
+	cpu-supply = <&vdd_cpu>;
+};
+
+&dsi {
+	status = "okay";
+
+	panel@0 {
+		compatible = "sitronix,st7703", "simple-panel-dsi";
+		reg = <0>;
+		prepare-delay-ms = <2>;
+		reset-delay-ms = <1>;
+		init-delay-ms = <20>;
+		enable-delay-ms = <120>;
+		disable-delay-ms = <50>;
+		unprepare-delay-ms = <20>;
+
+		width-mm = <68>;
+		height-mm = <121>;
+
+		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+			      MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
+		dsi,format = <MIPI_DSI_FMT_RGB888>;
+		dsi,lanes = <4>;
+
+		panel-init-sequence = [
+			05 fa 01 11
+			39 00 04 b9 f1 12 83
+			39 00 1c ba 33 81 05 f9 0e 0e 00 00 00
+				 00 00 00 00 00 44 25 00 91 0a
+				 00 00 02 4f 01 00 00 37
+			15 00 02 b8 25
+			39 00 04 bf 02 11 00
+			39 00 0b b3 0c 10 0a 50 03 ff 00 00 00
+				 00
+			39 00 0a c0 73 73 50 50 00 00 08 70 00
+			15 00 02 bc 46
+			15 00 02 cc 0b
+			15 00 02 b4 80
+			39 00 04 b2 c8 12 30
+			39 00 0f e3 07 07 0b 0b 03 0b 00 00 00
+				 00 ff 00 c0 10
+			39 00 0d c1 53 00 1e 1e 77 e1 cc dd 67
+				 77 33 33
+			39 00 07 c6 00 00 ff ff 01 ff
+			39 00 03 b5 09 09
+			39 00 03 b6 87 95
+			39 00 40 e9 c2 10 05 05 10 05 a0 12 31
+				 23 3f 81 0a a0 37 18 00 80 01
+				 00 00 00 00 80 01 00 00 00 48
+				 f8 86 42 08 88 88 80 88 88 88
+				 58 f8 87 53 18 88 88 81 88 88
+				 88 00 00 00 01 00 00 00 00 00
+				 00 00 00 00
+			39 00 3e ea 00 1a 00 00 00 00 02 00 00
+				 00 00 00 1f 88 81 35 78 88 88
+				 85 88 88 88 0f 88 80 24 68 88
+				 88 84 88 88 88 23 10 00 00 1c
+				 00 00 00 00 00 00 00 00 00 00
+				 00 00 00 00 00 30 05 a0 00 00
+				 00 00
+			39 00 23 e0 00 06 08 2a 31 3f 38 36 07
+				 0c 0d 11 13 12 13 11 18 00 06
+				 08 2a 31 3f 38 36 07 0c 0d 11
+				 13 12 13 11 18
+			05 32 01 29
+		];
+
+		panel-exit-sequence = [
+			05 00 01 28
+			05 00 01 10
+		];
+
+		display-timings {
+			native-mode = <&timing0>;
+
+			timing0: timing0 {
+				clock-frequency = <64000000>;
+				hactive = <720>;
+				vactive = <1280>;
+				hfront-porch = <40>;
+				hsync-len = <10>;
+				hback-porch = <40>;
+				vfront-porch = <22>;
+				vsync-len = <4>;
+				vback-porch = <11>;
+				hsync-active = <0>;
+				vsync-active = <0>;
+				de-active = <0>;
+				pixelclk-active = <0>;
+			};
+		};
+	};
+};
+
+&i2c1 {
+	status = "okay";
+
+	vdd_npu: tcs452x@1c {
+		compatible = "tcs,tcs452x";
+		reg = <0x1c>;
+		vin-supply = <&vcc5v0_sys>;
+		regulator-compatible = "fan53555-reg";
+		pinctrl-0 = <&vsel_gpio>;
+		vsel-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
+		regulator-name = "vdd_npu";
+		regulator-min-microvolt = <750000>;
+		regulator-max-microvolt = <800000>;
+		regulator-ramp-delay = <2300>;
+		fcs,suspend-voltage-selector = <1>;
+		regulator-always-on;
+		regulator-boot-on;
+		regulator-initial-state = <3>;
+		regulator-state-mem {
+			regulator-off-in-suspend;
+		};
+	};
+};
+
+&npu {
+	npu-supply = <&vdd_npu>;
+	status = "okay";
+};
+
+&rk_rga {
+	status =  "okay";
+};
+
+&isp_mmu {
+	status = "okay";
+};
+
+&mipi_dphy {
+	status = "okay";
+};
+
+&combphy {
+	status = "okay";
+};
+
+&u2phy {
+	status = "okay";
+};
+
+&u2phy_otg {
+	status = "okay";
+};
+
+&usbdrd3 {
+	status = "okay";
+};
+
+&usbdrd_dwc3 {
+	status = "okay";
+};
+
+&tsadc {
+	rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
+	rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
+	pinctrl-names = "init", "default";
+	pinctrl-0 = <&tsadc_otp_gpio>;
+	pinctrl-1 = <&tsadc_otp_out>;
+	status = "okay";
+};
+
+&pinctrl {
+	vsel_gpio: vsel-gpio {
+		rockchip,pins =
+			<0 RK_PC6 0 &pcfg_pull_down>;
+	};
+
+	pwr_key: pwr-key {
+		rockchip,pins =
+			<0 RK_PB0 0 &pcfg_pull_none>;
+	};
+};
+
+&vop_lite {
+	status = "okay";
+};
+
+&vopl_mmu {
+	status = "okay";
+};
+
+&vpu_mmu {
+	status = "okay";
+};
+
+&vpu_service {
+	status = "okay";
+};