diff options
| author | Xinhuang Li <buluess.li@rock-chips.com> | 2017-12-12 14:19:39 +0800 |
|---|---|---|
| committer | Tao Huang <huangtao@rock-chips.com> | 2017-12-13 17:05:54 +0800 |
| commit | 8abc7338723ec0fa18ccfefc207feff7fc635f5d (patch) | |
| tree | 6dce7e55940d65bb4e94df0a14da745d73c4b022 | |
| parent | d8df99ad35295c78d0ddd36c62f44282278edc98 (diff) | |
clk: rockchip: rk3328: modify the wrong clk definition for encoder
Change-Id: I56ef3a201fc57d8ae368a5d1448e9e85e9143703
Signed-off-by: Xinhuang Li <buluess.li@rock-chips.com>
| -rw-r--r-- | drivers/clk/rockchip/clk-rk3328.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/clk/rockchip/clk-rk3328.c b/drivers/clk/rockchip/clk-rk3328.c index a095821412cb..0280d1c34a6d 100644 --- a/drivers/clk/rockchip/clk-rk3328.c +++ b/drivers/clk/rockchip/clk-rk3328.c @@ -551,15 +551,15 @@ static struct rockchip_clk_branch rk3328_clk_branches[] __initdata = { GATE(0, "hclk_rkvenc_niu", "hclk_rkvenc", CLK_IGNORE_UNUSED, RK3328_CLKGATE_CON(25), 1, GFLAGS), GATE(ACLK_H265, "aclk_h265", "aclk_rkvenc", 0, - RK3328_CLKGATE_CON(25), 0, GFLAGS), + RK3328_CLKGATE_CON(25), 2, GFLAGS), GATE(PCLK_H265, "pclk_h265", "hclk_rkvenc", 0, - RK3328_CLKGATE_CON(25), 1, GFLAGS), + RK3328_CLKGATE_CON(25), 3, GFLAGS), GATE(ACLK_H264, "aclk_h264", "aclk_rkvenc", 0, - RK3328_CLKGATE_CON(25), 0, GFLAGS), + RK3328_CLKGATE_CON(25), 4, GFLAGS), GATE(HCLK_H264, "hclk_h264", "hclk_rkvenc", 0, - RK3328_CLKGATE_CON(25), 1, GFLAGS), + RK3328_CLKGATE_CON(25), 5, GFLAGS), GATE(ACLK_AXISRAM, "aclk_axisram", "aclk_rkvenc", CLK_IGNORE_UNUSED, - RK3328_CLKGATE_CON(25), 0, GFLAGS), + RK3328_CLKGATE_CON(25), 6, GFLAGS), COMPOSITE(SCLK_VENC_CORE, "sclk_venc_core", mux_4plls_p, 0, RK3328_CLKSEL_CON(51), 14, 2, MFLAGS, 8, 5, DFLAGS, |