diff options
| author | Farouk Bouabid <farouk.bouabid@theobroma-systems.com> | 2024-02-08 16:39:56 +0100 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2024-07-12 16:12:08 +0200 |
| commit | 2e68dcee5aadbbf2b6e81d74bfd66af6cd36eec2 (patch) | |
| tree | 09b13a87def2ed4db3300d851361b4a435f5b68b | |
| parent | e7679df58f15caae12bff17107029bc5cc652128 (diff) | |
UPSTREAM: arm64: dts: rockchip: add rs485 support on uart5 of px30-ringneck-haikou
A hardware switch can set the rs485 transceiver into half or full duplex
mode.
Switching to the half-duplex mode requires the user to enable em485 on
uart5 using ioctl, DE/RE are both connected to GPIO0_B5 which is the
RTS signal for uart0. Implement GPIO0_B5 as rts-gpios with RTS_ON_SEND
option enabled (default) so that driver mode gets enabled while sending
(RTS high) and receiver mode gets enabled while not sending (RTS low).
In full-duplex mode (em485 is disabled), DE is connected to GPIO0_B5 and
RE is grounded (enabled). Since GPIO0_B5 is implemented as rts-gpios, the
driver mode gets enabled whenever we want to send something and RE is not
affected (always enabled) in this case by the state of RTS.
Signed-off-by: Farouk Bouabid <farouk.bouabid@theobroma-systems.com>
Link: https://lore.kernel.org/r/20240208-dev-rx-enable-v6-2-39e68e17a339@theobroma-systems.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit 5963d97aa780619ffb66cf4886c0ca1175ccbd3e)
Signed-off-by: Farouk Bouabid <farouk.bouabid@theobroma-systems.com>
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts b/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts index de0a1f2af983..56f73c17363f 100644 --- a/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts +++ b/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts @@ -226,6 +226,7 @@ &uart5 { pinctrl-0 = <&uart5_xfer>; + rts-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; status = "okay"; }; |