diff options
| author | Jakob Unterwurzacher <jakobunt@gmail.com> | 2024-09-26 15:20:30 +0200 |
|---|---|---|
| committer | Quentin Schulz <quentin.schulz@cherry.de> | 2024-10-14 13:22:24 +0000 |
| commit | 064d1eca1c65c557522be2a40e0d3f40bbea545e (patch) | |
| tree | 689a0a2651d782fa70999737273f8a4be4a15b59 | |
| parent | 7252028a417e3005f55b4d3543c8b30e803a9f8f (diff) | |
UPSTREAM: arm64: dts: rockchip: add attiny_rst_gate to Ringneck
Ringneck v1.4 can contain (placement option) an on-board ATtiny
microcontroller instead of an STM32. In normal operation, this
is transparent to the software, as both microcontrollers emulate
the same ICs (amc6821 and isl1208).
For flashing the ATtiny, the SWITCH_REG1 regulator of the board's PMIC is
used to enable the ATtiny UPDI debug interface. If the STM32 is placed, or if
we are running on an older Ringneck revision, SWITCH_REG1 is not connected
and has no effect.
Add attiny-updi-gate-regulator so userspace can control it via sysfs
(needs CONFIG_REGULATOR_USERSPACE_CONSUMER):
echo enabled > /sys/devices/platform/attiny-updi-gate-regulator/state
Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@cherry.de>
Tested-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Link: https://lore.kernel.org/r/20240926132028.21910-1-jakob.unterwurzacher@cherry.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit 1871e6f7c5e606b97708af50a7fec83a904a761b)
Relates-to: RNG-174
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi b/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi index 6112935f78bd..10c85c789566 100644 --- a/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi @@ -15,6 +15,12 @@ rtc1 = &rk809; }; + /* allows userspace to control the gate of the ATtiny UPDI pass FET via sysfs */ + attiny-updi-gate-regulator { + compatible = "regulator-output"; + vout-supply = <&vg_attiny_updi>; + }; + emmc_pwrseq: emmc-pwrseq { compatible = "mmc-pwrseq-emmc"; pinctrl-0 = <&emmc_reset>; @@ -290,6 +296,11 @@ regulator-suspend-microvolt = <1800000>; }; }; + + /* supplies the gate of the ATtiny UPDI pass FET */ + vg_attiny_updi: SWITCH_REG1 { + regulator-name = "vg_attiny_updi"; + }; }; }; }; |