Add pclk

3 files changed, 58 insertions, 22 deletions

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma-peafowl.dts b/arch/arm64/boot/dts/rockchip/rk3399-puma-peafowl.dts
index 7b5a16216ee4..4535bd424856 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-puma-peafowl.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-puma-peafowl.dts
@@ -21,9 +21,14 @@
 		rockchip,grf = <&grf>;
 		clocks = <&cru SCLK_MIPIDPHY_REF>,
 			<&cru SCLK_DPHY_TX1RX1_CFG>,
-			<&cru PCLK_VIO_GRF>;
-		clock-names = "dphy-ref", "dphy-cfg", "grf";
+			<&cru PCLK_VIO_GRF>,
+			<&cru PCLK_MIPI_DSI1>;
+		clock-names = "dphy-ref", "dphy-cfg", "grf", "pclk";
 		power-domains = <&power RK3399_PD_VIO>;
+
+		resets = <&cru SRST_P_MIPI_DSI1>;
+		reset-names = "apb";
+
 		status = "okay";
 
 		ports {
@@ -81,6 +86,10 @@
 	};
 };
 
+&rkisp1_0 {
+	status = "okay";
+};
+
 &rkisp1_1 {
 	status = "okay";
 
diff --git a/drivers/media/platform/rockchip/isp1/dev.c b/drivers/media/platform/rockchip/isp1/dev.c
index 91f54df378b9..8499b78ea2c3 100644
--- a/drivers/media/platform/rockchip/isp1/dev.c
+++ b/drivers/media/platform/rockchip/isp1/dev.c
@@ -700,7 +700,8 @@ static int __maybe_unused rkisp1_runtime_suspend(struct device *dev)
 {
 	struct rkisp1_device *isp_dev = dev_get_drvdata(dev);
 
-	printk("%s:%d: called\n", __func__, __LINE__);
+	printk("%s:%d: skipping\n", __func__, __LINE__);
+	return 0;
 
 	rkisp1_disable_sys_clk(isp_dev);
 	return pinctrl_pm_select_sleep_state(dev);
diff --git a/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c b/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
index 4baafc61fb5f..8b1e385dbcde 100644
--- a/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
+++ b/drivers/media/platform/rockchip/isp1/mipi_dphy_sy.c
@@ -46,6 +46,10 @@
 #include <media/v4l2-fwnode.h>
 #include <media/v4l2-subdev.h>
 
+#include <linux/reset.h>
+
+#define BEHAVE_LIKE_MARVIN 1
+
 #define RK3288_GRF_SOC_CON6	0x025c
 #define RK3288_GRF_SOC_CON8	0x0264
 #define RK3288_GRF_SOC_CON9	0x0268
@@ -86,8 +90,16 @@
 /*
  * CSI HOST
  */
+
+#if BEHAVE_LIKE_MARVIN
+/* values acc. to RK3399 TRM and camsys_soc_rk3399.h */
+#define CSIHOST_PHY_TEST_CTRL0      0xb4
+#define CSIHOST_PHY_TEST_CTRL1      0xb8
+#else
 #define CSIHOST_PHY_TEST_CTRL0		0x30
 #define CSIHOST_PHY_TEST_CTRL1		0x34
+#endif
+
 #define CSIHOST_PHY_SHUTDOWNZ		0x08
 #define CSIHOST_DPHY_RSTZ		0x0c
 
@@ -338,6 +350,17 @@ static void mipidphy1_wr_reg(struct mipidphy_priv *priv, unsigned char addr,
 	writel(PHY_TESTCLK, priv->txrx_base_addr + CSIHOST_PHY_TEST_CTRL0);
 }
 
+static int mipidphy1_rd_reg(struct mipidphy_priv *priv, unsigned char addr)
+{
+	/*TESTEN =1,TESTDIN=addr*/
+	writel((PHY_TESTEN_ADDR | addr),
+       priv->txrx_base_addr + CSIHOST_PHY_TEST_CTRL1);
+	/*TESTCLK=0*/
+	writel(0x00, priv->txrx_base_addr + CSIHOST_PHY_TEST_CTRL0);
+
+	return readl(priv->txrx_base_addr + CSIHOST_PHY_TEST_CTRL1) >> 8;
+}
+
 static void csi_mipidphy_wr_ths_settle(struct mipidphy_priv *priv, int hsfreq,
 				       enum mipi_dphy_lane lane)
 {
@@ -595,6 +618,7 @@ static const char * const rk3399_mipidphy_clks[] = {
 	"dphy-ref",
 	"dphy-cfg",
 	"grf",
+	"pclk",
 };
 
 static int mipidphy_rx_stream_on(struct mipidphy_priv *priv,
@@ -654,8 +678,6 @@ static int mipidphy_rx_stream_on(struct mipidphy_priv *priv,
 
 // Compare with camsys_soc_rk3399.c / camsys_rk3399_mipihpy_cfg()
 
-#define BEHAVE_LIKE_MARVIN 1
-
 static int mipidphy_txrx_stream_on(struct mipidphy_priv *priv,
 				   struct v4l2_subdev *sd)
 {
@@ -696,18 +718,10 @@ static int mipidphy_txrx_stream_on(struct mipidphy_priv *priv,
 	printk("%s:%d: dphy start\n", __func__, __LINE__);
 	writel(0, priv->txrx_base_addr + CSIHOST_PHY_SHUTDOWNZ);
 	writel(0, priv->txrx_base_addr + CSIHOST_DPHY_RSTZ);
-#if BEHAVE_LIKE_MARVIN
-#define CAMSYS_DSIHOST_PHY_TEST_CTRL0 (0x00b4)
-	writel(PHY_TESTCLK, priv->txrx_base_addr + CAMSYS_DSIHOST_PHY_TEST_CTRL0);
-	writel(PHY_TESTCLR, priv->txrx_base_addr + CAMSYS_DSIHOST_PHY_TEST_CTRL0);
-	usleep_range(100, 150);
-	writel(PHY_TESTCLK, priv->txrx_base_addr + CAMSYS_DSIHOST_PHY_TEST_CTRL0);
-#else
 	writel(PHY_TESTCLK, priv->txrx_base_addr + CSIHOST_PHY_TEST_CTRL0);
 	writel(PHY_TESTCLR, priv->txrx_base_addr + CSIHOST_PHY_TEST_CTRL0);
 	usleep_range(100, 150);
 	writel(PHY_TESTCLK, priv->txrx_base_addr + CSIHOST_PHY_TEST_CTRL0);
-#endif
 
 	usleep_range(100, 150);
 	printk("%s:%d: dphy started\n", __func__, __LINE__);
@@ -723,18 +737,19 @@ static int mipidphy_txrx_stream_on(struct mipidphy_priv *priv,
 			 THS_SETTLE_COUNTER_THRESHOLD);
 
 #if BEHAVE_LIKE_MARVIN
-#define CAMSYS_DSIHOST_PHY_TEST_CTRL1 (0x00b8)
-	mipidphy1_wr_reg(priv, CAMSYS_DSIHOST_PHY_TEST_CTRL0, 0x00000002);
-	mipidphy1_wr_reg(priv, CAMSYS_DSIHOST_PHY_TEST_CTRL1, 0x00000000);
+	mipidphy1_rd_reg(priv, 0x75);
+	mipidphy1_wr_reg(priv, CSIHOST_PHY_TEST_CTRL0, 0x00000002);
+	mipidphy1_wr_reg(priv, CSIHOST_PHY_TEST_CTRL1, 0x00000000);
 	mipidphy1_wr_reg(priv, CSIHOST_DPHY_RSTZ, 0x00000002);
-#endif
-
+#else
 	/* Normal operation */
 	mipidphy1_wr_reg(priv, 0x0, 0);
+#endif
 
 	return 0;
 }
 
+// NOT CALLED FOR PEAFOWL
 static int csi_mipidphy_stream_on(struct mipidphy_priv *priv,
 				  struct v4l2_subdev *sd)
 {
@@ -994,10 +1009,10 @@ static int rockchip_mipidphy_media_init(struct mipidphy_priv *priv)
 }
 
 static struct resource txrx_base_res = {
-	.start = 0xff968000,
-	.end = 0xff968000+0x8000,
-	.name = "txrx_base",
-	.flags = IORESOURCE_MEM,
+       .start = 0xff968000,
+       .end = 0xff968000+0x8000,
+       .name = "txrx_base",
+      .flags = IORESOURCE_MEM,
 };
 
 static int rockchip_mipidphy_probe(struct platform_device *pdev)
@@ -1010,6 +1025,7 @@ static int rockchip_mipidphy_probe(struct platform_device *pdev)
 	const struct of_device_id *of_id;
 	const struct dphy_drv_data *drv_data;
 	int i, ret;
+	struct reset_control *rst;
 
 	printk("%s:%d: called\n", __func__, __LINE__);
 
@@ -1081,6 +1097,16 @@ static int rockchip_mipidphy_probe(struct platform_device *pdev)
 
 	pm_runtime_enable(&pdev->dev);
 
+
+	printk("%s:%d: deasserting reset\n", __func__, __LINE__);
+	rst = devm_reset_control_get(dev, "apb");
+	if (IS_ERR(rst)) {
+		dev_err(dev, "failed to get reset control\n");
+		return PTR_ERR(rst);
+	}
+	reset_control_deassert(rst);
+	udelay(10);
+
 	return 0;
 }