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-rw-r--r--CHANGELOG4
-rw-r--r--cpu/mpc5xxx/pci_mpc5200.c6
2 files changed, 9 insertions, 1 deletions
diff --git a/CHANGELOG b/CHANGELOG
index e5c53d80f8..015932e74d 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -9,6 +9,10 @@ Changes for U-Boot 1.1.4:
the DDR.
Patch by Steven Blakeslee, 12 Dec 2005
+* MPC5200: Set PCI retry counter to 0 = infinite retry;
+ The default of 255 is too short for slow devices.
+ Patch by Martin Nykodym, 12 Dec 2005
+
* Change port configuration for O2DNT (CODEC1 on PSC1).
* Fix register for PCI async mode on PPC440EP
diff --git a/cpu/mpc5xxx/pci_mpc5200.c b/cpu/mpc5xxx/pci_mpc5200.c
index 2cfa11ce27..1d903459e0 100644
--- a/cpu/mpc5xxx/pci_mpc5200.c
+++ b/cpu/mpc5xxx/pci_mpc5200.c
@@ -145,7 +145,11 @@ void pci_mpc5xxx_init (struct pci_controller *hose)
/* Disable interrupts from PCI controller */
*(vu_long *)MPC5XXX_PCI_GSCR &= ~(7 << 12);
- *(vu_long *)MPC5XXX_PCI_ICR &= ~(7 << 24);
+ *(vu_long *)MPC5XXX_PCI_ICR &= ~(7 << 24);
+
+ /* Set PCI retry counter to 0 = infinite retry. */
+ /* The default of 255 is too short for slow devices. */
+ *(vu_long *)MPC5XXX_PCI_ICR &= 0xFFFFFF00;
/* Disable initiator windows */
*(vu_long *)MPC5XXX_PCI_IWCR = 0;