ARM: sun6i: Initialize PLL6 to 600MHz

This replaces the previous initialization of PLL6 using a magic
value instead of a properly constructed setting for 600MHz and
documents the recommendation/requirement to have PLL6 operating
at 600MHz.

The following issues with the original intialization sequence are
fixed with this:
 * we now wait for PLL6 to lock, before proceeding
 * we no longer write the lock-bit (which is specified R/O)
 * we don't write the (unused) bits where other PLLs have their
   divider configuration field

0 files changed, 0 insertions, 0 deletions