diff options
| author | David S. Miller <davem@davemloft.net> | 2014-09-24 21:49:29 -0700 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2014-10-05 16:53:40 -0700 |
| commit | 7c0fa0f24bb76ce3d67be7f737b799846a04570f (patch) | |
| tree | 5383bc77f280dc29c5cc422cae89283c6fcb8690 /arch/sparc/mm | |
| parent | c06240c7f5c39c83dfd7849c0770775562441b96 (diff) | |
sparc64: Increase MAX_PHYS_ADDRESS_BITS to 53.
Make sure, at compile time, that the kernel can properly support
whatever MAX_PHYS_ADDRESS_BITS is defined to.
On M7 chips, use a max_phys_bits value of 49.
Based upon a patch by Bob Picco.
Signed-off-by: David S. Miller <davem@davemloft.net>
Acked-by: Bob Picco <bob.picco@oracle.com>
Diffstat (limited to 'arch/sparc/mm')
| -rw-r--r-- | arch/sparc/mm/init_64.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/sparc/mm/init_64.c b/arch/sparc/mm/init_64.c index 6d5d562a652e..e0c1206a44fa 100644 --- a/arch/sparc/mm/init_64.c +++ b/arch/sparc/mm/init_64.c @@ -1690,12 +1690,19 @@ static void __init setup_page_offset(void) case SUN4V_CHIP_NIAGARA4: case SUN4V_CHIP_NIAGARA5: case SUN4V_CHIP_SPARC64X: - default: + case SUN4V_CHIP_SPARC_M6: /* T4 and later support 52-bit virtual addresses. */ sparc64_va_hole_top = 0xfff8000000000000UL; sparc64_va_hole_bottom = 0x0008000000000000UL; max_phys_bits = 47; break; + case SUN4V_CHIP_SPARC_M7: + default: + /* M7 and later support 52-bit virtual addresses. */ + sparc64_va_hole_top = 0xfff8000000000000UL; + sparc64_va_hole_bottom = 0x0008000000000000UL; + max_phys_bits = 49; + break; } } |