diff options
| author | Heiko Stübner <heiko@sntech.de> | 2014-08-20 21:09:24 +0200 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2014-08-27 23:43:01 +0200 |
| commit | f23a6179d45e9d144bf2eb2bd82b2f1270f85fcf (patch) | |
| tree | 5bb93d909d3d5c2df6deb9054d96e300f7cd4e3b /arch/arm/boot/dts/rk3xxx.dtsi | |
| parent | 4721ab855d1a1d3e472ff38d1cae06e23e0520cf (diff) | |
ARM: dts: rockchip: add saradc nodes
Add the core device nodes for the SARADC found on both the Cortex-A9 series
(rk3066 and rk3188) as well as the newer rk3288.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rk3xxx.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/rk3xxx.dtsi | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index 8caf85d83901..cce4a07d6e04 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -264,4 +264,14 @@ clocks = <&cru SCLK_UART3>, <&cru PCLK_UART3>; status = "disabled"; }; + + saradc: saradc@2006c000 { + compatible = "rockchip,saradc"; + reg = <0x2006c000 0x100>; + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; + #io-channel-cells = <1>; + clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>; + clock-names = "saradc", "apb_pclk"; + status = "disabled"; + }; }; |