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authorQipan Li <Qipan.Li@csr.com>2013-09-29 22:27:58 +0800
committerLinus Walleij <linus.walleij@linaro.org>2013-10-08 10:18:15 +0200
commitaf614b2301f0e30423240a754ec2812a4c793201 (patch)
tree0eb5a1f8866e74d5fd574638b11b2651380595e8 /arch/arm/boot/dts/prima2.dtsi
parentfb85f4290ddf646548ac30848863f3211c3d2e54 (diff)
pinctrl: sirf: add lost USP-based UART pin groups for prima2
USP(Universal Serial Ports) can be UART as commit 5df831117b85a08e7aa, this patch defines the USP-based UART function pin groups for prima2. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/prima2.dtsi')
-rw-r--r--arch/arm/boot/dts/prima2.dtsi24
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/prima2.dtsi b/arch/arm/boot/dts/prima2.dtsi
index 766aa395f85c..569763a0e788 100644
--- a/arch/arm/boot/dts/prima2.dtsi
+++ b/arch/arm/boot/dts/prima2.dtsi
@@ -485,18 +485,42 @@
sirf,function = "usp0";
};
};
+ usp0_uart_nostreamctrl_pins_a: usp0@1 {
+ usp0 {
+ sirf,pins =
+ "usp0_uart_nostreamctrl_grp";
+ sirf,function =
+ "usp0_uart_nostreamctrl";
+ };
+ };
usp1_pins_a: usp1@0 {
usp1 {
sirf,pins = "usp1grp";
sirf,function = "usp1";
};
};
+ usp1_uart_nostreamctrl_pins_a: usp1@1 {
+ usp1 {
+ sirf,pins =
+ "usp1_uart_nostreamctrl_grp";
+ sirf,function =
+ "usp1_uart_nostreamctrl";
+ };
+ };
usp2_pins_a: usp2@0 {
usp2 {
sirf,pins = "usp2grp";
sirf,function = "usp2";
};
};
+ usp2_uart_nostreamctrl_pins_a: usp2@1 {
+ usp2 {
+ sirf,pins =
+ "usp2_uart_nostreamctrl_grp";
+ sirf,function =
+ "usp2_uart_nostreamctrl";
+ };
+ };
usb0_utmi_drvbus_pins_a: usb0_utmi_drvbus@0 {
usb0_utmi_drvbus {
sirf,pins = "usb0_utmi_drvbusgrp";