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authorFlorian Vaussard <florian.vaussard@epfl.ch>2014-03-05 18:24:18 -0600
committerTony Lindgren <tony@atomide.com>2014-03-12 09:50:50 -0700
commit21bd85a18ad6a38bbd17ec8265daa8b6500b4d9a (patch)
treedec3c13b921fcde9037e25f9f2139ea38a24464d /arch/arm/boot/dts/omap4.dtsi
parent40ac051d11529ae2255f1a830b52f0c2a7a1621d (diff)
ARM: dts: OMAP4: Add IOMMU nodes
Add the IOMMU nodes for the DSP and IPU subsystems. The MMU within the IPU sub-system also supports a bus error back capability, not available on the DSP MMU. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> [s-anna@ti.com: IPU bus error back addition] Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/omap4.dtsi')
-rw-r--r--arch/arm/boot/dts/omap4.dtsi15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 4e15be59b839..3dfec86c1dc9 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -467,6 +467,21 @@
dma-names = "tx", "rx";
};
+ mmu_dsp: mmu@4a066000 {
+ compatible = "ti,omap4-iommu";
+ reg = <0x4a066000 0x100>;
+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ ti,hwmods = "mmu_dsp";
+ };
+
+ mmu_ipu: mmu@55082000 {
+ compatible = "ti,omap4-iommu";
+ reg = <0x55082000 0x100>;
+ interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
+ ti,hwmods = "mmu_ipu";
+ ti,iommu-bus-err-back;
+ };
+
wdt2: wdt@4a314000 {
compatible = "ti,omap4-wdt", "ti,omap3-wdt";
reg = <0x4a314000 0x80>;