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authorLinus Walleij <linus.walleij@linaro.org>2012-09-06 09:08:47 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2012-09-17 23:20:22 +0100
commit4672cddff21f6edde857aa4b523bbc1bfc741cf8 (patch)
tree95af82598243419da14f78aab39474778071fed3 /arch/arm/boot/dts/integratorcp.dts
parent4980f9bc2cec0f8ff0e0f2b021d46c7606ae1849 (diff)
ARM: 7518/1: integrator: convert AMBA devices to device tree
This converts the AMBA (PrimeCell) devices on the Integrator/AP and Integrator/CP over to probing from the Device Tree if the kernel is compiled for Device Tree support. We continue to #ifdef out all non-DT code and vice versa on respective boot type to get a clean cut. We need to add a bunch of auxdata (compare to the Versatile) to handle bus names and callbacks alike. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/boot/dts/integratorcp.dts')
-rw-r--r--arch/arm/boot/dts/integratorcp.dts49
1 files changed, 49 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/integratorcp.dts b/arch/arm/boot/dts/integratorcp.dts
index 63033144442a..7bd49466cb0d 100644
--- a/arch/arm/boot/dts/integratorcp.dts
+++ b/arch/arm/boot/dts/integratorcp.dts
@@ -51,4 +51,53 @@
clear-mask = <0x00000fff>;
valid-mask = <0x00000fff>;
};
+
+ fpga {
+ /*
+ * These PrimeCells are at the same location and using
+ * the same interrupts in all Integrators, but in the CP
+ * slightly newer versions are deployed.
+ */
+ rtc@15000000 {
+ compatible = "arm,pl031", "arm,primecell";
+ };
+
+ uart@16000000 {
+ compatible = "arm,pl011", "arm,primecell";
+ };
+
+ uart@17000000 {
+ compatible = "arm,pl011", "arm,primecell";
+ };
+
+ kmi@18000000 {
+ compatible = "arm,pl050", "arm,primecell";
+ };
+
+ kmi@19000000 {
+ compatible = "arm,pl050", "arm,primecell";
+ };
+
+ /*
+ * These PrimeCells are only available on the Integrator/CP
+ */
+ mmc@1c000000 {
+ compatible = "arm,pl180", "arm,primecell";
+ reg = <0x1c000000 0x1000>;
+ interrupts = <23 24>;
+ max-frequency = <515633>;
+ };
+
+ aaci@1d000000 {
+ compatible = "arm,pl041", "arm,primecell";
+ reg = <0x1d000000 0x1000>;
+ interrupts = <25>;
+ };
+
+ clcd@c0000000 {
+ compatible = "arm,pl110", "arm,primecell";
+ reg = <0xC0000000 0x1000>;
+ interrupts = <22>;
+ };
+ };
};