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2019-02-13core_mmu: do not restrict device memory mapping to PGDIR_SIZE granularityJerome Forissier
Device memory registered via register_phys_mem() is currently rounded up/down to CORE_MMU_PGDIR_SIZE (1 MiB, or 2 MiB for LPAE). This is not needed and possibly incorrect for SoCs that define I/O memory maps with regions aligned on a small page (4 KiB), because using a larger granularity could result in overlaps between secure and non-secure mappings. This could cause issues depending on the type of memory firewall used by the SoC and its configuration. In any case, memory types other than MEM_AREA_IO_{SEC,NSEC} *can* be mapped with small page granularity using register_phys_mem(), so the situation is a bit inconsistent. This commit removes the rounding by default and provides a new macro: register_phys_mem_pgdir(). Platforms that still need to use PGDIR_SIZE granularity (typically because it consumes less page table space) need to replace register_phys_mem() by register_phys_mem_pgdir(). In order to avoid any functional change in platform code, all calls to register_phys_mem() with device memory are replaced with register_phys_mem_pgdir(). In addition, CORE_MMU_DEVICE_SIZE is removed and replaced with CORE_MMU_PGDIR_SIZE since there is no unique mapping size for device memory anymore. Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reported-by: Zeng Tao <prime.zeng@hisilicon.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
2018-12-18Factor out ta-targets from platform configJerome Forissier
Platforms use the same basic pattern again and again: ta-targets = ta_arm32 ifeq ($(CFG_ARM64_core),y) ta-targets += ta_arm64 endif Let's move this pattern to core/arch/arm/arm.mk, make it the default, and cleanup the platform configuration files. Suggested-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
2018-06-14Add new platform for the TI K3 class of SoCsAndrew F. Davis
Add platform 'k3' for the TI K3 family. These are ARMv8 devices and are quite different from our line of existing ARMv7 OMAP style SoCs, hence the new platform. Signed-off-by: Andrew F. Davis <afd@ti.com> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>