diff options
Diffstat (limited to 'core')
| -rw-r--r-- | core/arch/arm/plat-rpi3/conf.mk | 6 | ||||
| -rw-r--r-- | core/arch/arm/plat-rpi3/platform_config.h | 21 |
2 files changed, 8 insertions, 19 deletions
diff --git a/core/arch/arm/plat-rpi3/conf.mk b/core/arch/arm/plat-rpi3/conf.mk index ef1ed4dc..d9f36861 100644 --- a/core/arch/arm/plat-rpi3/conf.mk +++ b/core/arch/arm/plat-rpi3/conf.mk @@ -2,6 +2,12 @@ include core/arch/arm/cpu/cortex-armv8-0.mk $(call force,CFG_TEE_CORE_NB_CORE,4) +CFG_SHMEM_START ?= 0x08000000 +CFG_SHMEM_SIZE ?= 0x00400000 +CFG_TZDRAM_START ?= 0x10100000 +CFG_TZDRAM_SIZE ?= 0x00F00000 +CFG_TEE_RAM_VA_SIZE ?= 0x00700000 + $(call force,CFG_8250_UART,y) $(call force,CFG_GENERIC_BOOT,y) $(call force,CFG_PM_STUBS,y) diff --git a/core/arch/arm/plat-rpi3/platform_config.h b/core/arch/arm/plat-rpi3/platform_config.h index bfa0aadb..dfb9e292 100644 --- a/core/arch/arm/plat-rpi3/platform_config.h +++ b/core/arch/arm/plat-rpi3/platform_config.h @@ -29,6 +29,8 @@ #ifndef PLATFORM_CONFIG_H #define PLATFORM_CONFIG_H +#include <mm/generic_ram_layout.h> + /* Make stacks aligned to data cache line length */ #define STACK_ALIGNMENT 64 @@ -66,23 +68,4 @@ #define DRAM0_BASE 0x00000000 #define DRAM0_SIZE 0x40000000 -/* Below ARM-TF */ -#define TEE_SHMEM_START (0x08000000) -#define TEE_SHMEM_SIZE (4 * 1024 * 1024) - -#define TZDRAM_BASE (0x10100000) -#define TZDRAM_SIZE (15 * 1024 * 1024) - -#define TEE_RAM_VA_SIZE (7 * 1024 * 1024) - -#define TEE_LOAD_ADDR TZDRAM_BASE - -#define TEE_RAM_PH_SIZE TEE_RAM_VA_SIZE -#define TEE_RAM_START TZDRAM_BASE - -#define TA_RAM_START ROUNDUP((TZDRAM_BASE + TEE_RAM_VA_SIZE), \ - CORE_MMU_PGDIR_SIZE) - -# define TA_RAM_SIZE (8 * 1024 * 1024) - #endif /* PLATFORM_CONFIG_H */ |