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-rw-r--r--lib/aarch64/cache_helpers.S16
-rw-r--r--lib/aarch64/cpu_helpers.S11
-rw-r--r--lib/aarch64/misc_helpers.S77
-rw-r--r--lib/aarch64/sysreg_helpers.S100
-rw-r--r--lib/aarch64/tlb_helpers.S14
5 files changed, 33 insertions, 185 deletions
diff --git a/lib/aarch64/cache_helpers.S b/lib/aarch64/cache_helpers.S
index c272fc7..a5b918c 100644
--- a/lib/aarch64/cache_helpers.S
+++ b/lib/aarch64/cache_helpers.S
@@ -46,57 +46,41 @@
func dcisw
dc isw, x0
- dsb sy
- isb
ret
func dccisw
dc cisw, x0
- dsb sy
- isb
ret
func dccsw
dc csw, x0
- dsb sy
- isb
ret
func dccvac
dc cvac, x0
- dsb sy
- isb
ret
func dcivac
dc ivac, x0
- dsb sy
- isb
ret
func dccivac
dc civac, x0
- dsb sy
- isb
ret
func dccvau
dc cvau, x0
- dsb sy
- isb
ret
func dczva
dc zva, x0
- dsb sy
- isb
ret
diff --git a/lib/aarch64/cpu_helpers.S b/lib/aarch64/cpu_helpers.S
index 573d0b8..abb996d 100644
--- a/lib/aarch64/cpu_helpers.S
+++ b/lib/aarch64/cpu_helpers.S
@@ -35,13 +35,11 @@
func cpu_reset_handler
- mov x19, x30 // lr
-
/* ---------------------------------------------
* As a bare minimal enable the SMP bit.
* ---------------------------------------------
*/
- bl read_midr
+ mrs x0, midr_el1
lsr x0, x0, #MIDR_PN_SHIFT
and x0, x0, #MIDR_PN_MASK
cmp x0, #MIDR_PN_A57
@@ -49,8 +47,9 @@ func cpu_reset_handler
cmp x0, #MIDR_PN_A53
b.ne smp_setup_end
smp_setup_begin:
- bl read_cpuectlr
+ mrs x0, CPUECTLR_EL1
orr x0, x0, #CPUECTLR_SMP_BIT
- bl write_cpuectlr
+ msr CPUECTLR_EL1, x0
+ isb
smp_setup_end:
- ret x19
+ ret
diff --git a/lib/aarch64/misc_helpers.S b/lib/aarch64/misc_helpers.S
index e7b2331..e7ee015 100644
--- a/lib/aarch64/misc_helpers.S
+++ b/lib/aarch64/misc_helpers.S
@@ -46,22 +46,18 @@
.globl read_daif
.globl write_daif
- .globl read_spsr
.globl read_spsr_el1
.globl read_spsr_el2
.globl read_spsr_el3
- .globl write_spsr
.globl write_spsr_el1
.globl write_spsr_el2
.globl write_spsr_el3
- .globl read_elr
.globl read_elr_el1
.globl read_elr_el2
.globl read_elr_el3
- .globl write_elr
.globl write_elr_el1
.globl write_elr_el2
.globl write_elr_el3
@@ -79,6 +75,9 @@
.globl zeromem16
.globl memcpy16
+ .globl disable_mmu_el3
+ .globl disable_mmu_icache_el3
+
func get_afflvl_shift
cmp x0, #3
@@ -150,16 +149,6 @@ func write_daif
ret
-func read_spsr
- mrs x0, CurrentEl
- cmp x0, #(MODE_EL1 << MODE_EL_SHIFT)
- b.eq read_spsr_el1
- cmp x0, #(MODE_EL2 << MODE_EL_SHIFT)
- b.eq read_spsr_el2
- cmp x0, #(MODE_EL3 << MODE_EL_SHIFT)
- b.eq read_spsr_el3
-
-
func read_spsr_el1
mrs x0, spsr_el1
ret
@@ -175,44 +164,21 @@ func read_spsr_el3
ret
-func write_spsr
- mrs x1, CurrentEl
- cmp x1, #(MODE_EL1 << MODE_EL_SHIFT)
- b.eq write_spsr_el1
- cmp x1, #(MODE_EL2 << MODE_EL_SHIFT)
- b.eq write_spsr_el2
- cmp x1, #(MODE_EL3 << MODE_EL_SHIFT)
- b.eq write_spsr_el3
-
-
func write_spsr_el1
msr spsr_el1, x0
- isb
ret
func write_spsr_el2
msr spsr_el2, x0
- isb
ret
func write_spsr_el3
msr spsr_el3, x0
- isb
ret
-func read_elr
- mrs x0, CurrentEl
- cmp x0, #(MODE_EL1 << MODE_EL_SHIFT)
- b.eq read_elr_el1
- cmp x0, #(MODE_EL2 << MODE_EL_SHIFT)
- b.eq read_elr_el2
- cmp x0, #(MODE_EL3 << MODE_EL_SHIFT)
- b.eq read_elr_el3
-
-
func read_elr_el1
mrs x0, elr_el1
ret
@@ -228,31 +194,18 @@ func read_elr_el3
ret
-func write_elr
- mrs x1, CurrentEl
- cmp x1, #(MODE_EL1 << MODE_EL_SHIFT)
- b.eq write_elr_el1
- cmp x1, #(MODE_EL2 << MODE_EL_SHIFT)
- b.eq write_elr_el2
- cmp x1, #(MODE_EL3 << MODE_EL_SHIFT)
- b.eq write_elr_el3
-
-
func write_elr_el1
msr elr_el1, x0
- isb
ret
func write_elr_el2
msr elr_el2, x0
- isb
ret
func write_elr_el3
msr elr_el3, x0
- isb
ret
@@ -338,3 +291,27 @@ m_loop1:
subs x2, x2, #1
b.ne m_loop1
m_end: ret
+
+/* ---------------------------------------------------------------------------
+ * Disable the MMU at EL3
+ * This is implemented in assembler to ensure that the data cache is cleaned
+ * and invalidated after the MMU is disabled without any intervening cacheable
+ * data accesses
+ * ---------------------------------------------------------------------------
+ */
+
+func disable_mmu_el3
+ mov x1, #(SCTLR_M_BIT | SCTLR_C_BIT)
+do_disable_mmu:
+ mrs x0, sctlr_el3
+ bic x0, x0, x1
+ msr sctlr_el3, x0
+ isb // ensure MMU is off
+ mov x0, #DCCISW // DCache clean and invalidate
+ b dcsw_op_all
+
+
+func disable_mmu_icache_el3
+ mov x1, #(SCTLR_M_BIT | SCTLR_C_BIT | SCTLR_I_BIT)
+ b do_disable_mmu
+
diff --git a/lib/aarch64/sysreg_helpers.S b/lib/aarch64/sysreg_helpers.S
index 61468f9..376da49 100644
--- a/lib/aarch64/sysreg_helpers.S
+++ b/lib/aarch64/sysreg_helpers.S
@@ -125,10 +125,7 @@
.globl write_ttbr0_el3
.globl read_ttbr1_el1
- .globl read_ttbr1_el2
- .globl write_ttbr1
.globl write_ttbr1_el1
- .globl write_ttbr1_el2
.globl read_cpacr
.globl write_cpacr
@@ -160,8 +157,6 @@
#if SUPPORT_VFP
.globl enable_vfp
- .globl read_fpexc
- .globl write_fpexc
#endif
@@ -201,19 +196,16 @@ func read_vbar_el3
func write_vbar_el1
msr vbar_el1, x0
- isb
ret
func write_vbar_el2
msr vbar_el2, x0
- isb
ret
func write_vbar_el3
msr vbar_el3, x0
- isb
ret
@@ -238,19 +230,16 @@ func read_afsr0_el3
func write_afsr0_el1
msr afsr0_el1, x0
- isb
ret
func write_afsr0_el2
msr afsr0_el2, x0
- isb
ret
func write_afsr0_el3
msr afsr0_el3, x0
- isb
ret
@@ -275,19 +264,16 @@ func read_far_el3
func write_far_el1
msr far_el1, x0
- isb
ret
func write_far_el2
msr far_el2, x0
- isb
ret
func write_far_el3
msr far_el3, x0
- isb
ret
@@ -312,19 +298,16 @@ func read_mair_el3
func write_mair_el1
msr mair_el1, x0
- isb
ret
func write_mair_el2
msr mair_el2, x0
- isb
ret
func write_mair_el3
msr mair_el3, x0
- isb
ret
@@ -349,19 +332,16 @@ func read_amair_el3
func write_amair_el1
msr amair_el1, x0
- isb
ret
func write_amair_el2
msr amair_el2, x0
- isb
ret
func write_amair_el3
msr amair_el3, x0
- isb
ret
@@ -405,19 +385,16 @@ func read_rmr_el3
func write_rmr_el1
msr rmr_el1, x0
- isb
ret
func write_rmr_el2
msr rmr_el2, x0
- isb
ret
func write_rmr_el3
msr rmr_el3, x0
- isb
ret
@@ -442,19 +419,16 @@ func read_afsr1_el3
func write_afsr1_el1
msr afsr1_el1, x0
- isb
ret
func write_afsr1_el2
msr afsr1_el2, x0
- isb
ret
func write_afsr1_el3
msr afsr1_el3, x0
- isb
ret
@@ -479,22 +453,16 @@ func read_sctlr_el3
func write_sctlr_el1
msr sctlr_el1, x0
- dsb sy
- isb
ret
func write_sctlr_el2
msr sctlr_el2, x0
- dsb sy
- isb
ret
func write_sctlr_el3
msr sctlr_el3, x0
- dsb sy
- isb
ret
@@ -519,22 +487,16 @@ func read_actlr_el3
func write_actlr_el1
msr actlr_el1, x0
- dsb sy
- isb
ret
func write_actlr_el2
msr actlr_el2, x0
- dsb sy
- isb
ret
func write_actlr_el3
msr actlr_el3, x0
- dsb sy
- isb
ret
@@ -559,22 +521,16 @@ func read_esr_el3
func write_esr_el1
msr esr_el1, x0
- dsb sy
- isb
ret
func write_esr_el2
msr esr_el2, x0
- dsb sy
- isb
ret
func write_esr_el3
msr esr_el3, x0
- dsb sy
- isb
ret
@@ -599,22 +555,16 @@ func read_tcr_el3
func write_tcr_el1
msr tcr_el1, x0
- dsb sy
- isb
ret
func write_tcr_el2
msr tcr_el2, x0
- dsb sy
- isb
ret
func write_tcr_el3
msr tcr_el3, x0
- dsb sy
- isb
ret
@@ -622,11 +572,6 @@ func write_tcr_el3
* CPTR accessors
* -----------------------------------------------------
*/
-func read_cptr_el1
- b read_cptr_el1
- ret
-
-
func read_cptr_el2
mrs x0, cptr_el2
ret
@@ -637,21 +582,13 @@ func read_cptr_el3
ret
-func write_cptr_el1
- b write_cptr_el1
-
-
func write_cptr_el2
msr cptr_el2, x0
- dsb sy
- isb
ret
func write_cptr_el3
msr cptr_el3, x0
- dsb sy
- isb
ret
@@ -676,19 +613,16 @@ func read_ttbr0_el3
func write_ttbr0_el1
msr ttbr0_el1, x0
- isb
ret
func write_ttbr0_el2
msr ttbr0_el2, x0
- isb
ret
func write_ttbr0_el3
msr ttbr0_el3, x0
- isb
ret
@@ -701,28 +635,11 @@ func read_ttbr1_el1
ret
-func read_ttbr1_el2
- b read_ttbr1_el2
-
-
-func read_ttbr1_el3
- b read_ttbr1_el3
-
-
func write_ttbr1_el1
msr ttbr1_el1, x0
- isb
ret
-func write_ttbr1_el2
- b write_ttbr1_el2
-
-
-func write_ttbr1_el3
- b write_ttbr1_el3
-
-
func read_hcr
mrs x0, hcr_el2
ret
@@ -730,8 +647,6 @@ func read_hcr
func write_hcr
msr hcr_el2, x0
- dsb sy
- isb
ret
@@ -762,8 +677,6 @@ func read_cpuectlr
func write_cpuectlr
msr CPUECTLR_EL1, x0
- dsb sy
- isb
ret
@@ -789,8 +702,6 @@ func write_cntfrq
func write_scr
msr scr_el3, x0
- dsb sy
- isb
ret
@@ -818,16 +729,7 @@ func enable_vfp
mov x1, #AARCH64_CPTR_TFP
bic x0, x0, x1
msr cptr_el3, x0
- ret
-
-
-func read_fpexc
- b read_fpexc
- ret
-
-
-func write_fpexc
- b write_fpexc
+ isb
ret
#endif
diff --git a/lib/aarch64/tlb_helpers.S b/lib/aarch64/tlb_helpers.S
index ec1558b..8dfae12 100644
--- a/lib/aarch64/tlb_helpers.S
+++ b/lib/aarch64/tlb_helpers.S
@@ -41,47 +41,33 @@
func tlbialle1
tlbi alle1
- dsb sy
- isb
ret
func tlbialle1is
tlbi alle1is
- dsb sy
- isb
ret
func tlbialle2
tlbi alle2
- dsb sy
- isb
ret
func tlbialle2is
tlbi alle2is
- dsb sy
- isb
ret
func tlbialle3
tlbi alle3
- dsb sy
- isb
ret
func tlbialle3is
tlbi alle3is
- dsb sy
- isb
ret
func tlbivmalle1
tlbi vmalle1
- dsb sy
- isb
ret
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-22 15:48:32 +0000