diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/common/bl_common.h | 39 | ||||
| -rw-r--r-- | include/drivers/arm/arm_gic.h | 57 | ||||
| -rw-r--r-- | include/drivers/arm/gic_v2.h | 4 | ||||
| -rw-r--r-- | include/lib/aarch64/arch.h | 19 | ||||
| -rw-r--r-- | include/plat/common/plat_config.h | 80 | ||||
| -rw-r--r-- | include/plat/common/platform.h | 41 |
6 files changed, 204 insertions, 36 deletions
diff --git a/include/common/bl_common.h b/include/common/bl_common.h index f5e2a9a..154c0f4 100644 --- a/include/common/bl_common.h +++ b/include/common/bl_common.h @@ -38,15 +38,11 @@ #define DOWN 0 /******************************************************************************* - * Constants for loading images. When BLx wants to load BLy, it looks at a - * meminfo structure to find the extents of free memory. Then depending upon - * how it has been configured, it can either load BLy at the top or bottom of - * the free memory. These constants indicate the choice. - * TODO: Make this configurable while building the trusted firmware. - ******************************************************************************/ -#define TOP_LOAD 0x1 -#define BOT_LOAD !TOP_LOAD -#define LOAD_MASK (1 << 0) + * Constants to identify the location of a memory region in a given memory + * layout. +******************************************************************************/ +#define TOP 0x1 +#define BOTTOM !TOP /****************************************************************************** * Opcode passed in x0 to tell next EL that we want to run an image. @@ -97,18 +93,17 @@ #include <cdefs.h> /* For __dead2 */ #include <cassert.h> #include <stdint.h> +#include <stddef.h> /******************************************************************************* * Structure used for telling the next BL how much of a particular type of * memory is available for its use and how much is already used. ******************************************************************************/ typedef struct meminfo { - unsigned long total_base; - long total_size; - unsigned long free_base; - long free_size; - unsigned long attr; - unsigned long next; + uint64_t total_base; + size_t total_size; + uint64_t free_base; + size_t free_size; } meminfo_t; typedef struct aapcs64_params { @@ -209,14 +204,16 @@ CASSERT(sizeof(unsigned long) == unsigned long page_align(unsigned long, unsigned); void change_security_state(unsigned int); unsigned long image_size(const char *); -int load_image(meminfo_t *, - const char *, - unsigned int, - unsigned long, - image_info_t *, - entry_point_info_t *); +int load_image(meminfo_t *mem_layout, + const char *image_name, + uint64_t image_base, + image_info_t *image_data, + entry_point_info_t *entry_point_info); extern const char build_message[]; +void reserve_mem(uint64_t *free_base, size_t *free_size, + uint64_t addr, size_t size); + #endif /*__ASSEMBLY__*/ #endif /* __BL_COMMON_H__ */ diff --git a/include/drivers/arm/arm_gic.h b/include/drivers/arm/arm_gic.h new file mode 100644 index 0000000..9ab1a95 --- /dev/null +++ b/include/drivers/arm/arm_gic.h @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __ARM_GIC_H__ +#define __ARM_GIC_H__ + +#include <stdint.h> + +/******************************************************************************* + * Function declarations + ******************************************************************************/ +void arm_gic_init(unsigned int gicc_base, + unsigned int gicd_base, + unsigned long gicr_base, + const unsigned int *irq_sec_ptr, + unsigned int num_irqs); +void arm_gic_setup(void); +void arm_gic_cpuif_deactivate(void); +void arm_gic_cpuif_setup(void); +void arm_gic_pcpu_distif_setup(void); + +uint32_t arm_gic_interrupt_type_to_line(uint32_t type, + uint32_t security_state); +uint32_t arm_gic_get_pending_interrupt_type(void); +uint32_t arm_gic_get_pending_interrupt_id(void); +uint32_t arm_gic_acknowledge_interrupt(void); +void arm_gic_end_of_interrupt(uint32_t id); +uint32_t arm_gic_get_interrupt_type(uint32_t id); + +#endif /* __GIC_H__ */ diff --git a/include/drivers/arm/gic_v2.h b/include/drivers/arm/gic_v2.h index 1859a8e..4c6b0dc 100644 --- a/include/drivers/arm/gic_v2.h +++ b/include/drivers/arm/gic_v2.h @@ -36,6 +36,10 @@ #define MAX_PPIS 14 #define MAX_SGIS 16 +#define MIN_SGI_ID 0 +#define MIN_PPI_ID 16 +#define MIN_SPI_ID 32 + #define GRP0 0 #define GRP1 1 #define GIC_PRI_MASK 0xff diff --git a/include/lib/aarch64/arch.h b/include/lib/aarch64/arch.h index 5dc488b..ff91efc 100644 --- a/include/lib/aarch64/arch.h +++ b/include/lib/aarch64/arch.h @@ -211,8 +211,23 @@ * TCR defintions */ #define TCR_EL3_RES1 ((1UL << 31) | (1UL << 23)) - -#define TCR_T0SZ_4GB 32 +#define TCR_EL1_IPS_SHIFT 32 +#define TCR_EL3_PS_SHIFT 16 + +/* (internal) physical address size bits in EL3/EL1 */ +#define TCR_PS_BITS_4GB (0x0) +#define TCR_PS_BITS_64GB (0x1) +#define TCR_PS_BITS_1TB (0x2) +#define TCR_PS_BITS_4TB (0x3) +#define TCR_PS_BITS_16TB (0x4) +#define TCR_PS_BITS_256TB (0x5) + +#define ADDR_MASK_48_TO_63 0xFFFF000000000000UL +#define ADDR_MASK_44_TO_47 0x0000F00000000000UL +#define ADDR_MASK_42_TO_43 0x00000C0000000000UL +#define ADDR_MASK_40_TO_41 0x0000030000000000UL +#define ADDR_MASK_36_TO_39 0x000000F000000000UL +#define ADDR_MASK_32_TO_35 0x0000000F00000000UL #define TCR_RGN_INNER_NC (0x0 << 8) #define TCR_RGN_INNER_WBA (0x1 << 8) diff --git a/include/plat/common/plat_config.h b/include/plat/common/plat_config.h new file mode 100644 index 0000000..826d01b --- /dev/null +++ b/include/plat/common/plat_config.h @@ -0,0 +1,80 @@ +/* + * Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef __PLAT_CONFIG_H__ +#define __PLAT_CONFIG_H__ + +#define CONFIG_GICC_BASE_OFFSET 0x4 + + +#ifndef __ASSEMBLY__ + +#include <cassert.h> + + +enum plat_config_flags { + /* Whether CPUECTLR SMP bit should be enabled */ + CONFIG_CPUECTLR_SMP_BIT = 0x1, + /* Whether Base FVP memory map is in use */ + CONFIG_BASE_MMAP = 0x2, + /* Whether CCI should be enabled */ + CONFIG_HAS_CCI = 0x4, + /* Whether TZC should be configured */ + CONFIG_HAS_TZC = 0x8 +}; + +typedef struct plat_config { + unsigned int gicd_base; + unsigned int gicc_base; + unsigned int gich_base; + unsigned int gicv_base; + unsigned int max_aff0; + unsigned int max_aff1; + unsigned long flags; +} plat_config_t; + +inline const plat_config_t *get_plat_config(); + + +CASSERT(CONFIG_GICC_BASE_OFFSET == __builtin_offsetof( + plat_config_t, gicc_base), + assert_gicc_base_offset_mismatch); + +/* If used, plat_config must be defined and populated in the platform port*/ +extern plat_config_t plat_config; + +inline const plat_config_t *get_plat_config() +{ + return &plat_config; +} + + +#endif /* __ASSEMBLY__ */ + +#endif /* __PLAT_CONFIG_H__ */ diff --git a/include/plat/common/platform.h b/include/plat/common/platform.h index c087dc6..1eeaac2 100644 --- a/include/plat/common/platform.h +++ b/include/plat/common/platform.h @@ -90,10 +90,8 @@ void bl1_plat_set_bl2_ep_info(struct image_info *image, /******************************************************************************* * Optional BL1 functions (may be overridden) ******************************************************************************/ -void init_bl2_mem_layout(struct meminfo *, - struct meminfo *, - unsigned int, - unsigned long); +void bl1_init_bl2_mem_layout(const struct meminfo *bl1_mem_layout, + struct meminfo *bl2_mem_layout); /******************************************************************************* * Mandatory BL2 functions @@ -122,25 +120,42 @@ struct entry_point_info *bl2_plat_get_bl31_ep_info(void); void bl2_plat_flush_bl31_params(void); /* - * The next 3 functions allow the platform to change the entrypoint - * information for the 3rd level BL images, after BL2 has loaded the 3rd - * level BL images into memory but before BL3-1 is executed. + * The next 2 functions allow the platform to change the entrypoint information + * for the mandatory 3rd level BL images, BL3-1 and BL3-3. This is done after + * BL2 has loaded those images into memory but before BL3-1 is executed. */ void bl2_plat_set_bl31_ep_info(struct image_info *image, struct entry_point_info *ep); -void bl2_plat_set_bl32_ep_info(struct image_info *image, +void bl2_plat_set_bl33_ep_info(struct image_info *image, struct entry_point_info *ep); -void bl2_plat_set_bl33_ep_info(struct image_info *image, +/* Gets the memory layout for BL3-3 */ +void bl2_plat_get_bl33_meminfo(struct meminfo *mem_info); + +/******************************************************************************* + * Conditionally mandatory BL2 functions: must be implemented if BL3-0 image + * is supported + ******************************************************************************/ +/* Gets the memory layout for BL3-0 */ +void bl2_plat_get_bl30_meminfo(struct meminfo *mem_info); + +/* + * This function is called after loading BL3-0 image and it is used to perform + * any platform-specific actions required to handle the SCP firmware. + */ +int bl2_plat_handle_bl30(struct image_info *bl30_image_info); + +/******************************************************************************* + * Conditionally mandatory BL2 functions: must be implemented if BL3-2 image + * is supported + ******************************************************************************/ +void bl2_plat_set_bl32_ep_info(struct image_info *image, struct entry_point_info *ep); -/* Gets the memory layout for BL32 */ +/* Gets the memory layout for BL3-2 */ void bl2_plat_get_bl32_meminfo(struct meminfo *mem_info); -/* Gets the memory layout for BL33 */ -void bl2_plat_get_bl33_meminfo(struct meminfo *mem_info); - /******************************************************************************* * Optional BL2 functions (may be overridden) ******************************************************************************/ |