diff options
| author | Yung-Ching LIN <yungching0725@gmail.com> | 2017-03-29 01:51:24 +0800 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2017-04-12 18:04:53 +0200 |
| commit | 0254006b29fcb960ef8c3188eab12a39845719f0 (patch) | |
| tree | 010fba28805385ab0c402b624bb1b651d20c38c8 /board/advantech | |
| parent | fc9ade56e3eb451683a58089e32e79abb69e240e (diff) | |
board: advantech: dms-ba16: fix AR8033 reset timing issue
Add the delay (10ms) to ensure the clock is stable and to meet the clock-to-reset(1ms) requirement recommended in the AR8033 datasheet
Signed-off-by: Ken Lin <yungching0725@gmail.com>
Acked-by: Akshay Bhat <akshay.bhat@timesys.com>
Diffstat (limited to 'board/advantech')
| -rw-r--r-- | board/advantech/dms-ba16/dms-ba16.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/board/advantech/dms-ba16/dms-ba16.c b/board/advantech/dms-ba16/dms-ba16.c index 8aa7ff1659..75b0bbc2cc 100644 --- a/board/advantech/dms-ba16/dms-ba16.c +++ b/board/advantech/dms-ba16/dms-ba16.c @@ -103,8 +103,9 @@ static void setup_iomux_enet(void) /* Reset AR8033 PHY */ gpio_direction_output(IMX_GPIO_NR(1, 28), 0); - udelay(500); + mdelay(10); gpio_set_value(IMX_GPIO_NR(1, 28), 1); + mdelay(1); } static iomux_v3_cfg_t const usdhc2_pads[] = { |