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authorAndrzej Hajda <a.hajda@samsung.com>2017-01-20 07:52:23 +0100
committerInki Dae <inki.dae@samsung.com>2017-02-07 13:52:51 +0900
commit5aa6c9ace55d2ca2d41118208fe8476907b4b066 (patch)
treeb6b97cfc0b1ce3de8046dff0e77f6e89b8c0d7bf /include/video
parent849fb0de898c907d1249edb2182ef0dfcaf4fdb4 (diff)
drm/exynos/decon5433: add support for interlace modes
Some registers should be programmed differently in interlace mode. Additionally IP does not signal stop state properly in interlaced mode, so warning has been removed. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
Diffstat (limited to 'include/video')
-rw-r--r--include/video/exynos5433_decon.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/video/exynos5433_decon.h b/include/video/exynos5433_decon.h
index 0098a522d9f4..b26511a0ddf8 100644
--- a/include/video/exynos5433_decon.h
+++ b/include/video/exynos5433_decon.h
@@ -89,6 +89,7 @@
#define VIDCON0_ENVID_F (1 << 0)
/* VIDOUTCON0 */
+#define VIDOUT_INTERLACE_EN_F (1 << 28)
#define VIDOUT_LCD_ON (1 << 24)
#define VIDOUT_IF_F_MASK (0x3 << 20)
#define VIDOUT_RGB_IF (0x0 << 20)