1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
|
# mips default CPU ISAs
config BR2_MIPS_CPU_MIPS32
bool
select BR2_MIPS_NAN_LEGACY
config BR2_MIPS_CPU_MIPS32R2
bool
select BR2_MIPS_NAN_LEGACY
config BR2_MIPS_CPU_MIPS32R3
bool
select BR2_MIPS_NAN_LEGACY
config BR2_MIPS_CPU_MIPS32R5
bool
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
config BR2_MIPS_CPU_MIPS32R6
bool
select BR2_MIPS_NAN_2008
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
config BR2_MIPS_CPU_MIPS64
bool
select BR2_MIPS_NAN_LEGACY
config BR2_MIPS_CPU_MIPS64R2
bool
select BR2_MIPS_NAN_LEGACY
config BR2_MIPS_CPU_MIPS64R3
bool
select BR2_MIPS_NAN_LEGACY
config BR2_MIPS_CPU_MIPS64R5
bool
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
config BR2_MIPS_CPU_MIPS64R6
bool
select BR2_MIPS_NAN_2008
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
choice
prompt "Target Architecture Variant"
default BR2_mips_32 if BR2_mips || BR2_mipsel
default BR2_mips_64 if BR2_mips64 || BR2_mips64el
depends on BR2_mips || BR2_mipsel || BR2_mips64 || BR2_mips64el
help
Specific CPU variant to use
64bit capable: 64, 64r2, 64r3, 64r5, 64r6
non-64bit capable: 32, 32r2, 32r3, 32r5, 32r6
config BR2_mips_32
bool "Generic MIPS32"
depends on !BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS32
config BR2_mips_32r2
bool "Generic MIPS32R2"
depends on !BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS32R2
config BR2_mips_32r3
bool "Generic MIPS32R3"
depends on !BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS32R3
config BR2_mips_32r5
bool "Generic MIPS32R5"
depends on !BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS32R5
config BR2_mips_32r6
bool "Generic MIPS32R6"
depends on !BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS32R6
config BR2_mips_interaptiv
bool "interAptiv"
depends on !BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS32R2
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
config BR2_mips_m5150
bool "M5150"
depends on !BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS32R5
select BR2_MIPS_NAN_2008
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
config BR2_mips_m6250
bool "M6250"
depends on !BR2_ARCH_IS_64
select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
select BR2_MIPS_CPU_MIPS32R6
config BR2_mips_p5600
bool "P5600"
depends on !BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS32R5
select BR2_MIPS_NAN_2008
config BR2_mips_xburst
bool "XBurst"
depends on !BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS32R2
help
The Ingenic XBurst is a MIPS32R2 microprocessor. It has a
bug in the FPU that can generate incorrect results in
certain cases. The problem shows up when you have several
fused madd instructions in sequence with dependant
operands. This requires the -mno-fused-madd compiler option
to be used in order to prevent emitting these instructions.
See http://www.ingenic.com/en/?xburst.html
config BR2_mips_64
bool "Generic MIPS64"
depends on BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS64
config BR2_mips_64r2
bool "Generic MIPS64R2"
depends on BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS64R2
config BR2_mips_64r3
bool "Generic MIPS64R3"
depends on BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS64R3
config BR2_mips_64r5
bool "Generic MIPS64R5"
depends on BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS64R5
config BR2_mips_64r6
bool "Generic MIPS64R6"
depends on BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS64R6
config BR2_mips_i6400
bool "I6400"
depends on BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS64R6
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
config BR2_mips_octeon2
bool "Octeon II"
depends on BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS64R2
help
Marvell (formerly Cavium Networks) Octeon II CN60XX
processors.
config BR2_mips_octeon3
bool "Octeon III"
depends on BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS64R3
help
Marvell (formerly Cavium Networks) Octeon III CN7XXX
processors.
config BR2_mips_p6600
bool "P6600"
depends on BR2_ARCH_IS_64
select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
select BR2_MIPS_CPU_MIPS64R6
endchoice
choice
prompt "Target ABI"
default BR2_MIPS_NABI32
depends on BR2_mips64 || BR2_mips64el
help
Application Binary Interface to use
config BR2_MIPS_NABI32
bool "n32"
depends on BR2_ARCH_IS_64
select BR2_KERNEL_64_USERLAND_32
config BR2_MIPS_NABI64
bool "n64"
depends on BR2_ARCH_IS_64
endchoice
config BR2_MIPS_SOFT_FLOAT
bool "Use soft-float"
default y
depends on !BR2_mips_octeon3 # hard-float only
select BR2_SOFT_FLOAT
help
If your target CPU does not have a Floating Point Unit (FPU)
or a kernel FPU emulator, but you still wish to support
floating point functions, then everything will need to be
compiled with soft floating point support (-msoft-float).
choice
prompt "FP mode"
default BR2_MIPS_FP32_MODE_XX
depends on !BR2_ARCH_IS_64 && !BR2_MIPS_SOFT_FLOAT
help
MIPS32 supports different FP modes (32,xx,64). Information
about FP modes can be found here:
https://sourceware.org/binutils/docs/as/MIPS-Options.html
https://dmz-portal.imgtec.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking#5._Generating_modeless_code
config BR2_MIPS_FP32_MODE_32
bool "32"
depends on !BR2_MIPS_CPU_MIPS32R6
config BR2_MIPS_FP32_MODE_XX
bool "xx"
select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
config BR2_MIPS_FP32_MODE_64
bool "64"
depends on !BR2_MIPS_CPU_MIPS32
endchoice
config BR2_GCC_TARGET_FP32_MODE
default "32" if BR2_MIPS_FP32_MODE_32
default "xx" if BR2_MIPS_FP32_MODE_XX
default "64" if BR2_MIPS_FP32_MODE_64
config BR2_MIPS_NAN_LEGACY
bool
config BR2_MIPS_NAN_2008
bool
select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
choice
prompt "Target NaN"
default BR2_MIPS_ENABLE_NAN_2008
depends on BR2_mips_32r5 || BR2_mips_64r5
help
MIPS supports two different NaN encodings, legacy and 2008.
Information about MIPS NaN encodings can be found here:
https://sourceware.org/binutils/docs/as/MIPS-NaN-Encodings.html
config BR2_MIPS_ENABLE_NAN_LEGACY
bool "legacy"
select BR2_MIPS_NAN_LEGACY
config BR2_MIPS_ENABLE_NAN_2008
bool "2008"
depends on !BR2_MIPS_SOFT_FLOAT
select BR2_MIPS_NAN_2008
endchoice
config BR2_GCC_TARGET_NAN
default "legacy" if BR2_MIPS_NAN_LEGACY
default "2008" if BR2_MIPS_NAN_2008
config BR2_ARCH
default "mips" if BR2_mips
default "mipsel" if BR2_mipsel
default "mips64" if BR2_mips64
default "mips64el" if BR2_mips64el
config BR2_ENDIAN
default "LITTLE" if BR2_mipsel || BR2_mips64el
default "BIG" if BR2_mips || BR2_mips64
config BR2_GCC_TARGET_ARCH
default "mips32" if BR2_mips_32
default "mips32r2" if BR2_mips_32r2
default "mips32r3" if BR2_mips_32r3
default "mips32r5" if BR2_mips_32r5
default "mips32r6" if BR2_mips_32r6
default "interaptiv" if BR2_mips_interaptiv
default "m5101" if BR2_mips_m5150
default "m6201" if BR2_mips_m6250
default "p5600" if BR2_mips_p5600
default "mips32r2" if BR2_mips_xburst
default "mips64" if BR2_mips_64
default "mips64r2" if BR2_mips_64r2
default "mips64r3" if BR2_mips_64r3
default "mips64r5" if BR2_mips_64r5
default "mips64r6" if BR2_mips_64r6
default "i6400" if BR2_mips_i6400
default "octeon2" if BR2_mips_octeon2
default "octeon3" if BR2_mips_octeon3
default "p6600" if BR2_mips_p6600
config BR2_MIPS_OABI32
bool
default y if BR2_mips || BR2_mipsel
config BR2_GCC_TARGET_ABI
default "32" if BR2_MIPS_OABI32
default "n32" if BR2_MIPS_NABI32
default "64" if BR2_MIPS_NABI64
config BR2_READELF_ARCH_NAME
default "MIPS R3000"
# vim: ft=kconfig
# -*- mode:kconfig; -*-
|
