diff options
author | Esben Haabendal <esben@geanix.com> | 2019-06-11 10:44:09 +0200 |
---|---|---|
committer | Peter Korsgaard <peter@korsgaard.com> | 2019-06-23 23:08:56 +0200 |
commit | 39a9d0181938e6cb759b7bb8e8bdf3eac32020dc (patch) | |
tree | de4160a42bbc0edf4bb2d947cea359280c326d60 /arch | |
parent | 334fdcc9c8fda5e577dd92647f42b45d1900c1c4 (diff) |
arch: Add support for Westmere targets
The westmere line of x86_64 targets lies between nehalem (corei7) and
sandybridge (corei7-avx). Allowing use of -march=westmere enables use of
AES instruction set on these targets.
Signed-off-by: Esben Haabendal <esben@geanix.com>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
(cherry picked from commit 97651ce275198ed650da7944b967d93a79127bd9)
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
Diffstat (limited to 'arch')
-rw-r--r-- | arch/Config.in.x86 | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/Config.in.x86 b/arch/Config.in.x86 index 85cfb9f5eb..331ee06bf0 100644 --- a/arch/Config.in.x86 +++ b/arch/Config.in.x86 @@ -101,6 +101,15 @@ config BR2_x86_corei7 select BR2_X86_CPU_HAS_SSSE3 select BR2_X86_CPU_HAS_SSE4 select BR2_X86_CPU_HAS_SSE42 +config BR2_x86_westmere + bool "westmere" + select BR2_X86_CPU_HAS_MMX + select BR2_X86_CPU_HAS_SSE + select BR2_X86_CPU_HAS_SSE2 + select BR2_X86_CPU_HAS_SSE3 + select BR2_X86_CPU_HAS_SSSE3 + select BR2_X86_CPU_HAS_SSE4 + select BR2_X86_CPU_HAS_SSE42 config BR2_x86_corei7_avx bool "corei7-avx" select BR2_X86_CPU_HAS_MMX @@ -235,6 +244,7 @@ config BR2_ARCH default "i686" if BR2_x86_nocona && BR2_i386 default "i686" if BR2_x86_core2 && BR2_i386 default "i686" if BR2_x86_corei7 && BR2_i386 + default "i686" if BR2_x86_westmere && BR2_i386 default "i686" if BR2_x86_corei7_avx && BR2_i386 default "i686" if BR2_x86_core_avx2 && BR2_i386 default "i686" if BR2_x86_atom && BR2_i386 @@ -271,6 +281,7 @@ config BR2_GCC_TARGET_ARCH default "corei7-avx" if BR2_x86_corei7_avx default "core-avx2" if BR2_x86_core_avx2 default "atom" if BR2_x86_atom + default "westmere" if BR2_x86_westmere default "silvermont" if BR2_x86_silvermont default "k8" if BR2_x86_opteron default "k8-sse3" if BR2_x86_opteron_sse3 |