summaryrefslogtreecommitdiff
path: root/arch/sh/cpu/sh4/watchdog.c
blob: f6924290f00c381916c9ba24c8ba33625cf8351b (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
/*
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include <common.h>
#include <asm/processor.h>
#include <asm/io.h>

#define WDT_BASE	WTCNT

#define WDT_WD		(1 << 6)
#define WDT_RST_P	(0)
#define WDT_RST_M	(1 << 5)
#define WDT_ENABLE	(1 << 7)

#if defined(CONFIG_WATCHDOG)
static unsigned char csr_read(void)
{
	return inb(WDT_BASE + 0x04);
}

static void cnt_write(unsigned char value)
{
	outl((unsigned short)value | 0x5A00, WDT_BASE + 0x00);
}

static void csr_write(unsigned char value)
{
	outl((unsigned short)value | 0xA500, WDT_BASE + 0x04);
}

void watchdog_reset(void)
{
	outl(0x55000000, WDT_BASE + 0x08);
}

int watchdog_init(void)
{
	/* Set overflow time*/
	cnt_write(0);
	/* Power on reset */
	csr_write(WDT_WD|WDT_RST_P|WDT_ENABLE);

	return 0;
}

int watchdog_disable(void)
{
	csr_write(csr_read() & ~WDT_ENABLE);
	return 0;
}
#endif

void reset_cpu(unsigned long ignored)
{
	while (1)
		;
}