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- Reset FPGAs in last_stage_init()
Signed-off-by: Reinhard Pfau <pfau@gdsys.de>
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
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The gdsys hrcon board is based on a Freescale MPC8308 SOC.
It boots from NOR-Flash, kernel and rootfs are stored on
SD-Card.
On board peripherals include:
- 1x GbE (optional)
- Lattice ECP3 FPGA connected via eLBC and PCIe
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
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Wolfgang Denk found this issue using cppcheck:
(error) Uninitialized variable: fpga_features
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
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To avoid peer "ChReceivePathStatus"-messages on iocon startup, initialize
PHYs as soon as possible.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
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Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
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There is a new iocon hardware flavor, supporting DisplayPort finally.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
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Up to this point some PHY initialization was done from the FPGA
and some from u-boot.
From now all initialization is done from u-boot.
To keep this maintainable a PHY setup machine was implemented that can
execute commands from initialization arrays.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
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Add a new iocon flavor with a second communiction port per channel.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
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Add a new iocon flavor with fiber instead of copper connectivity.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
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A set of accessor functions was added to be able to access not only
memory mapped FPGA in a generic way.
Thanks to Wolfgang Denk for getting this sorted properly.
Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
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Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
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Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
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Print fpga info at last_stage_init on gdsys 405ep boards.
Use dtt_init() to startup fans.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
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In order to add boards that have different hardware for fpga reset,
any 405ep gdsys board now provides these functions:
void gd405ep_init(void);
void gd405ep_set_fpga_reset(unsigned state);
void gd405ep_setup_hw(void);
int gd405ep_get_fpga_done(unsigned fpga);
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
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A large number of boards incorrectly used getenv() in their board init
code running before relocation. In some cases this caused U-Boot to
hang when certain environment variables grew too long.
Fix the code to use getenv_r().
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: The LEOX team <team@leox.org>
Cc: Michael Schwingen <michael@schwingen.org>
Cc: Georg Schardt <schardt@team-ctech.de>
Cc: Werner Pfister <Pfister_Werner@intercontrol.de>
Cc: Dirk Eibach <eibach@gdsys.de>
Cc: Peter De Schrijver <p2@mind.be>
Cc: John Zhan <zhanz@sinovee.com>
Cc: Rishi Bhattacharya <rishi@ti.com>
Cc: Peter Tyser <ptyser@xes-inc.com>
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Board support for the Guntermann & Drunck DLVision-10G.
Adds support for multiple FPGAs per board for gdsys 405ep
architecture.
Adds support for dual link osd hardware for gdsys 405ep.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
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Board support for the Guntermann & Drunck CATCenter Io.
Board support for the Guntermann & Drunck IoCon.
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
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