diff options
Diffstat (limited to 'include')
43 files changed, 1112 insertions, 323 deletions
diff --git a/include/altera.h b/include/altera.h index 7a2bece032..6aad5ee868 100644 --- a/include/altera.h +++ b/include/altera.h @@ -27,23 +27,6 @@ #ifndef _ALTERA_H_ #define _ALTERA_H_ -/* Altera Model definitions - *********************************************************************/ -#define CONFIG_SYS_ACEX1K CONFIG_SYS_FPGA_DEV( 0x1 ) -#define CONFIG_SYS_CYCLON2 CONFIG_SYS_FPGA_DEV( 0x2 ) -#define CONFIG_SYS_STRATIX_II CONFIG_SYS_FPGA_DEV( 0x4 ) - -#define CONFIG_SYS_ALTERA_ACEX1K (CONFIG_SYS_FPGA_ALTERA | CONFIG_SYS_ACEX1K) -#define CONFIG_SYS_ALTERA_CYCLON2 (CONFIG_SYS_FPGA_ALTERA | CONFIG_SYS_CYCLON2) -#define CONFIG_SYS_ALTERA_STRATIX_II (CONFIG_SYS_FPGA_ALTERA | CONFIG_SYS_STRATIX_II) -/* Add new models here */ - -/* Altera Interface definitions - *********************************************************************/ -#define CONFIG_SYS_ALTERA_IF_PS CONFIG_SYS_FPGA_IF( 0x1 ) /* passive serial */ -#define CONFIG_SYS_ALTERA_IF_FPP CONFIG_SYS_FPGA_IF( 0x2 ) /* fast passive parallel */ -/* Add new interfaces here */ - typedef enum { /* typedef Altera_iface */ min_altera_iface_type, /* insert all new types after this */ passive_serial, /* serial data and external clock */ diff --git a/include/asm-generic/sections.h b/include/asm-generic/sections.h index cca1edb0c7..4b39844549 100644 --- a/include/asm-generic/sections.h +++ b/include/asm-generic/sections.h @@ -29,7 +29,7 @@ extern char _data[], _sdata[], _edata[]; extern char __bss_start[], __bss_stop[]; extern char __init_begin[], __init_end[]; extern char _sinittext[], _einittext[]; -extern char _end[]; +extern char _end[], _init[]; extern char __per_cpu_load[], __per_cpu_start[], __per_cpu_end[]; extern char __kprobes_text_start[], __kprobes_text_end[]; extern char __entry_text_start[], __entry_text_end[]; diff --git a/include/common.h b/include/common.h index 0cfa6a8370..8a1f3e406d 100644 --- a/include/common.h +++ b/include/common.h @@ -352,6 +352,19 @@ int envmatch (uchar *, int); char *getenv (const char *); int getenv_f (const char *name, char *buf, unsigned len); ulong getenv_ulong(const char *name, int base, ulong default_val); + +/** + * getenv_hex() - Return an environment variable as a hex value + * + * Decode an environment as a hex number (it may or may not have a 0x + * prefix). If the environment variable cannot be found, or does not start + * with hex digits, the default value is returned. + * + * @varname: Variable to decode + * @default_val: Value to return on error + */ +ulong getenv_hex(const char *varname, ulong default_val); + /* * Read an environment variable as a boolean * Return -1 if variable does not exist (default to true) @@ -635,9 +648,6 @@ int prt_8260_clks (void); #elif defined(CONFIG_MPC5xxx) int prt_mpc5xxx_clks (void); #endif -#if defined(CONFIG_MPC512X) -int prt_mpc512xxx_clks (void); -#endif #if defined(CONFIG_MPC8220) int prt_mpc8220_clks (void); #endif @@ -897,6 +907,11 @@ static inline void *map_sysmem(phys_addr_t paddr, unsigned long len) static inline void unmap_sysmem(const void *vaddr) { } + +static inline phys_addr_t map_to_sysmem(void *ptr) +{ + return (phys_addr_t)(uintptr_t)ptr; +} # endif #endif /* __ASSEMBLY__ */ @@ -993,10 +1008,17 @@ static inline void unmap_sysmem(const void *vaddr) * of a function scoped static buffer. It can not be used to create a cache * line aligned global buffer. */ -#define ALLOC_ALIGN_BUFFER(type, name, size, align) \ - char __##name[ROUND(size * sizeof(type), align) + (align - 1)]; \ +#define PAD_COUNT(s, pad) ((s - 1) / pad + 1) +#define PAD_SIZE(s, pad) (PAD_COUNT(s, pad) * pad) +#define ALLOC_ALIGN_BUFFER_PAD(type, name, size, align, pad) \ + char __##name[ROUND(PAD_SIZE(size * sizeof(type), pad), align) \ + + (align - 1)]; \ \ type *name = (type *) ALIGN((uintptr_t)__##name, align) +#define ALLOC_ALIGN_BUFFER(type, name, size, align) \ + ALLOC_ALIGN_BUFFER_PAD(type, name, size, align, 1) +#define ALLOC_CACHE_ALIGN_BUFFER_PAD(type, name, size, pad) \ + ALLOC_ALIGN_BUFFER_PAD(type, name, size, ARCH_DMA_MINALIGN, pad) #define ALLOC_CACHE_ALIGN_BUFFER(type, name, size) \ ALLOC_ALIGN_BUFFER(type, name, size, ARCH_DMA_MINALIGN) @@ -1007,7 +1029,7 @@ static inline void unmap_sysmem(const void *vaddr) */ #define DEFINE_ALIGN_BUFFER(type, name, size, align) \ static char __##name[roundup(size * sizeof(type), align)] \ - __attribute__((aligned(align))); \ + __aligned(align); \ \ static type *name = (type *)__##name #define DEFINE_CACHE_ALIGN_BUFFER(type, name, size) \ diff --git a/include/config_cmd_default.h b/include/config_cmd_default.h index a52110396b..73c9544ea0 100644 --- a/include/config_cmd_default.h +++ b/include/config_cmd_default.h @@ -31,7 +31,6 @@ #define CONFIG_CMD_LOADB /* loadb */ #define CONFIG_CMD_LOADS /* loads */ #define CONFIG_CMD_MEMORY /* md mm nm mw cp cmp crc base loop */ -#define CONFIG_CMD_MEMTEST /* mtest */ #define CONFIG_CMD_MISC /* Misc functions like sleep etc*/ #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ #define CONFIG_CMD_NFS /* NFS support */ diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index 1bc2c5a0a4..536b7556fa 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -238,7 +238,7 @@ /* FPGA - Spartan 2 */ /* experiment -#define CONFIG_FPGA CONFIG_SYS_SPARTAN3 +#define CONFIG_FPGA #define CONFIG_FPGA_COUNT 1 #define CONFIG_SYS_FPGA_PROG_FEEDBACK #define CONFIG_SYS_FPGA_CHECK_CTRLC diff --git a/include/configs/MERGERBOX.h b/include/configs/MERGERBOX.h index c296e3cf06..30fb6c2ffd 100644 --- a/include/configs/MERGERBOX.h +++ b/include/configs/MERGERBOX.h @@ -606,7 +606,7 @@ * FPGA */ #define CONFIG_FPGA_COUNT 1 -#define CONFIG_FPGA CONFIG_SYS_ALTERA_CYCLON2 +#define CONFIG_FPGA #define CONFIG_FPGA_ALTERA #define CONFIG_FPGA_CYCLON2 diff --git a/include/configs/MVBC_P.h b/include/configs/MVBC_P.h index 6850965fb3..72714688eb 100644 --- a/include/configs/MVBC_P.h +++ b/include/configs/MVBC_P.h @@ -310,7 +310,7 @@ #undef FPGA_DEBUG #undef CONFIG_SYS_FPGA_PROG_FEEDBACK -#define CONFIG_FPGA CONFIG_SYS_ALTERA_CYCLON2 +#define CONFIG_FPGA #define CONFIG_FPGA_ALTERA 1 #define CONFIG_FPGA_CYCLON2 1 #define CONFIG_FPGA_COUNT 1 diff --git a/include/configs/MVBLM7.h b/include/configs/MVBLM7.h index a99ad3c44b..a9c00acc9a 100644 --- a/include/configs/MVBLM7.h +++ b/include/configs/MVBLM7.h @@ -499,7 +499,7 @@ "" #define CONFIG_FPGA_COUNT 1 -#define CONFIG_FPGA CONFIG_SYS_ALTERA_CYCLON2 +#define CONFIG_FPGA #define CONFIG_FPGA_ALTERA #define CONFIG_FPGA_CYCLON2 diff --git a/include/configs/MVSMR.h b/include/configs/MVSMR.h index bf2f44ec6e..5d2ff14805 100644 --- a/include/configs/MVSMR.h +++ b/include/configs/MVSMR.h @@ -280,7 +280,7 @@ #undef FPGA_DEBUG #undef CONFIG_SYS_FPGA_PROG_FEEDBACK -#define CONFIG_FPGA CONFIG_SYS_XILINX_SPARTAN2 +#define CONFIG_FPGA #define CONFIG_FPGA_XILINX 1 #define CONFIG_FPGA_SPARTAN2 1 #define CONFIG_FPGA_COUNT 1 diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index 14d597aad2..8b13b107e2 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -34,6 +34,29 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0x1107fffc #endif +#define CONFIG_NAND_FSL_ELBC + +#ifdef CONFIG_NAND +#define CONFIG_SPL +#define CONFIG_SPL_INIT_MINIMAL +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_NAND_MINIMAL +#define CONFIG_SPL_FLUSH_IMAGE +#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" + +#define CONFIG_SYS_TEXT_BASE 0x00201000 +#define CONFIG_SPL_TEXT_BASE 0xfffff000 +#define CONFIG_SPL_MAX_SIZE 4096 +#define CONFIG_SPL_RELOC_TEXT_BASE 0x00100000 +#define CONFIG_SPL_RELOC_STACK 0x00100000 +#define CONFIG_SYS_NAND_U_BOOT_SIZE ((512 << 10) + CONFIG_SPL_MAX_SIZE) +#define CONFIG_SYS_NAND_U_BOOT_DST (0x00200000 - CONFIG_SPL_MAX_SIZE) +#define CONFIG_SYS_NAND_U_BOOT_START 0x00200000 +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0 +#define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" +#endif + /* High Level Configuration Options */ #define CONFIG_BOOKE /* BOOKE */ #define CONFIG_E500 /* BOOKE e500 family */ @@ -84,6 +107,13 @@ #define CONFIG_SYS_CCSRBAR 0xffe00000 #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR +/* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k + SPL code*/ +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE +#endif + + /* DDR Setup */ #define CONFIG_DDR_SPD #define CONFIG_VERY_BIG_RAM @@ -105,6 +135,30 @@ #define CONFIG_SYS_SPD_BUS_NUM 1 #define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */ +/* These are used when DDR doesn't use SPD. */ +#define CONFIG_SYS_SDRAM_SIZE 2048 +#define CONFIG_SYS_SDRAM_SIZE_LAW LAW_SIZE_2G +#define CONFIG_SYS_DDR_CS0_BNDS 0x0000003F +#define CONFIG_SYS_DDR_CS0_CONFIG 0x80014202 +#define CONFIG_SYS_DDR_CS1_BNDS 0x0040007F +#define CONFIG_SYS_DDR_CS1_CONFIG 0x80014202 +#define CONFIG_SYS_DDR_TIMING_3 0x00010000 +#define CONFIG_SYS_DDR_TIMING_0 0x40110104 +#define CONFIG_SYS_DDR_TIMING_1 0x5c5bd746 +#define CONFIG_SYS_DDR_TIMING_2 0x0fa8d4ca +#define CONFIG_SYS_DDR_MODE_1 0x00441221 +#define CONFIG_SYS_DDR_MODE_2 0x00000000 +#define CONFIG_SYS_DDR_INTERVAL 0x0a280100 +#define CONFIG_SYS_DDR_DATA_INIT 0xdeadbeef +#define CONFIG_SYS_DDR_CLK_CTRL 0x02800000 +#define CONFIG_SYS_DDR_CONTROL 0xc7000008 +#define CONFIG_SYS_DDR_CONTROL_2 0x24401041 +#define CONFIG_SYS_DDR_TIMING_4 0x00220001 +#define CONFIG_SYS_DDR_TIMING_5 0x02401400 +#define CONFIG_SYS_DDR_ZQ_CONTROL 0x89080600 +#define CONFIG_SYS_DDR_WRLVL_CONTROL 0x8675f608 + + /* * Memory map * @@ -118,6 +172,7 @@ * Localbus non-cacheable * 0xe000_0000 0xe80f_ffff Promjet/free 128M non-cacheable * 0xe800_0000 0xefff_ffff FLASH 128M non-cacheable + * 0xff80_0000 0xff80_7fff NAND 32K non-cacheable * 0xffdf_0000 0xffdf_7fff PIXIS 32K non-cacheable TLB0 * 0xffd0_0000 0xffd0_3fff L1 for stack 16K Cacheable TLB0 * 0xffe0_0000 0xffef_ffff CCSR 1M non-cacheable @@ -126,38 +181,84 @@ /* * Local Bus Definitions */ -#define CONFIG_SYS_FLASH_BASE 0xe0000000 /* start of FLASH 128M */ +#define CONFIG_SYS_FLASH_BASE 0xe8000000 /* start of FLASH 128M */ #ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_FLASH_BASE_PHYS 0xfe0000000ull +#define CONFIG_SYS_FLASH_BASE_PHYS 0xfe8000000ull #else #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE #endif #define CONFIG_FLASH_BR_PRELIM \ - (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000) | BR_PS_16 | BR_V) + (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | BR_PS_16 | BR_V) #define CONFIG_FLASH_OR_PRELIM (OR_AM_128MB | 0xff7) +#ifdef CONFIG_NAND +#define CONFIG_SYS_BR1_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ +#define CONFIG_SYS_OR1_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */ +#else #define CONFIG_SYS_BR0_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ #define CONFIG_SYS_OR0_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */ +#endif -#define CONFIG_SYS_BR1_PRELIM \ - (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | BR_PS_16 | BR_V) -#define CONFIG_SYS_OR1_PRELIM CONFIG_FLASH_OR_PRELIM - -#define CONFIG_SYS_FLASH_BANKS_LIST \ - {CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000, CONFIG_SYS_FLASH_BASE_PHYS} +#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS} #define CONFIG_SYS_FLASH_QUIET_TEST #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ -#define CONFIG_SYS_MAX_FLASH_BANKS 2 +#define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_SECT 1024 +#ifndef CONFIG_SYS_MONITOR_BASE +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE +#else #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ +#endif +#endif #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO +/* Nand Flash */ +#if defined(CONFIG_NAND_FSL_ELBC) +#define CONFIG_SYS_NAND_BASE 0xff800000 +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_NAND_BASE_PHYS 0xfff800000ull +#else +#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE +#endif + +#define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND_BASE, } +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_MTD_NAND_VERIFY_WRITE +#define CONFIG_CMD_NAND 1 +#define CONFIG_SYS_NAND_BLOCK_SIZE (256 * 1024) +#define CONFIG_ELBC_NAND_SPL_STATIC_PGSIZE + +/* NAND flash config */ +#define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ + | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \ + | BR_PS_8 /* Port Size = 8 bit */ \ + | BR_MS_FCM /* MSEL = FCM */ \ + | BR_V) /* valid */ +#define CONFIG_SYS_NAND_OR_PRELIM (OR_AM_32KB /* length 256K */ \ + | OR_FCM_PGS /* Large Page*/ \ + | OR_FCM_CSCT \ + | OR_FCM_CST \ + | OR_FCM_CHT \ + | OR_FCM_SCY_1 \ + | OR_FCM_TRLX \ + | OR_FCM_EHTR) +#ifdef CONFIG_NAND +#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ +#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ +#else +#define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ +#define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ +#endif + +#endif /* CONFIG_NAND_FSL_ELBC */ + #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_EARLY_INIT_R #define CONFIG_MISC_INIT_R @@ -177,6 +278,8 @@ #define PIXIS_LBMAP_SWITCH 7 #define PIXIS_LBMAP_MASK 0xF0 #define PIXIS_LBMAP_ALTBANK 0x20 +#define PIXIS_SPD 0x07 +#define PIXIS_SPD_SYSCLK_MASK 0x07 #define PIXIS_ELBC_SPI_MASK 0xc0 #define PIXIS_SPI 0x80 @@ -199,6 +302,9 @@ #define CONFIG_SYS_NS16550_SERIAL #define CONFIG_SYS_NS16550_REG_SIZE 1 #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) +#ifdef CONFIG_SPL_BUILD +#define CONFIG_NS16550_MIN_FUNCTIONS +#endif #define CONFIG_SYS_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} @@ -419,7 +525,6 @@ /* * Environment */ -#ifdef CONFIG_SYS_RAMBOOT #ifdef CONFIG_RAMBOOT_SPIFLASH #define CONFIG_ENV_IS_IN_SPI_FLASH #define CONFIG_ENV_SPI_BUS 0 @@ -433,16 +538,15 @@ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_SYS_MMC_ENV_DEV 0 -#elif defined(CONFIG_NAND_U_BOOT) +#elif defined(CONFIG_NAND) #define CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE #define CONFIG_ENV_OFFSET ((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE) #define CONFIG_ENV_RANGE (3 * CONFIG_ENV_SIZE) -#else +#elif defined(CONFIG_SYS_RAMBOOT) #define CONFIG_ENV_IS_NOWHERE /* Store ENV in memory only */ #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000) #define CONFIG_ENV_SIZE 0x2000 -#endif #else #define CONFIG_ENV_IS_IN_FLASH #if CONFIG_SYS_MONITOR_BASE > 0xfff80000 diff --git a/include/configs/a3m071.h b/include/configs/a3m071.h index 13f32267e9..e9af825663 100644 --- a/include/configs/a3m071.h +++ b/include/configs/a3m071.h @@ -1,5 +1,5 @@ /* - * Copyright 2012 Stefan Roese <sr@denx.de> + * Copyright 2012-2013 Stefan Roese <sr@denx.de> * * See file CREDITS for list of people who contributed to this * project. @@ -59,6 +59,38 @@ #define CONFIG_CMD_CACHE #define CONFIG_CMD_MII #define CONFIG_CMD_REGINFO +#define CONFIG_CMD_DHCP +#define CONFIG_BOOTP_SEND_HOSTNAME +#define CONFIG_BOOTP_SERVERIP +#define CONFIG_BOOTP_MAY_FAIL +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_SERVERIP +#define CONFIG_NET_RETRY_COUNT 3 +#define CONFIG_CMD_LINK_LOCAL +#define CONFIG_NETCONSOLE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_CMD_PING +#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ +#define CONFIG_MTD_PARTITIONS /* needed for UBI */ +#define CONFIG_FLASH_CFI_MTD +#define MTDIDS_DEFAULT "nor0=fc000000.flash" +#define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:512k(u-boot)," \ + "256k(env)," \ + "128k(hwinfo)," \ + "1M(nvramsim)," \ + "128k(dtb)," \ + "5M(kernel)," \ + "128k(sysinfo)," \ + "7552k(root)," \ + "4M(app)," \ + "13568k(data)" +#define CONFIG_LZO /* needed for UBI */ +#define CONFIG_RBTREE /* needed for UBI */ +#define CONFIG_CMD_MTDPARTS +#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS +#define CONFIG_FIT /* * IPB Bus clocking configuration. @@ -88,7 +120,7 @@ */ #define CONFIG_SYS_FLASH_BASE 0xfc000000 #define CONFIG_SYS_FLASH_SIZE 0x02000000 -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x40000) +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x80000) #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_SECT 256 @@ -101,6 +133,7 @@ #define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE +#define CONFIG_FLASH_VERIFY /* * Environment settings @@ -109,6 +142,8 @@ #define CONFIG_ENV_SIZE 0x10000 #define CONFIG_ENV_SECT_SIZE 0x20000 #define CONFIG_ENV_OVERWRITE +#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) /* * Memory map @@ -121,16 +156,14 @@ #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM #define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE - -#define CONFIG_SYS_GBL_DATA_SIZE 128 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - \ - CONFIG_SYS_GBL_DATA_SIZE) + GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_MONITOR_LEN (256 << 10) -#define CONFIG_SYS_MALLOC_LEN (1 << 20) +#define CONFIG_SYS_MONITOR_LEN (512 << 10) +#define CONFIG_SYS_MALLOC_LEN (4 << 20) #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* @@ -156,14 +189,14 @@ */ #ifdef CONFIG_A4M2K -#define CONFIG_SYS_GPS_PORT_CONFIG 0x0005C805 +#define CONFIG_SYS_GPS_PORT_CONFIG 0x1005C805 #else /* for failsave-level 0 - full failsave */ #define CONFIG_SYS_GPS_PORT_CONFIG 0x1005C005 /* for failsave-level 1 - only digiboard ok */ -#define CONFIG_SYS_GPS_PORT_CONFIG_1 0x1005C005 +#define CONFIG_SYS_GPS_PORT_CONFIG_1 0x1005C065 /* for failsave-level 2 - all ok */ -#define CONFIG_SYS_GPS_PORT_CONFIG_2 0x1005C005 +#define CONFIG_SYS_GPS_PORT_CONFIG_2 0x1005C065 #endif #define CONFIG_WDOG_GPIO_PIN GPIO_WKUP_7 @@ -173,10 +206,10 @@ /* * Configuration matrix - * MSB LSB + * MSB LSB * failsave 0 0x1005C005 00010000000001011100000000000101 ( full failsave ) - * failsave 1 0x1005C005 00010000000001011100000000000101 ( digib.-ver ok ) - * failsave 2 0x1005C005 00010000000001011100000000000101 ( all ok ) + * failsave 1 0x1005C065 00010000000001011100000001100101 ( digib.-ver ok ) + * failsave 2 0x1005C065 00010000000001011100000001100101 ( all ok ) * || ||| || | ||| | | | | * || ||| || | ||| | | | | bit rev name * ++-+++-++--+---+++-+---+---+---+- 0 31 CS1 @@ -312,10 +345,12 @@ * Environment Configuration */ -#define CONFIG_BOOTDELAY 0 /* -1 disables auto-boot */ +#define CONFIG_BOOTDELAY 3 /* -1 disables auto-boot */ #undef CONFIG_BOOTARGS #define CONFIG_ZERO_BOOTDELAY_CHECK +#define CONFIG_SYS_AUTOLOAD "n" + #define CONFIG_PREBOOT "echo;" \ "echo Type \"run flash_mtd\" to boot from flash with mtd filesystem;" \ "echo Type \"run net_nfs\" to boot from tftp with nfs filesystem;" \ @@ -323,11 +358,10 @@ #undef CONFIG_BOOTARGS -#define CONFIG_SYS_OS_BASE 0xfc080000 -#define CONFIG_SYS_FDT_BASE 0xfc060000 +#define CONFIG_SYS_OS_BASE 0xfc200000 +#define CONFIG_SYS_FDT_BASE 0xfc1e0000 #define CONFIG_EXTRA_ENV_SETTINGS \ - "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \ "netdev=eth0\0" \ "verify=no\0" \ "loadaddr=200000\0" \ @@ -344,29 +378,31 @@ "nfsargs=setenv bootargs root=/dev/nfs rw " \ "nfsroot=${serverip}:${rootpath}\0" \ "ramargs=setenv bootargs root=/dev/ram rw\0" \ - "mtdargs=setenv bootargs root=/dev/mtdblock4 rw rootfstype=jffs2\0" \ + "mtdargs=setenv bootargs root=/dev/mtdblock7 " \ + "rootfstype=squashfs,jffs2\0" \ + "addhost=setenv bootargs ${bootargs} " \ + "hostname=${hostname}\0" \ "addip=setenv bootargs ${bootargs} " \ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ ":${hostname}:${netdev}:off panic=1\0" \ "addtty=setenv bootargs ${bootargs} " \ "console=${consoledev},${baudrate}\0" \ - "flash_nfs=run nfsargs addip addtty;" \ - "bootm ${kernel_addr} - ${fdtaddr}\0" \ - "flash_mtd=run mtdargs addip addtty;" \ - "bootm ${kernel_addr} - ${fdtaddr}\0" \ - "flash_self=run ramargs addip addtty;" \ + "flash_nfs=run nfsargs addip addtty addhost;" \ + "bootm ${kernel_addr} - ${fdt_addr}\0" \ + "flash_mtd=run mtdargs addip addtty addhost;" \ + "bootm ${kernel_addr} - ${fdt_addr}\0" \ + "flash_self=run ramargs addip addtty addhost;" \ "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ "net_nfs=tftp ${kernel_addr_r} ${bootfile};" \ "tftp ${fdt_addr_r} ${fdtfile};" \ - "run nfsargs addip addtty;" \ + "run nfsargs addip addtty addhost;" \ "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ "load=tftp ${loadaddr} " __stringify(CONFIG_HOSTNAME) \ "/u-boot-img.bin\0" \ - "update=protect off fc000000 fc03ffff; " \ - "era fc000000 fc03ffff; cp.b ${loadaddr} fc000000 40000\0" \ + "update=protect off fc000000 fc07ffff; " \ + "era fc000000 fc07ffff;" \ + "cp.b ${loadaddr} fc000000 ${filesize}\0" \ "upd=run load;run update\0" \ - "bootdelay=3\0" \ - "bootcmd=run net_nfs\0" \ "" #define CONFIG_BOOTCOMMAND "run flash_mtd" diff --git a/include/configs/amcc-common.h b/include/configs/amcc-common.h index f2f522dce3..80e5735e76 100644 --- a/include/configs/amcc-common.h +++ b/include/configs/amcc-common.h @@ -71,6 +71,7 @@ #define CONFIG_CMD_DIAG #define CONFIG_CMD_EEPROM #define CONFIG_CMD_ELF +#define CONFIG_CMD_GREPENV #define CONFIG_CMD_I2C #define CONFIG_CMD_IRQ #define CONFIG_CMD_MII @@ -78,6 +79,7 @@ #define CONFIG_CMD_NFS #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO +#define CONFIG_CMD_SETEXPR /* * Miscellaneous configurable options @@ -108,13 +110,14 @@ #define CONFIG_MX_CYCLIC /* enable mdc/mwc commands */ #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ #define CONFIG_VERSION_VARIABLE /* include version env variable */ -#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup*/ +#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup*/ -#define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */ +#define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */ #define CONFIG_LOADS_ECHO /* echo on for serial download */ -#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ +#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ +#define CONFIG_REGEX /* Enable regular expression support */ /* * BOOTP options */ diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index a4aa8f7453..5bacc77bb5 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -41,6 +41,7 @@ #define CONFIG_INTEL_CORE_ARCH /* Sandy bridge and ivy bridge chipsets. */ #define CONFIG_ZBOOT_32 #define CONFIG_PHYSMEM +#define CONFIG_SYS_EARLY_PCI_INIT #define CONFIG_LMB #define CONFIG_OF_LIBFDT diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 3f42cd9a38..5cc9b5ab26 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -714,6 +714,7 @@ #define CONFIG_EXTRA_ENV_SETTINGS \ "hwconfig=fsl_ddr:ctlr_intlv=cacheline," \ "bank_intlv=cs0_cs1;" \ + "usb2:dr_mode=peripheral,phy_type=" __stringify(__USB_PHY_TYPE) ";"\ "usb1:dr_mode=host,phy_type=" __stringify(__USB_PHY_TYPE) "\0"\ "netdev=eth0\0" \ "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h index 4514e7a225..8a82892f4f 100644 --- a/include/configs/exynos5250-dt.h +++ b/include/configs/exynos5250-dt.h @@ -139,6 +139,13 @@ #define EXYNOS_USB_SECONDARY_BOOT 0xfeed0002 #define EXYNOS_IRAM_SECONDARY_BASE 0x02020018 +/* TPM */ +#define CONFIG_TPM +#define CONFIG_CMD_TPM +#define CONFIG_INFINEON_TPM_I2C +#define CONFIG_INFINEON_TPM_I2C_BUS 3 +#define CONFIG_INFINEON_TPM_I2C_ADDR 0x20 + /* MMC SPL */ #define CONFIG_SPL #define COPY_BL2_FNPTR_ADDR 0x02020030 diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index 2ebcd1615f..ba613e33ce 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -1,5 +1,5 @@ /* - * (C) Copyright 2007-2010 + * (C) Copyright 2007-2013 * Stefan Roese, DENX Software Engineering, sr@denx.de. * * This program is free software; you can redistribute it and/or @@ -37,8 +37,12 @@ #define CONFIG_440 1 /* ... PPC440 family */ #define CONFIG_4xx 1 /* ... PPC4xx family */ -#ifndef CONFIG_SYS_TEXT_BASE +#ifdef CONFIG_LCD4_LWMON5 +#define CONFIG_SYS_TEXT_BASE 0x01000000 /* SPL U-Boot TEXT_BASE */ +#define CONFIG_HOSTNAME lcd4_lwmon5 +#else #define CONFIG_SYS_TEXT_BASE 0xFFF80000 +#define CONFIG_HOSTNAME lwmon5 #endif #define CONFIG_SYS_CLK_FREQ 33300000 /* external freq to pll */ @@ -56,7 +60,7 @@ * actual resources get mapped (not physical addresses) */ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* Start of U-Boot */ -#define CONFIG_SYS_MONITOR_LEN (0xFFFFFFFF - CONFIG_SYS_MONITOR_BASE + 1) +#define CONFIG_SYS_MONITOR_LEN 0x80000 #define CONFIG_SYS_MALLOC_LEN (1 << 20) /* Reserved for malloc */ #define CONFIG_SYS_BOOT_BASE_ADDR 0xf0000000 @@ -75,9 +79,11 @@ #define CONFIG_SYS_PCI_MEMBASE2 (CONFIG_SYS_PCI_MEMBASE1 + 0x10000000) #define CONFIG_SYS_PCI_MEMBASE3 (CONFIG_SYS_PCI_MEMBASE2 + 0x10000000) +#ifndef CONFIG_LCD4_LWMON5 #define CONFIG_SYS_USB2D0_BASE 0xe0000100 #define CONFIG_SYS_USB_DEVICE 0xe0000000 #define CONFIG_SYS_USB_HOST 0xe0000400 +#endif /* * Initial RAM & stack pointer @@ -87,12 +93,20 @@ * content during reset (GPT0_COMP6). This way we reserve the OCM (16k) * for logbuffer only. (GPT0_COMP1-COMP5 are reserved for logbuffer header.) */ +#ifndef CONFIG_LCD4_LWMON5 #define CONFIG_SYS_INIT_RAM_DCACHE 1 /* d-cache as init ram */ #define CONFIG_SYS_INIT_RAM_ADDR 0x70000000 /* DCache */ #define CONFIG_SYS_INIT_RAM_SIZE (4 << 10) #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET +#else +#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_BASE +#define CONFIG_SYS_INIT_RAM_SIZE (4 << 10) +#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ + GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) +#endif /* unused GPT0 COMP reg */ #define CONFIG_SYS_POST_WORD_ADDR (CONFIG_SYS_PERIPHERAL_BASE + GPT0_COMP6) #define CONFIG_SYS_OCM_SIZE (16 << 10) @@ -166,8 +180,11 @@ #define CONFIG_SYS_MBYTES_SDRAM 256 #define CONFIG_SYS_DDR_CACHED_ADDR 0x40000000 /* setup 2nd TLB cached here */ #define CONFIG_DDR_DATA_EYE /* use DDR2 optimization */ +#ifndef CONFIG_LCD4_LWMON5 #define CONFIG_DDR_ECC /* enable ECC */ +#endif +#ifndef CONFIG_LCD4_LWMON5 /* POST support */ #define CONFIG_POST (CONFIG_SYS_POST_CACHE | \ CONFIG_SYS_POST_CPU | \ @@ -276,6 +293,7 @@ #define CONFIG_ALT_LH_ADDR (CONFIG_SYS_PERIPHERAL_BASE + GPT0_COMP1) #define CONFIG_ALT_LB_ADDR (CONFIG_SYS_OCM_BASE) #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */ +#endif /* * I2C @@ -395,6 +413,7 @@ #define CONFIG_VIDEO_SW_CURSOR #define CONFIG_SPLASH_SCREEN +#ifndef CONFIG_LCD4_LWMON5 /* * USB/EHCI */ @@ -410,6 +429,7 @@ #define CONFIG_MAC_PARTITION #define CONFIG_DOS_PARTITION #define CONFIG_ISO_PARTITION +#endif /* * BOOTP options @@ -444,9 +464,11 @@ #define CONFIG_CMD_BMP #endif +#ifndef CONFIG_LCD4_LWMON5 #ifdef CONFIG_440EPX #define CONFIG_CMD_USB #endif +#endif /* * Miscellaneous configurable options @@ -480,11 +502,15 @@ #define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */ #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */ +#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup*/ + +#ifndef CONFIG_LCD4_LWMON5 #ifndef DEBUG #define CONFIG_HW_WATCHDOG 1 /* Use external HW-Watchdog */ #endif #define CONFIG_WD_PERIOD 40000 /* in usec */ #define CONFIG_WD_MAX_RATE 66600 /* in ticks */ +#endif /* * For booting Linux, the board info and command line data @@ -644,4 +670,40 @@ #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif + +/* + * SPL related defines + */ +#ifdef CONFIG_LCD4_LWMON5 +#define CONFIG_SPL +#define CONFIG_SPL_FRAMEWORK +#define CONFIG_SPL_BOARD_INIT +#define CONFIG_SPL_NOR_SUPPORT +#define CONFIG_SPL_TEXT_BASE 0xffff0000 /* last 64 KiB for SPL */ +#define CONFIG_SYS_SPL_MAX_LEN (64 << 10) +#define CONFIG_UBOOT_PAD_TO 458752 /* decimal for 'dd' */ +#define CONFIG_SPL_START_S_PATH "arch/powerpc/cpu/ppc4xx" +#define CONFIG_SPL_LDSCRIPT "arch/powerpc/cpu/ppc4xx/u-boot-spl.lds" +#define CONFIG_SPL_LIBCOMMON_SUPPORT /* image.c */ +#define CONFIG_SPL_LIBGENERIC_SUPPORT /* string.c */ +#define CONFIG_SPL_SERIAL_SUPPORT + +/* Place BSS for SPL near end of SDRAM */ +#define CONFIG_SPL_BSS_START_ADDR ((256 - 1) << 20) +#define CONFIG_SPL_BSS_MAX_SIZE (64 << 10) + +#define CONFIG_SPL_OS_BOOT +/* Place patched DT blob (fdt) at this address */ +#define CONFIG_SYS_SPL_ARGS_ADDR 0x01800000 + +#define CONFIG_SPL_TARGET "u-boot-img-spl-at-end.bin" + +/* Settings for real U-Boot to be loaded from NOR flash */ +#define CONFIG_SYS_UBOOT_BASE (-CONFIG_SYS_MONITOR_LEN) +#define CONFIG_SYS_UBOOT_START 0x01002100 + +#define CONFIG_SYS_OS_BASE 0xf8000000 +#define CONFIG_SYS_FDT_BASE 0xf87c0000 +#endif + #endif /* __CONFIG_H */ diff --git a/include/configs/m28evk.h b/include/configs/m28evk.h index a7d3ae6303..5b3fa43eb4 100644 --- a/include/configs/m28evk.h +++ b/include/configs/m28evk.h @@ -23,72 +23,75 @@ /* * SoC configurations */ -#define CONFIG_MX28 /* i.MX28 SoC */ -#define CONFIG_MXS_GPIO /* GPIO control */ -#define CONFIG_SYS_HZ 1000 /* Ticks per second */ +#define CONFIG_MX28 /* i.MX28 SoC */ +#define CONFIG_MXS_GPIO /* GPIO control */ +#define CONFIG_SYS_HZ 1000 /* Ticks per second */ /* * Define M28EVK machine type by hand until it lands in mach-types */ -#define MACH_TYPE_M28EVK 3613 +#define MACH_TYPE_M28EVK 3613 -#define CONFIG_MACH_TYPE MACH_TYPE_M28EVK +#define CONFIG_MACH_TYPE MACH_TYPE_M28EVK #include <asm/arch/regs-base.h> -#define CONFIG_SYS_NO_FLASH -#define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_ARCH_MISC_INIT +#define CONFIG_SYS_NO_FLASH +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_ARCH_MISC_INIT /* * SPL */ -#define CONFIG_SPL -#define CONFIG_SPL_NO_CPU_SUPPORT_CODE -#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs" -#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" -#define CONFIG_SPL_LIBCOMMON_SUPPORT -#define CONFIG_SPL_LIBGENERIC_SUPPORT -#define CONFIG_SPL_GPIO_SUPPORT +#define CONFIG_SPL +#define CONFIG_SPL_NO_CPU_SUPPORT_CODE +#define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs" +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_GPIO_SUPPORT /* * U-Boot Commands */ #include <config_cmd_default.h> -#define CONFIG_DISPLAY_CPUINFO -#define CONFIG_DOS_PARTITION +#define CONFIG_DISPLAY_CPUINFO +#define CONFIG_DOS_PARTITION -#define CONFIG_CMD_CACHE -#define CONFIG_CMD_DATE -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_EEPROM -#define CONFIG_CMD_EXT2 -#define CONFIG_CMD_FAT -#define CONFIG_CMD_GPIO -#define CONFIG_CMD_I2C -#define CONFIG_CMD_MII -#define CONFIG_CMD_MMC -#define CONFIG_CMD_NAND -#define CONFIG_CMD_NET -#define CONFIG_CMD_NFS -#define CONFIG_CMD_PING -#define CONFIG_CMD_SETEXPR -#define CONFIG_CMD_SF -#define CONFIG_CMD_SPI -#define CONFIG_CMD_USB +#define CONFIG_CMD_CACHE +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT +#define CONFIG_CMD_GPIO +#define CONFIG_CMD_GREPENV +#define CONFIG_CMD_I2C +#define CONFIG_CMD_MII +#define CONFIG_CMD_MMC +#define CONFIG_CMD_NAND +#define CONFIG_CMD_NET +#define CONFIG_CMD_NFS +#define CONFIG_CMD_PING +#define CONFIG_CMD_SETEXPR +#define CONFIG_CMD_SF +#define CONFIG_CMD_SPI +#define CONFIG_CMD_USB #define CONFIG_VIDEO +#define CONFIG_REGEX /* Enable regular expression support */ + /* * Memory configurations */ -#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ -#define PHYS_SDRAM_1 0x40000000 /* Base address */ -#define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */ -#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ -#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */ -#define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */ -#define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */ -#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 +#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ +#define PHYS_SDRAM_1 0x40000000 /* Base address */ +#define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */ +#define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */ +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */ +#define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */ +#define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */ +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* Point initial SP in SRAM so SPL can use it too. */ #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000 @@ -103,42 +106,42 @@ * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot * binary. In case there was more of this mess, 0x100 bytes are skipped. */ -#define CONFIG_SYS_TEXT_BASE 0x40000100 +#define CONFIG_SYS_TEXT_BASE 0x40000100 /* * U-Boot general configurations */ -#define CONFIG_SYS_LONGHELP -#define CONFIG_SYS_PROMPT "=> " -#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ -#define CONFIG_SYS_PBSIZE \ +#define CONFIG_SYS_LONGHELP +#define CONFIG_SYS_PROMPT "=> " +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ +#define CONFIG_SYS_PBSIZE \ (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) /* Print buffer size */ -#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot argument buffer size */ -#define CONFIG_VERSION_VARIABLE /* U-BOOT version */ -#define CONFIG_AUTO_COMPLETE /* Command auto complete */ -#define CONFIG_CMDLINE_EDITING /* Command history etc */ -#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_VERSION_VARIABLE /* U-BOOT version */ +#define CONFIG_AUTO_COMPLETE /* Command auto complete */ +#define CONFIG_CMDLINE_EDITING /* Command history etc */ +#define CONFIG_SYS_HUSH_PARSER /* * Serial Driver */ -#define CONFIG_PL011_SERIAL -#define CONFIG_PL011_CLOCK 24000000 -#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } -#define CONFIG_CONS_INDEX 0 -#define CONFIG_BAUDRATE 115200 /* Default baud rate */ +#define CONFIG_PL011_SERIAL +#define CONFIG_PL011_CLOCK 24000000 +#define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE } +#define CONFIG_CONS_INDEX 0 +#define CONFIG_BAUDRATE 115200 /* Default baud rate */ /* * MMC Driver */ #ifdef CONFIG_CMD_MMC -#define CONFIG_MMC -#define CONFIG_BOUNCE_BUFFER -#define CONFIG_GENERIC_MMC -#define CONFIG_MXS_MMC +#define CONFIG_MMC +#define CONFIG_BOUNCE_BUFFER +#define CONFIG_GENERIC_MMC +#define CONFIG_MXS_MMC #endif /* @@ -149,31 +152,31 @@ /* * NAND */ -#define CONFIG_ENV_SIZE (16 * 1024) +#define CONFIG_ENV_SIZE (16 * 1024) #ifdef CONFIG_CMD_NAND -#define CONFIG_NAND_MXS -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE 0x60000000 -#define CONFIG_SYS_NAND_5_ADDR_CYCLE +#define CONFIG_NAND_MXS +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_BASE 0x60000000 +#define CONFIG_SYS_NAND_5_ADDR_CYCLE /* Environment is in NAND */ -#define CONFIG_ENV_IS_IN_NAND -#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE -#define CONFIG_ENV_SECT_SIZE (128 * 1024) -#define CONFIG_ENV_RANGE (512 * 1024) -#define CONFIG_ENV_OFFSET 0x300000 -#define CONFIG_ENV_OFFSET_REDUND \ +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE +#define CONFIG_ENV_SECT_SIZE (128 * 1024) +#define CONFIG_ENV_RANGE (512 * 1024) +#define CONFIG_ENV_OFFSET 0x300000 +#define CONFIG_ENV_OFFSET_REDUND \ (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) -#define CONFIG_CMD_UBI -#define CONFIG_CMD_UBIFS -#define CONFIG_CMD_MTDPARTS -#define CONFIG_RBTREE -#define CONFIG_LZO -#define CONFIG_MTD_DEVICE -#define CONFIG_MTD_PARTITIONS -#define MTDIDS_DEFAULT "nand0=gpmi-nand" -#define MTDPARTS_DEFAULT \ +#define CONFIG_CMD_UBI +#define CONFIG_CMD_UBIFS +#define CONFIG_CMD_MTDPARTS +#define CONFIG_RBTREE +#define CONFIG_LZO +#define CONFIG_MTD_DEVICE +#define CONFIG_MTD_PARTITIONS +#define MTDIDS_DEFAULT "nand0=gpmi-nand" +#define MTDPARTS_DEFAULT \ "mtdparts=gpmi-nand:" \ "3m(bootloader)ro," \ "512k(environment)," \ @@ -183,34 +186,34 @@ "8m(ramdisk)," \ "-(filesystem)" #else -#define CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_IS_NOWHERE #endif /* * Ethernet on SOC (FEC) */ #ifdef CONFIG_CMD_NET -#define CONFIG_ETHPRIME "FEC0" -#define CONFIG_FEC_MXC -#define CONFIG_MII -#define CONFIG_FEC_XCV_TYPE RMII +#define CONFIG_ETHPRIME "FEC0" +#define CONFIG_FEC_MXC +#define CONFIG_MII +#define CONFIG_FEC_XCV_TYPE RMII #endif /* * I2C */ #ifdef CONFIG_CMD_I2C -#define CONFIG_I2C_MXS -#define CONFIG_HARD_I2C -#define CONFIG_SYS_I2C_SPEED 400000 +#define CONFIG_I2C_MXS +#define CONFIG_HARD_I2C +#define CONFIG_SYS_I2C_SPEED 400000 #endif /* * EEPROM */ #ifdef CONFIG_CMD_EEPROM -#define CONFIG_SYS_I2C_MULTI_EEPROMS -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 +#define CONFIG_SYS_I2C_MULTI_EEPROMS +#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 #endif /* @@ -218,13 +221,13 @@ */ #ifdef CONFIG_CMD_DATE /* Use the internal RTC in the MXS chip */ -#define CONFIG_RTC_INTERNAL +#define CONFIG_RTC_INTERNAL #ifdef CONFIG_RTC_INTERNAL -#define CONFIG_RTC_MXS +#define CONFIG_RTC_MXS #else -#define CONFIG_RTC_M41T62 -#define CONFIG_SYS_I2C_RTC_ADDR 0x68 -#define CONFIG_SYS_M41T11_BASE_YEAR 2000 +#define CONFIG_RTC_M41T62 +#define CONFIG_SYS_I2C_RTC_ADDR 0x68 +#define CONFIG_SYS_M41T11_BASE_YEAR 2000 #endif #endif @@ -232,39 +235,39 @@ * USB */ #ifdef CONFIG_CMD_USB -#define CONFIG_USB_EHCI -#define CONFIG_USB_EHCI_MXS +#define CONFIG_USB_EHCI +#define CONFIG_USB_EHCI_MXS #define CONFIG_EHCI_MXS_PORT0 #define CONFIG_EHCI_MXS_PORT1 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 -#define CONFIG_EHCI_IS_TDI -#define CONFIG_USB_STORAGE +#define CONFIG_EHCI_IS_TDI +#define CONFIG_USB_STORAGE #endif /* * SPI */ #ifdef CONFIG_CMD_SPI -#define CONFIG_HARD_SPI -#define CONFIG_MXS_SPI -#define CONFIG_SPI_HALF_DUPLEX -#define CONFIG_DEFAULT_SPI_BUS 2 -#define CONFIG_DEFAULT_SPI_CS 0 -#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0 +#define CONFIG_HARD_SPI +#define CONFIG_MXS_SPI +#define CONFIG_SPI_HALF_DUPLEX +#define CONFIG_DEFAULT_SPI_BUS 2 +#define CONFIG_DEFAULT_SPI_CS 0 +#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0 /* SPI FLASH */ #ifdef CONFIG_CMD_SF -#define CONFIG_SPI_FLASH -#define CONFIG_SPI_FLASH_STMICRO -#define CONFIG_SF_DEFAULT_BUS 2 -#define CONFIG_SF_DEFAULT_CS 0 -#define CONFIG_SF_DEFAULT_SPEED 40000000 -#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_SF_DEFAULT_BUS 2 +#define CONFIG_SF_DEFAULT_CS 0 +#define CONFIG_SF_DEFAULT_SPEED 40000000 +#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 -#define CONFIG_ENV_SPI_BUS 2 -#define CONFIG_ENV_SPI_CS 0 -#define CONFIG_ENV_SPI_MAX_HZ 40000000 -#define CONFIG_ENV_SPI_MODE SPI_MODE_0 +#define CONFIG_ENV_SPI_BUS 2 +#define CONFIG_ENV_SPI_CS 0 +#define CONFIG_ENV_SPI_MAX_HZ 40000000 +#define CONFIG_ENV_SPI_MODE SPI_MODE_0 #endif #endif @@ -289,20 +292,20 @@ /* * Boot Linux */ -#define CONFIG_CMDLINE_TAG -#define CONFIG_SETUP_MEMORY_TAGS -#define CONFIG_BOOTDELAY 3 -#define CONFIG_BOOTFILE "uImage" -#define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 " -#define CONFIG_BOOTCOMMAND "run bootcmd_net" -#define CONFIG_LOADADDR 0x42000000 -#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -#define CONFIG_OF_LIBFDT +#define CONFIG_CMDLINE_TAG +#define CONFIG_SETUP_MEMORY_TAGS +#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTFILE "uImage" +#define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 " +#define CONFIG_BOOTCOMMAND "run bootcmd_net" +#define CONFIG_LOADADDR 0x42000000 +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_OF_LIBFDT /* * Extra Environments */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define CONFIG_EXTRA_ENV_SETTINGS \ "update_nand_full_filename=u-boot.nand\0" \ "update_nand_firmware_filename=u-boot.sb\0" \ "update_sd_firmware_filename=u-boot.sd\0" \ diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h index d172e56bcf..0c4e7193ba 100644 --- a/include/configs/microblaze-generic.h +++ b/include/configs/microblaze-generic.h @@ -120,6 +120,14 @@ # define CONFIG_SYS_TIMER_0_IRQ XILINX_TIMER_IRQ #endif +/* watchdog */ +#if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ) +# define CONFIG_WATCHDOG_BASEADDR XILINX_WATCHDOG_BASEADDR +# define CONFIG_WATCHDOG_IRQ XILINX_WATCHDOG_IRQ +# define CONFIG_HW_WATCHDOG +# define CONFIG_XILINX_TB_WATCHDOG +#endif + /* * memory layout - Example * CONFIG_SYS_TEXT_BASE = 0x1200_0000; defined in config.mk @@ -414,10 +422,17 @@ "nor0=flash-0\0"\ "mtdparts=mtdparts=flash-0:"\ "256k(u-boot),256k(env),3m(kernel),"\ - "1m(romfs),1m(cramfs),-(jffs2)\0" + "1m(romfs),1m(cramfs),-(jffs2)\0"\ + "nc=setenv stdout nc;"\ + "setenv stdin nc\0" \ + "serial=setenv stdout serial;"\ + "setenv stdin serial\0" #define CONFIG_CMDLINE_EDITING +#define CONFIG_NETCONSOLE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV + /* Use the HUSH parser */ #define CONFIG_SYS_HUSH_PARSER diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h index b22a20b190..54d01f9ed8 100644 --- a/include/configs/mx28evk.h +++ b/include/configs/mx28evk.h @@ -139,14 +139,14 @@ #define CONFIG_SYS_NAND_5_ADDR_CYCLE /* Environment is in NAND */ +#ifdef CONFIG_ENV_IS_IN_NAND #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE #define CONFIG_ENV_SECT_SIZE (128 * 1024) #define CONFIG_ENV_RANGE (512 * 1024) -#ifndef CONFIG_ENV_OFFSET #define CONFIG_ENV_OFFSET 0x300000 -#endif #define CONFIG_ENV_OFFSET_REDUND \ (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) +#endif #define CONFIG_CMD_UBI #define CONFIG_CMD_UBIFS diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 1754595850..82ea4fa92e 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -50,6 +50,7 @@ #define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds" #define CONFIG_SPL_MAX_SIZE 2048 #define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_TEXT_BASE 0x87dc0000 #define CONFIG_SYS_TEXT_BASE 0x87e00000 diff --git a/include/configs/omap3_mvblx.h b/include/configs/omap3_mvblx.h index 376a3d031e..f9adc01700 100644 --- a/include/configs/omap3_mvblx.h +++ b/include/configs/omap3_mvblx.h @@ -273,7 +273,7 @@ #endif /* (CONFIG_CMD_NET) */ #define CONFIG_FPGA_COUNT 1 -#define CONFIG_FPGA CONFIG_SYS_ALTERA_CYCLON2 +#define CONFIG_FPGA #define CONFIG_FPGA_ALTERA #define CONFIG_FPGA_CYCLON2 #define CONFIG_SYS_FPGA_PROG_FEEDBACK diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h index 240fdfcb47..550cabd77c 100644 --- a/include/configs/omap5_uevm.h +++ b/include/configs/omap5_uevm.h @@ -44,6 +44,8 @@ #define CONFIG_ENV_IS_IN_MMC #define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */ #define CONFIG_ENV_OFFSET 0xE0000 +#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) +#define CONFIG_SYS_REDUNDAND_ENVIRONMENT #define CONFIG_CMD_SAVEENV /* Enhance our eMMC support / experience. */ diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index 406da43aa1..788207d007 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -22,15 +22,15 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_NR_DRAM_BANKS 1 -#define CONFIG_DRAM_SIZE (128 << 20) - /* Number of bits in a C 'long' on this architecture */ #define CONFIG_SANDBOX_BITS_PER_LONG 64 #define CONFIG_OF_CONTROL +#define CONFIG_OF_HOSTFILE #define CONFIG_OF_LIBFDT #define CONFIG_LMB +#define CONFIG_FIT +#define CONFIG_CMD_FDT #define CONFIG_FS_FAT #define CONFIG_FS_EXT4 @@ -74,9 +74,14 @@ #define CONFIG_SYS_MEMTEST_START 0x00100000 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1000) #define CONFIG_PHYS_64BIT +#define CONFIG_SYS_FDT_LOAD_ADDR 0x1000000 /* Size of our emulated memory */ +#define CONFIG_SYS_SDRAM_BASE 0 #define CONFIG_SYS_SDRAM_SIZE (128 << 20) +#define CONFIG_SYS_TEXT_BASE 0 +#define CONFIG_SYS_MONITOR_BASE 0 +#define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_BAUDRATE 115200 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ diff --git a/include/configs/tx25.h b/include/configs/tx25.h index e72f8f66b1..d61a21857a 100644 --- a/include/configs/tx25.h +++ b/include/configs/tx25.h @@ -37,6 +37,7 @@ #define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds" #define CONFIG_SPL_MAX_SIZE 2048 #define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT #define CONFIG_SPL_TEXT_BASE 0x810c0000 #define CONFIG_SYS_TEXT_BASE 0x81200000 diff --git a/include/configs/zynq.h b/include/configs/zynq.h index 2989e723e0..38f04f642b 100644 --- a/include/configs/zynq.h +++ b/include/configs/zynq.h @@ -50,19 +50,50 @@ #define CONFIG_ZYNQ_SERIAL_BAUDRATE0 CONFIG_BAUDRATE #define CONFIG_ZYNQ_SERIAL_CLOCK0 50000000 -/* SCU timer address is hardcoded */ -#define CONFIG_SCUTIMER_BASEADDR 0xF8F00600 - /* Ethernet driver */ #define CONFIG_NET_MULTI #define CONFIG_ZYNQ_GEM -#define CONFIG_ZYNQ_GEM_BASEADDR0 0xE000B000 +#define CONFIG_ZYNQ_GEM0 +#define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 + +#define CONFIG_ZYNQ_SDHCI +#define CONFIG_ZYNQ_SDHCI0 + +/* MMC */ +#if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1) +# define CONFIG_MMC +# define CONFIG_GENERIC_MMC +# define CONFIG_SDHCI +# define CONFIG_ZYNQ_SDHCI +# define CONFIG_CMD_MMC +# define CONFIG_CMD_FAT +# define CONFIG_SUPPORT_VFAT +# define CONFIG_CMD_EXT2 +# define CONFIG_DOS_PARTITION +#endif + +#define CONFIG_ZYNQ_I2C0 + +/* I2C */ +#if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1) +# define CONFIG_CMD_I2C +# define CONFIG_ZYNQ_I2C +# define CONFIG_HARD_I2C +# define CONFIG_SYS_I2C_SPEED 100000 +# define CONFIG_SYS_I2C_SLAVE 1 +#endif #if defined(CONFIG_ZYNQ_DCC) # define CONFIG_ARM_DCC # define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */ #endif +/* Enable the PL to be downloaded */ +#define CONFIG_FPGA +#define CONFIG_FPGA_XILINX +#define CONFIG_FPGA_ZYNQPL +#define CONFIG_CMD_FPGA + #define CONFIG_BOOTP_SERVERIP #define CONFIG_BOOTP_BOOTPATH #define CONFIG_BOOTP_GATEWAY diff --git a/include/fdtdec.h b/include/fdtdec.h index 844991ec4e..4e8032ba6c 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -92,6 +92,7 @@ enum fdt_compat_id { COMPAT_MAXIM_MAX77686_PMIC, /* MAX77686 PMIC */ COMPAT_GENERIC_SPI_FLASH, /* Generic SPI Flash chip */ COMPAT_MAXIM_98095_CODEC, /* MAX98095 Codec */ + COMPAT_INFINEON_SLB9635_TPM, /* Infineon SLB9635 TPM */ COMPAT_COUNT, }; diff --git a/include/fpga.h b/include/fpga.h index 30a4e6a2e8..38e9018c93 100644 --- a/include/fpga.h +++ b/include/fpga.h @@ -31,16 +31,6 @@ #define CONFIG_MAX_FPGA_DEVICES 5 #endif -/* CONFIG_FPGA bit assignments */ -#define CONFIG_SYS_FPGA_MAN(x) (x) -#define CONFIG_SYS_FPGA_DEV(x) ((x) << 8 ) -#define CONFIG_SYS_FPGA_IF(x) ((x) << 16 ) - -/* FPGA Manufacturer bits in CONFIG_FPGA */ -#define CONFIG_SYS_FPGA_XILINX CONFIG_SYS_FPGA_MAN( 0x1 ) -#define CONFIG_SYS_FPGA_ALTERA CONFIG_SYS_FPGA_MAN( 0x2 ) - - /* fpga_xxxx function return value definitions */ #define FPGA_SUCCESS 0 #define FPGA_FAIL -1 @@ -68,7 +58,10 @@ extern void fpga_init(void); extern int fpga_add(fpga_type devtype, void *desc); extern int fpga_count(void); extern int fpga_load(int devnum, const void *buf, size_t bsize); +extern int fpga_loadbitstream(int devnum, char *fpgadata, size_t size); extern int fpga_dump(int devnum, const void *buf, size_t bsize); extern int fpga_info(int devnum); +extern const fpga_desc *const fpga_validate(int devnum, const void *buf, + size_t bsize, char *fn); #endif /* _FPGA_H_ */ diff --git a/include/fs.h b/include/fs.h index b6d69e5ced..c837bae25c 100644 --- a/include/fs.h +++ b/include/fs.h @@ -62,5 +62,7 @@ int do_load(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[], int fstype, int cmdline_base); int do_ls(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[], int fstype); +int do_save(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[], + int fstype, int cmdline_base); #endif /* _FS_H */ diff --git a/include/lattice.h b/include/lattice.h index 6a2cf93db1..49871da22d 100644 --- a/include/lattice.h +++ b/include/lattice.h @@ -278,9 +278,6 @@ typedef struct { char *desc; /* description string */ } Lattice_desc; /* end, typedef Altera_desc */ -/* Lattice Model Type */ -#define CONFIG_SYS_XP2 CONFIG_SYS_FPGA_DEV(0x1) - /* Board specific implementation specific function types */ typedef void (*Lattice_jtag_init)(void); typedef void (*Lattice_jtag_set_tdi)(int v); diff --git a/include/linux/bitrev.h b/include/linux/bitrev.h new file mode 100644 index 0000000000..a61d9569b4 --- /dev/null +++ b/include/linux/bitrev.h @@ -0,0 +1,23 @@ +/* + * This file is released under the terms of GPL v2 and any later version. + * See the file COPYING in the root directory of the source tree for details. + * + * Based on bitrev from the Linux kernel, by Akinobu Mita + */ + +#ifndef _LINUX_BITREV_H +#define _LINUX_BITREV_H + +#include <linux/types.h> + +extern u8 const byte_rev_table[256]; + +static inline u8 bitrev8(u8 byte) +{ + return byte_rev_table[byte]; +} + +u16 bitrev16(u16 in); +u32 bitrev32(u32 in); + +#endif /* _LINUX_BITREV_H */ diff --git a/include/linux/mtd/docg4.h b/include/linux/mtd/docg4.h new file mode 100644 index 0000000000..982f5ad133 --- /dev/null +++ b/include/linux/mtd/docg4.h @@ -0,0 +1,134 @@ +/* + * Copyright (C) 2013 Mike Dunn <mikedunn@newsguy.com> + * + * This file is released under the terms of GPL v2 and any later version. + * See the file COPYING in the root directory of the source tree for details. + * + */ + +#ifndef __DOCG4_H__ +#define __DOCG4_H__ + +#include <common.h> +#include <linux/mtd/nand.h> + +extern int docg4_nand_init(struct mtd_info *mtd, + struct nand_chip *nand, int devnum); + +/* SPL-related definitions */ +#define DOCG4_IPL_LOAD_BLOCK_COUNT 2 /* number of blocks that IPL loads */ +#define DOCG4_BLOCK_CAPACITY_SPL 0x10000 /* reliable mode; redundant pages */ + +#define DOC_IOSPACE_DATA 0x0800 + +/* register offsets */ +#define DOC_CHIPID 0x1000 +#define DOC_DEVICESELECT 0x100a +#define DOC_ASICMODE 0x100c +#define DOC_DATAEND 0x101e +#define DOC_NOP 0x103e + +#define DOC_FLASHSEQUENCE 0x1032 +#define DOC_FLASHCOMMAND 0x1034 +#define DOC_FLASHADDRESS 0x1036 +#define DOC_FLASHCONTROL 0x1038 +#define DOC_ECCCONF0 0x1040 +#define DOC_ECCCONF1 0x1042 +#define DOC_HAMMINGPARITY 0x1046 +#define DOC_BCH_SYNDROM(idx) (0x1048 + idx) + +#define DOC_ASICMODECONFIRM 0x1072 +#define DOC_CHIPID_INV 0x1074 +#define DOC_POWERMODE 0x107c + +#define DOCG4_MYSTERY_REG 0x1050 + +/* apparently used only to write oob bytes 6 and 7 */ +#define DOCG4_OOB_6_7 0x1052 + +/* DOC_FLASHSEQUENCE register commands */ +#define DOC_SEQ_RESET 0x00 +#define DOCG4_SEQ_PAGE_READ 0x03 +#define DOCG4_SEQ_FLUSH 0x29 +#define DOCG4_SEQ_PAGEWRITE 0x16 +#define DOCG4_SEQ_PAGEPROG 0x1e +#define DOCG4_SEQ_BLOCKERASE 0x24 + +/* DOC_FLASHCOMMAND register commands */ +#define DOCG4_CMD_PAGE_READ 0x00 +#define DOC_CMD_ERASECYCLE2 0xd0 +#define DOCG4_CMD_FLUSH 0x70 +#define DOCG4_CMD_READ2 0x30 +#define DOC_CMD_PROG_BLOCK_ADDR 0x60 +#define DOCG4_CMD_PAGEWRITE 0x80 +#define DOC_CMD_PROG_CYCLE2 0x10 +#define DOC_CMD_RESET 0xff + +/* DOC_POWERMODE register bits */ +#define DOC_POWERDOWN_READY 0x80 + +/* DOC_FLASHCONTROL register bits */ +#define DOC_CTRL_CE 0x10 +#define DOC_CTRL_UNKNOWN 0x40 +#define DOC_CTRL_FLASHREADY 0x01 + +/* DOC_ECCCONF0 register bits */ +#define DOC_ECCCONF0_READ_MODE 0x8000 +#define DOC_ECCCONF0_UNKNOWN 0x2000 +#define DOC_ECCCONF0_ECC_ENABLE 0x1000 +#define DOC_ECCCONF0_DATA_BYTES_MASK 0x07ff + +/* DOC_ECCCONF1 register bits */ +#define DOC_ECCCONF1_BCH_SYNDROM_ERR 0x80 +#define DOC_ECCCONF1_ECC_ENABLE 0x07 +#define DOC_ECCCONF1_PAGE_IS_WRITTEN 0x20 + +/* DOC_ASICMODE register bits */ +#define DOC_ASICMODE_RESET 0x00 +#define DOC_ASICMODE_NORMAL 0x01 +#define DOC_ASICMODE_POWERDOWN 0x02 +#define DOC_ASICMODE_MDWREN 0x04 +#define DOC_ASICMODE_BDETCT_RESET 0x08 +#define DOC_ASICMODE_RSTIN_RESET 0x10 +#define DOC_ASICMODE_RAM_WE 0x20 + +/* good status values read after read/write/erase operations */ +#define DOCG4_PROGSTATUS_GOOD 0x51 +#define DOCG4_PROGSTATUS_GOOD_2 0xe0 + +/* + * On read operations (page and oob-only), the first byte read from I/O reg is a + * status. On error, it reads 0x73; otherwise, it reads either 0x71 (first read + * after reset only) or 0x51, so bit 1 is presumed to be an error indicator. + */ +#define DOCG4_READ_ERROR 0x02 /* bit 1 indicates read error */ + +/* anatomy of the device */ +#define DOCG4_CHIP_SIZE 0x8000000 +#define DOCG4_PAGE_SIZE 0x200 +#define DOCG4_PAGES_PER_BLOCK 0x200 +#define DOCG4_BLOCK_SIZE (DOCG4_PAGES_PER_BLOCK * DOCG4_PAGE_SIZE) +#define DOCG4_NUMBLOCKS (DOCG4_CHIP_SIZE / DOCG4_BLOCK_SIZE) +#define DOCG4_OOB_SIZE 0x10 +#define DOCG4_CHIP_SHIFT 27 /* log_2(DOCG4_CHIP_SIZE) */ +#define DOCG4_PAGE_SHIFT 9 /* log_2(DOCG4_PAGE_SIZE) */ +#define DOCG4_ERASE_SHIFT 18 /* log_2(DOCG4_BLOCK_SIZE) */ + +/* all but the last byte is included in ecc calculation */ +#define DOCG4_BCH_SIZE (DOCG4_PAGE_SIZE + DOCG4_OOB_SIZE - 1) + +#define DOCG4_USERDATA_LEN 520 /* 512 byte page plus 8 oob avail to user */ + +/* expected values from the ID registers */ +#define DOCG4_IDREG1_VALUE 0x0400 +#define DOCG4_IDREG2_VALUE 0xfbff + +/* primitive polynomial used to build the Galois field used by hw ecc gen */ +#define DOCG4_PRIMITIVE_POLY 0x4443 + +#define DOCG4_M 14 /* Galois field is of order 2^14 */ +#define DOCG4_T 4 /* BCH alg corrects up to 4 bit errors */ + +#define DOCG4_FACTORY_BBT_PAGE 16 /* page where read-only factory bbt lives */ + +#endif /* __DOCG4_H__ */ diff --git a/include/mmc.h b/include/mmc.h index de6d497d53..8bbc6b6ebe 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -30,16 +30,22 @@ #include <linux/compiler.h> #define SD_VERSION_SD 0x20000 -#define SD_VERSION_2 (SD_VERSION_SD | 0x20) -#define SD_VERSION_1_0 (SD_VERSION_SD | 0x10) -#define SD_VERSION_1_10 (SD_VERSION_SD | 0x1a) +#define SD_VERSION_3 (SD_VERSION_SD | 0x300) +#define SD_VERSION_2 (SD_VERSION_SD | 0x200) +#define SD_VERSION_1_0 (SD_VERSION_SD | 0x100) +#define SD_VERSION_1_10 (SD_VERSION_SD | 0x10a) #define MMC_VERSION_MMC 0x10000 #define MMC_VERSION_UNKNOWN (MMC_VERSION_MMC) -#define MMC_VERSION_1_2 (MMC_VERSION_MMC | 0x12) -#define MMC_VERSION_1_4 (MMC_VERSION_MMC | 0x14) -#define MMC_VERSION_2_2 (MMC_VERSION_MMC | 0x22) -#define MMC_VERSION_3 (MMC_VERSION_MMC | 0x30) -#define MMC_VERSION_4 (MMC_VERSION_MMC | 0x40) +#define MMC_VERSION_1_2 (MMC_VERSION_MMC | 0x102) +#define MMC_VERSION_1_4 (MMC_VERSION_MMC | 0x104) +#define MMC_VERSION_2_2 (MMC_VERSION_MMC | 0x202) +#define MMC_VERSION_3 (MMC_VERSION_MMC | 0x300) +#define MMC_VERSION_4 (MMC_VERSION_MMC | 0x400) +#define MMC_VERSION_4_1 (MMC_VERSION_MMC | 0x401) +#define MMC_VERSION_4_2 (MMC_VERSION_MMC | 0x402) +#define MMC_VERSION_4_3 (MMC_VERSION_MMC | 0x403) +#define MMC_VERSION_4_41 (MMC_VERSION_MMC | 0x429) +#define MMC_VERSION_4_5 (MMC_VERSION_MMC | 0x405) #define MMC_MODE_HS 0x001 #define MMC_MODE_HS_52MHz 0x010 @@ -201,6 +207,9 @@ #define PART_ACCESS_MASK (0x7) #define PART_SUPPORT (0x1) +/* Maximum block size for MMC */ +#define MMC_MAX_BLOCK_LEN 512 + struct mmc_cid { unsigned long psn; unsigned short oid; diff --git a/include/mtd/cfi_flash.h b/include/mtd/cfi_flash.h index 9bd76eb976..966b5e00ca 100644 --- a/include/mtd/cfi_flash.h +++ b/include/mtd/cfi_flash.h @@ -78,30 +78,29 @@ #define FLASH_CONTINUATION_CODE 0x7F #define FLASH_OFFSET_MANUFACTURER_ID 0x00 -#define FLASH_OFFSET_DEVICE_ID 0x02 -#define FLASH_OFFSET_DEVICE_ID2 0x1C -#define FLASH_OFFSET_DEVICE_ID3 0x1E -#define FLASH_OFFSET_CFI 0xAA - +#define FLASH_OFFSET_DEVICE_ID 0x01 +#define FLASH_OFFSET_DEVICE_ID2 0x0E +#define FLASH_OFFSET_DEVICE_ID3 0x0F +#define FLASH_OFFSET_CFI 0x55 #define FLASH_OFFSET_CFI_ALT 0x555 -#define FLASH_OFFSET_CFI_RESP 0x20 -#define FLASH_OFFSET_PRIMARY_VENDOR 0x26 +#define FLASH_OFFSET_CFI_RESP 0x10 +#define FLASH_OFFSET_PRIMARY_VENDOR 0x13 /* extended query table primary address */ -#define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x2A +#define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15 #define FLASH_OFFSET_WTOUT 0x1F -#define FLASH_OFFSET_WBTOUT 0x40 -#define FLASH_OFFSET_ETOUT 0x4A -#define FLASH_OFFSET_CETOUT 0x44 -#define FLASH_OFFSET_WMAX_TOUT 0x46 -#define FLASH_OFFSET_WBMAX_TOUT 0x48 -#define FLASH_OFFSET_EMAX_TOUT 0x4A -#define FLASH_OFFSET_CEMAX_TOUT 0x4C -#define FLASH_OFFSET_SIZE 0x4E -#define FLASH_OFFSET_INTERFACE 0x50 -#define FLASH_OFFSET_BUFFER_SIZE 0x54 -#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x58 -#define FLASH_OFFSET_ERASE_REGIONS 0x5A -#define FLASH_OFFSET_PROTECT 0x04 +#define FLASH_OFFSET_WBTOUT 0x20 +#define FLASH_OFFSET_ETOUT 0x21 +#define FLASH_OFFSET_CETOUT 0x22 +#define FLASH_OFFSET_WMAX_TOUT 0x23 +#define FLASH_OFFSET_WBMAX_TOUT 0x24 +#define FLASH_OFFSET_EMAX_TOUT 0x25 +#define FLASH_OFFSET_CEMAX_TOUT 0x26 +#define FLASH_OFFSET_SIZE 0x27 +#define FLASH_OFFSET_INTERFACE 0x28 +#define FLASH_OFFSET_BUFFER_SIZE 0x2A +#define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C +#define FLASH_OFFSET_ERASE_REGIONS 0x2D +#define FLASH_OFFSET_PROTECT 0x02 #define FLASH_OFFSET_USER_PROTECTION 0x85 #define FLASH_OFFSET_INTEL_PROTECTION 0x81 diff --git a/include/netdev.h b/include/netdev.h index fd3e243c71..516b351ebe 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -104,7 +104,7 @@ int xilinx_emaclite_initialize(bd_t *bis, unsigned long base_addr, int txpp, int rxpp); int xilinx_ll_temac_eth_init(bd_t *bis, unsigned long base_addr, int flags, unsigned long ctrl_addr); -int zynq_gem_initialize(bd_t *bis, int base_addr); +int zynq_gem_initialize(bd_t *bis, int base_addr, int phy_addr, u32 emio); /* * As long as the Xilinx xps_ll_temac ethernet driver has not its own interface * exported by a public hader file, we need a global definition at this point. diff --git a/include/part.h b/include/part.h index c58a734ada..f7c7cc59fc 100644 --- a/include/part.h +++ b/include/part.h @@ -38,6 +38,7 @@ typedef struct block_dev_desc { #endif lbaint_t lba; /* number of blocks */ unsigned long blksz; /* block size */ + int log2blksz; /* for convenience: log2(blksz) */ char vendor [40+1]; /* IDE model, SCSI Vendor */ char product[20+1]; /* IDE Serial no, SCSI product */ char revision[8+1]; /* firmware revision */ @@ -55,6 +56,14 @@ typedef struct block_dev_desc { void *priv; /* driver private struct pointer */ }block_dev_desc_t; +#define BLOCK_CNT(size, block_dev_desc) (PAD_COUNT(size, block_dev_desc->blksz)) +#define PAD_TO_BLOCKSIZE(size, block_dev_desc) \ + (PAD_SIZE(size, block_dev_desc->blksz)) +#define LOG2(x) (((x & 0xaaaaaaaa) ? 1 : 0) + ((x & 0xcccccccc) ? 2 : 0) + \ + ((x & 0xf0f0f0f0) ? 4 : 0) + ((x & 0xff00ff00) ? 8 : 0) + \ + ((x & 0xffff0000) ? 16 : 0)) +#define LOG2_INVALID(type) ((type)((sizeof(type)<<3)-1)) + /* Interface types: */ #define IF_TYPE_UNKNOWN 0 #define IF_TYPE_IDE 1 diff --git a/include/part_efi.h b/include/part_efi.h index 6de0a3258a..95e4c8f61e 100644 --- a/include/part_efi.h +++ b/include/part_efi.h @@ -38,7 +38,6 @@ #define EFI_PMBR_OSTYPE_EFI 0xEF #define EFI_PMBR_OSTYPE_EFI_GPT 0xEE -#define GPT_BLOCK_SIZE 512 #define GPT_HEADER_SIGNATURE 0x5452415020494645ULL #define GPT_HEADER_REVISION_V1 0x00010000 #define GPT_PRIMARY_PARTITION_TABLE_LBA 1ULL @@ -112,7 +111,6 @@ typedef struct _gpt_header { __le32 num_partition_entries; __le32 sizeof_partition_entry; __le32 partition_entry_array_crc32; - u8 reserved2[GPT_BLOCK_SIZE - 92]; } __packed gpt_header; typedef union _gpt_entry_attributes { diff --git a/include/sandboxfs.h b/include/sandboxfs.h index f5213ac107..8ea8cb7e2e 100644 --- a/include/sandboxfs.h +++ b/include/sandboxfs.h @@ -26,5 +26,6 @@ long sandbox_fs_read_at(const char *filename, unsigned long pos, void sandbox_fs_close(void); int sandbox_fs_ls(const char *dirname); int fs_read_sandbox(const char *filename, void *buf, int offset, int len); +int fs_write_sandbox(const char *filename, void *buf, int offset, int len); #endif diff --git a/include/search.h b/include/search.h index 13d3be6291..d9ac8dfa07 100644 --- a/include/search.h +++ b/include/search.h @@ -22,7 +22,7 @@ /* * Based on code from uClibc-0.9.30.3 * Extensions for use within U-Boot - * Copyright (C) 2010 Wolfgang Denk <wd@denx.de> + * Copyright (C) 2010-2013 Wolfgang Denk <wd@denx.de> */ #ifndef _SEARCH_H @@ -98,12 +98,6 @@ extern int hsearch_r(ENTRY __item, ACTION __action, ENTRY ** __retval, */ extern int hmatch_r(const char *__match, int __last_idx, ENTRY ** __retval, struct hsearch_data *__htab); -/* - * Search for an entry whose key or data contains `MATCH'. Otherwise, - * Same semantics as hsearch_r(). - */ -extern int hstrstr_r(const char *__match, int __last_idx, ENTRY ** __retval, - struct hsearch_data *__htab); /* Search and delete entry matching ITEM.key in internal hash table. */ extern int hdelete_r(const char *__key, struct hsearch_data *__htab, @@ -131,5 +125,12 @@ extern int hwalk_r(struct hsearch_data *__htab, int (*callback)(ENTRY *)); #define H_FORCE (1 << 1) /* overwrite read-only/write-once variables */ #define H_INTERACTIVE (1 << 2) /* indicate that an import is user directed */ #define H_HIDE_DOT (1 << 3) /* don't print env vars that begin with '.' */ +#define H_MATCH_KEY (1 << 4) /* search/grep key = variable names */ +#define H_MATCH_DATA (1 << 5) /* search/grep data = variable values */ +#define H_MATCH_BOTH (H_MATCH_KEY | H_MATCH_DATA) /* search/grep both */ +#define H_MATCH_IDENT (1 << 6) /* search for indentical strings */ +#define H_MATCH_SUBSTR (1 << 7) /* search for substring matches */ +#define H_MATCH_REGEX (1 << 8) /* search for regular expression matches */ +#define H_MATCH_METHOD (H_MATCH_IDENT | H_MATCH_SUBSTR | H_MATCH_REGEX) #endif /* search.h */ diff --git a/include/slre.h b/include/slre.h new file mode 100644 index 0000000000..4b41a4b276 --- /dev/null +++ b/include/slre.h @@ -0,0 +1,100 @@ +/* + * Copyright (c) 2004-2005 Sergey Lyubka <valenok@gmail.com> + * All rights reserved + * + * "THE BEER-WARE LICENSE" (Revision 42): + * Sergey Lyubka wrote this file. As long as you retain this notice you + * can do whatever you want with this stuff. If we meet some day, and you think + * this stuff is worth it, you can buy me a beer in return. + */ + +/* + * Downloaded Sat Nov 5 17:42:08 CET 2011 at + * http://slre.sourceforge.net/1.0/slre.h + */ + +/* + * This is a regular expression library that implements a subset of Perl RE. + * Please refer to http://slre.sourceforge.net for detailed description. + * + * Usage example (parsing HTTP request): + * + * struct slre slre; + * struct cap captures[4 + 1]; // Number of braket pairs + 1 + * ... + * + * slre_compile(&slre,"^(GET|POST) (\S+) HTTP/(\S+?)\r\n"); + * + * if (slre_match(&slre, buf, len, captures)) { + * printf("Request line length: %d\n", captures[0].len); + * printf("Method: %.*s\n", captures[1].len, captures[1].ptr); + * printf("URI: %.*s\n", captures[2].len, captures[2].ptr); + * } + * + * Supported syntax: + * ^ Match beginning of a buffer + * $ Match end of a buffer + * () Grouping and substring capturing + * [...] Match any character from set + * [^...] Match any character but ones from set + * \s Match whitespace + * \S Match non-whitespace + * \d Match decimal digit + * \r Match carriage return + * \n Match newline + * + Match one or more times (greedy) + * +? Match one or more times (non-greedy) + * * Match zero or more times (greedy) + * *? Match zero or more times (non-greedy) + * ? Match zero or once + * \xDD Match byte with hex value 0xDD + * \meta Match one of the meta character: ^$().[*+?\ + */ + +#ifndef SLRE_HEADER_DEFINED +#define SLRE_HEADER_DEFINED + +/* + * Compiled regular expression + */ +struct slre { + unsigned char code[256]; + unsigned char data[256]; + int code_size; + int data_size; + int num_caps; /* Number of bracket pairs */ + int anchored; /* Must match from string start */ + const char *err_str; /* Error string */ +}; + +/* + * Captured substring + */ +struct cap { + const char *ptr; /* Pointer to the substring */ + int len; /* Substring length */ +}; + +/* + * Compile regular expression. If success, 1 is returned. + * If error, 0 is returned and slre.err_str points to the error message. + */ +int slre_compile(struct slre *, const char *re); + +/* + * Return 1 if match, 0 if no match. + * If `captured_substrings' array is not NULL, then it is filled with the + * values of captured substrings. captured_substrings[0] element is always + * a full matched substring. The round bracket captures start from + * captured_substrings[1]. + * It is assumed that the size of captured_substrings array is enough to + * hold all captures. The caller function must make sure it is! So, the + * array_size = number_of_round_bracket_pairs + 1 + */ +int slre_match(const struct slre *, const char *buf, int buf_len, + struct cap *captured_substrings); + +#ifdef SLRE_TEST +void slre_dump(const struct slre *r, FILE *fp); +#endif /* SLRE_TEST */ +#endif /* SLRE_HEADER_DEFINED */ diff --git a/include/tis.h b/include/tis.h new file mode 100644 index 0000000000..89e57300b0 --- /dev/null +++ b/include/tis.h @@ -0,0 +1,73 @@ +/* + * Copyright (c) 2011 The Chromium OS Authors. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __TIS_H +#define __TIS_H + +#include <common.h> + +/* Low-level interface to access TPM */ + +/* + * tis_init() + * + * Initialize the TPM device. Returns 0 on success or -1 on + * failure (in case device probing did not succeed). + */ +int tis_init(void); + +/* + * tis_open() + * + * Requests access to locality 0 for the caller. After all commands have been + * completed the caller is supposed to call tis_close(). + * + * Returns 0 on success, -1 on failure. + */ +int tis_open(void); + +/* + * tis_close() + * + * terminate the currect session with the TPM by releasing the locked + * locality. Returns 0 on success of -1 on failure (in case lock + * removal did not succeed). + */ +int tis_close(void); + +/* + * tis_sendrecv() + * + * Send the requested data to the TPM and then try to get its response + * + * @sendbuf - buffer of the data to send + * @send_size size of the data to send + * @recvbuf - memory to save the response to + * @recv_len - pointer to the size of the response buffer + * + * Returns 0 on success (and places the number of response bytes at recv_len) + * or -1 on failure. + */ +int tis_sendrecv(const uint8_t *sendbuf, size_t send_size, uint8_t *recvbuf, + size_t *recv_len); + +#endif /* __TIS_H */ diff --git a/include/tpm.h b/include/tpm.h index 6b21e9c734..7219b7319c 100644 --- a/include/tpm.h +++ b/include/tpm.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2011 The Chromium OS Authors. + * Copyright (c) 2013 The Chromium OS Authors. * * See file CREDITS for list of people who contributed to this * project. @@ -20,52 +20,185 @@ * MA 02111-1307 USA */ -#ifndef _INCLUDE_TPM_H_ -#define _INCLUDE_TPM_H_ +#ifndef __TPM_H +#define __TPM_H -#include <common.h> +#include <tis.h> /* - * tis_init() + * Here is a partial implementation of TPM commands. Please consult TCG Main + * Specification for definitions of TPM commands. + */ + +enum tpm_startup_type { + TPM_ST_CLEAR = 0x0001, + TPM_ST_STATE = 0x0002, + TPM_ST_DEACTIVATED = 0x0003, +}; + +enum tpm_physical_presence { + TPM_PHYSICAL_PRESENCE_HW_DISABLE = 0x0200, + TPM_PHYSICAL_PRESENCE_CMD_DISABLE = 0x0100, + TPM_PHYSICAL_PRESENCE_LIFETIME_LOCK = 0x0080, + TPM_PHYSICAL_PRESENCE_HW_ENABLE = 0x0040, + TPM_PHYSICAL_PRESENCE_CMD_ENABLE = 0x0020, + TPM_PHYSICAL_PRESENCE_NOTPRESENT = 0x0010, + TPM_PHYSICAL_PRESENCE_PRESENT = 0x0008, + TPM_PHYSICAL_PRESENCE_LOCK = 0x0004, +}; + +enum tpm_nv_index { + TPM_NV_INDEX_LOCK = 0xffffffff, + TPM_NV_INDEX_0 = 0x00000000, + TPM_NV_INDEX_DIR = 0x10000001, +}; + +/** + * Initialize TPM device. It must be called before any TPM commands. * - * Initialize the TPM device. Returns 0 on success or -1 on - * failure (in case device probing did not succeed). + * @return 0 on success, non-0 on error. */ -int tis_init(void); +uint32_t tpm_init(void); -/* - * tis_open() +/** + * Issue a TPM_Startup command. * - * Requests access to locality 0 for the caller. After all commands have been - * completed the caller is supposed to call tis_close(). + * @param mode TPM startup mode + * @return return code of the operation + */ +uint32_t tpm_startup(enum tpm_startup_type mode); + +/** + * Issue a TPM_SelfTestFull command. * - * Returns 0 on success, -1 on failure. + * @return return code of the operation */ -int tis_open(void); +uint32_t tpm_self_test_full(void); -/* - * tis_close() +/** + * Issue a TPM_ContinueSelfTest command. * - * terminate the currect session with the TPM by releasing the locked - * locality. Returns 0 on success of -1 on failure (in case lock - * removal did not succeed). + * @return return code of the operation */ -int tis_close(void); +uint32_t tpm_continue_self_test(void); -/* - * tis_sendrecv() +/** + * Issue a TPM_NV_DefineSpace command. The implementation is limited + * to specify TPM_NV_ATTRIBUTES and size of the area. The area index + * could be one of the special value listed in enum tpm_nv_index. * - * Send the requested data to the TPM and then try to get its response + * @param index index of the area + * @param perm TPM_NV_ATTRIBUTES of the area + * @param size size of the area + * @return return code of the operation + */ +uint32_t tpm_nv_define_space(uint32_t index, uint32_t perm, uint32_t size); + +/** + * Issue a TPM_NV_ReadValue command. This implementation is limited + * to read the area from offset 0. The area index could be one of + * the special value listed in enum tpm_nv_index. + * + * @param index index of the area + * @param data output buffer of the area contents + * @param count size of output buffer + * @return return code of the operation + */ +uint32_t tpm_nv_read_value(uint32_t index, void *data, uint32_t count); + +/** + * Issue a TPM_NV_WriteValue command. This implementation is limited + * to write the area from offset 0. The area index could be one of + * the special value listed in enum tpm_nv_index. + * + * @param index index of the area + * @param data input buffer to be wrote to the area + * @param length length of data bytes of input buffer + * @return return code of the operation + */ +uint32_t tpm_nv_write_value(uint32_t index, const void *data, uint32_t length); + +/** + * Issue a TPM_Extend command. + * + * @param index index of the PCR + * @param in_digest 160-bit value representing the event to be + * recorded + * @param out_digest 160-bit PCR value after execution of the + * command + * @return return code of the operation + */ +uint32_t tpm_extend(uint32_t index, const void *in_digest, void *out_digest); + +/** + * Issue a TPM_PCRRead command. * - * @sendbuf - buffer of the data to send - * @send_size size of the data to send - * @recvbuf - memory to save the response to - * @recv_len - pointer to the size of the response buffer + * @param index index of the PCR + * @param data output buffer for contents of the named PCR + * @param count size of output buffer + * @return return code of the operation + */ +uint32_t tpm_pcr_read(uint32_t index, void *data, size_t count); + +/** + * Issue a TSC_PhysicalPresence command. TPM physical presence flag + * is bit-wise OR'ed of flags listed in enum tpm_physical_presence. + * + * @param presence TPM physical presence flag + * @return return code of the operation + */ +uint32_t tpm_tsc_physical_presence(uint16_t presence); + +/** + * Issue a TPM_ReadPubek command. + * + * @param data output buffer for the public endorsement key + * @param count size of ouput buffer + * @return return code of the operation + */ +uint32_t tpm_read_pubek(void *data, size_t count); + +/** + * Issue a TPM_ForceClear command. + * + * @return return code of the operation + */ +uint32_t tpm_force_clear(void); + +/** + * Issue a TPM_PhysicalEnable command. + * + * @return return code of the operation + */ +uint32_t tpm_physical_enable(void); + +/** + * Issue a TPM_PhysicalDisable command. + * + * @return return code of the operation + */ +uint32_t tpm_physical_disable(void); + +/** + * Issue a TPM_PhysicalSetDeactivated command. + * + * @param state boolean state of the deactivated flag + * @return return code of the operation + */ +uint32_t tpm_physical_set_deactivated(uint8_t state); + +/** + * Issue a TPM_GetCapability command. This implementation is limited + * to query sub_cap index that is 4-byte wide. * - * Returns 0 on success (and places the number of response bytes at recv_len) - * or -1 on failure. + * @param cap_area partition of capabilities + * @param sub_cap further definition of capability, which is + * limited to be 4-byte wide + * @param cap output buffer for capability information + * @param count size of ouput buffer + * @return return code of the operation */ -int tis_sendrecv(const uint8_t *sendbuf, size_t send_size, uint8_t *recvbuf, - size_t *recv_len); +uint32_t tpm_get_capability(uint32_t cap_area, uint32_t sub_cap, + void *cap, size_t count); -#endif /* _INCLUDE_TPM_H_ */ +#endif /* __TPM_H */ diff --git a/include/xilinx.h b/include/xilinx.h index 5f25b7a8a9..9a64771c60 100644 --- a/include/xilinx.h +++ b/include/xilinx.h @@ -27,28 +27,6 @@ #ifndef _XILINX_H_ #define _XILINX_H_ -/* Xilinx Model definitions - *********************************************************************/ -#define CONFIG_SYS_SPARTAN2 CONFIG_SYS_FPGA_DEV( 0x1 ) -#define CONFIG_SYS_VIRTEX_E CONFIG_SYS_FPGA_DEV( 0x2 ) -#define CONFIG_SYS_VIRTEX2 CONFIG_SYS_FPGA_DEV( 0x4 ) -#define CONFIG_SYS_SPARTAN3 CONFIG_SYS_FPGA_DEV( 0x8 ) -#define CONFIG_SYS_XILINX_SPARTAN2 (CONFIG_SYS_FPGA_XILINX | CONFIG_SYS_SPARTAN2) -#define CONFIG_SYS_XILINX_VIRTEX_E (CONFIG_SYS_FPGA_XILINX | CONFIG_SYS_VIRTEX_E) -#define CONFIG_SYS_XILINX_VIRTEX2 (CONFIG_SYS_FPGA_XILINX | CONFIG_SYS_VIRTEX2) -#define CONFIG_SYS_XILINX_SPARTAN3 (CONFIG_SYS_FPGA_XILINX | CONFIG_SYS_SPARTAN3) -/* XXX - Add new models here */ - - -/* Xilinx Interface definitions - *********************************************************************/ -#define CONFIG_SYS_XILINX_IF_SS CONFIG_SYS_FPGA_IF( 0x1 ) /* slave serial */ -#define CONFIG_SYS_XILINX_IF_MS CONFIG_SYS_FPGA_IF( 0x2 ) /* master serial */ -#define CONFIG_SYS_XILINX_IF_SP CONFIG_SYS_FPGA_IF( 0x4 ) /* slave parallel */ -#define CONFIG_SYS_XILINX_IF_JTAG CONFIG_SYS_FPGA_IF( 0x8 ) /* jtag */ -#define CONFIG_SYS_XILINX_IF_MSM CONFIG_SYS_FPGA_IF( 0x10 ) /* master selectmap */ -#define CONFIG_SYS_XILINX_IF_SSM CONFIG_SYS_FPGA_IF( 0x20 ) /* slave selectmap */ - /* Xilinx types *********************************************************************/ typedef enum { /* typedef Xilinx_iface */ @@ -59,6 +37,7 @@ typedef enum { /* typedef Xilinx_iface */ jtag_mode, /* jtag/tap serial (not used ) */ master_selectmap, /* master SelectMap (virtex2) */ slave_selectmap, /* slave SelectMap (virtex2) */ + devcfg, /* devcfg interface (zynq) */ max_xilinx_iface_type /* insert all new types before this */ } Xilinx_iface; /* end, typedef Xilinx_iface */ @@ -68,6 +47,7 @@ typedef enum { /* typedef Xilinx_Family */ Xilinx_VirtexE, /* Virtex-E Family */ Xilinx_Virtex2, /* Virtex2 Family */ Xilinx_Spartan3, /* Spartan-III Family */ + xilinx_zynq, /* Zynq Family */ max_xilinx_type /* insert all new types before this */ } Xilinx_Family; /* end, typedef Xilinx_Family */ @@ -77,6 +57,7 @@ typedef struct { /* typedef Xilinx_desc */ size_t size; /* bytes of data part can accept */ void *iface_fns; /* interface function table */ int cookie; /* implementation specific cookie */ + char *name; /* device name in bitstream */ } Xilinx_desc; /* end, typedef Xilinx_desc */ /* Generic Xilinx Functions diff --git a/include/zynqpl.h b/include/zynqpl.h new file mode 100644 index 0000000000..0247ef61cc --- /dev/null +++ b/include/zynqpl.h @@ -0,0 +1,59 @@ +/* + * (C) Copyright 2012-2013, Xilinx, Michal Simek + * + * (C) Copyright 2012 + * Joe Hershberger <joe.hershberger@ni.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _ZYNQPL_H_ +#define _ZYNQPL_H_ + +#include <xilinx.h> + +extern int zynq_load(Xilinx_desc *desc, const void *image, size_t size); +extern int zynq_dump(Xilinx_desc *desc, const void *buf, size_t bsize); +extern int zynq_info(Xilinx_desc *desc); + +#define XILINX_ZYNQ_7010 0x2 +#define XILINX_ZYNQ_7020 0x7 +#define XILINX_ZYNQ_7030 0xc +#define XILINX_ZYNQ_7045 0x11 + +/* Device Image Sizes */ +#define XILINX_XC7Z010_SIZE 16669920/8 +#define XILINX_XC7Z020_SIZE 32364512/8 +#define XILINX_XC7Z030_SIZE 47839328/8 +#define XILINX_XC7Z045_SIZE 106571232/8 + +/* Descriptor Macros */ +#define XILINX_XC7Z010_DESC(cookie) \ +{ xilinx_zynq, devcfg, XILINX_XC7Z010_SIZE, NULL, cookie, "7z010" } + +#define XILINX_XC7Z020_DESC(cookie) \ +{ xilinx_zynq, devcfg, XILINX_XC7Z020_SIZE, NULL, cookie, "7z020" } + +#define XILINX_XC7Z030_DESC(cookie) \ +{ xilinx_zynq, devcfg, XILINX_XC7Z030_SIZE, NULL, cookie, "7z030" } + +#define XILINX_XC7Z045_DESC(cookie) \ +{ xilinx_zynq, devcfg, XILINX_XC7Z045_SIZE, NULL, cookie, "7z045" } + +#endif /* _ZYNQPL_H_ */ |