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path: root/drivers/crypto/fsl/desc_constr.h
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Diffstat (limited to 'drivers/crypto/fsl/desc_constr.h')
-rw-r--r--drivers/crypto/fsl/desc_constr.h27
1 files changed, 27 insertions, 0 deletions
diff --git a/drivers/crypto/fsl/desc_constr.h b/drivers/crypto/fsl/desc_constr.h
index 2559ccda8c..4ea93b03a2 100644
--- a/drivers/crypto/fsl/desc_constr.h
+++ b/drivers/crypto/fsl/desc_constr.h
@@ -53,6 +53,19 @@ union ptr_addr_t {
};
#endif
+static inline void pdb_add_ptr(dma_addr_t *offset, dma_addr_t ptr)
+{
+#ifdef CONFIG_PHYS_64BIT
+ /* The Position of low and high part of 64 bit address
+ * will depend on the endianness of CAAM Block */
+ union ptr_addr_t *ptr_addr = (union ptr_addr_t *)offset;
+ ptr_addr->m_halfs.high = (u32)(ptr >> 32);
+ ptr_addr->m_halfs.low = (u32)ptr;
+#else
+ *offset = ptr;
+#endif
+}
+
static inline int desc_len(u32 *desc)
{
return *desc & HDR_DESCLEN_MASK;
@@ -68,6 +81,11 @@ static inline u32 *desc_end(u32 *desc)
return desc + desc_len(desc);
}
+static inline void *desc_pdb(u32 *desc)
+{
+ return desc + 1;
+}
+
static inline void init_desc(u32 *desc, u32 options)
{
*desc = (options | HDR_ONE) + 1;
@@ -78,6 +96,15 @@ static inline void init_job_desc(u32 *desc, u32 options)
init_desc(desc, CMD_DESC_HDR | options);
}
+static inline void init_job_desc_pdb(u32 *desc, u32 options, size_t pdb_bytes)
+{
+ u32 pdb_len = (pdb_bytes + CAAM_CMD_SZ - 1) / CAAM_CMD_SZ;
+
+ init_job_desc(desc,
+ (((pdb_len + 1) << HDR_START_IDX_SHIFT) + pdb_len) |
+ options);
+}
+
static inline void append_ptr(u32 *desc, dma_addr_t ptr)
{
dma_addr_t *offset = (dma_addr_t *)desc_end(desc);