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Diffstat (limited to 'arch/arm/include/asm/arch-am33xx/hardware_ti814x.h')
-rw-r--r--arch/arm/include/asm/arch-am33xx/hardware_ti814x.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-am33xx/hardware_ti814x.h b/arch/arm/include/asm/arch-am33xx/hardware_ti814x.h
index 451d935b1d..4509a237df 100644
--- a/arch/arm/include/asm/arch-am33xx/hardware_ti814x.h
+++ b/arch/arm/include/asm/arch-am33xx/hardware_ti814x.h
@@ -25,22 +25,37 @@
/* PRCM Base Address */
#define PRCM_BASE 0x48180000
+#define CM_PER 0x44E00000
+#define CM_WKUP 0x44E00400
+
+#define PRM_RSTCTRL (PRCM_BASE + 0x00A0)
+#define PRM_RSTST (PRM_RSTCTRL + 8)
/* PLL Subsystem Base Address */
#define PLL_SUBSYS_BASE 0x481C5000
/* VTP Base address */
#define VTP0_CTRL_ADDR 0x48140E0C
+#define VTP1_CTRL_ADDR 0x48140E10
/* DDR Base address */
#define DDR_PHY_CMD_ADDR 0x47C0C400
#define DDR_PHY_DATA_ADDR 0x47C0C4C8
+#define DDR_PHY_CMD_ADDR2 0x47C0C800
+#define DDR_PHY_DATA_ADDR2 0x47C0C8C8
#define DDR_DATA_REGS_NR 4
+#define DDRPHY_0_CONFIG_BASE (CTRL_BASE + 0x1400)
+#define DDRPHY_CONFIG_BASE DDRPHY_0_CONFIG_BASE
+
/* CPSW Config space */
#define CPSW_MDIO_BASE 0x4A100800
/* RTC base address */
#define RTC_BASE 0x480C0000
+/* OTG */
+#define USB0_OTG_BASE 0x47401000
+#define USB1_OTG_BASE 0x47401800
+
#endif /* __AM33XX_HARDWARE_TI814X_H */