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authorYork Sun <yorksun@freescale.com>2013-03-25 07:33:27 +0000
committerAndy Fleming <afleming@freescale.com>2013-05-14 16:00:29 -0500
commit615f0cba584d11944b43af03cc6d9324fc7587e3 (patch)
treee2f0639298f97b9fbc2f132de878d7f28389cd83 /spl
parenteb80880eb2806eea4436e9ee7fd8a8b741ee0620 (diff)
powerpc/mpc85xx: Fix PIR parsing for chassis2
The PIR parsing algorithm we used is not only for E6500. It applies to all SoCs with chassis 2. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'spl')
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