diff options
| author | Alexander Graf <agraf@suse.de> | 2016-03-04 01:09:54 +0100 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-03-15 15:13:10 -0400 |
| commit | 7985cdf74b280f86a1c7440298a84f1fb2876fd9 (patch) | |
| tree | bf567412991af90c220b90b59051d97bd5819c6d /include/configs | |
| parent | 21845825608af7fbc5513e4fbf812426df437302 (diff) | |
arm64: Remove non-full-va map code
By now the code to only have a single page table level with 64k page
size and 42 bit address space is no longer used by any board in tree,
so we can safely remove it.
To clean up code, move the layerscape mmu code to the new defines,
removing redundant field definitions.
Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'include/configs')
| -rw-r--r-- | include/configs/hikey.h | 1 | ||||
| -rw-r--r-- | include/configs/tegra210-common.h | 2 | ||||
| -rw-r--r-- | include/configs/thunderx_88xx.h | 14 | ||||
| -rw-r--r-- | include/configs/vexpress_aemv8a.h | 1 | ||||
| -rw-r--r-- | include/configs/xilinx_zynqmp.h | 2 |
5 files changed, 0 insertions, 20 deletions
diff --git a/include/configs/hikey.h b/include/configs/hikey.h index 263c562915..2c89bd93ec 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -23,7 +23,6 @@ /* MMU Definitions */ #define CONFIG_SYS_CACHELINE_SIZE 64 -#define CONFIG_SYS_FULL_VA #define CONFIG_IDENT_STRING "hikey" diff --git a/include/configs/tegra210-common.h b/include/configs/tegra210-common.h index 2a6e3170aa..8f35a7bf3d 100644 --- a/include/configs/tegra210-common.h +++ b/include/configs/tegra210-common.h @@ -13,8 +13,6 @@ /* Cortex-A57 uses a cache line size of 64 bytes */ #define CONFIG_SYS_CACHELINE_SIZE 64 -#define CONFIG_SYS_FULL_VA - /* * NS16550 Configuration */ diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h index 01cd2e40f5..46d91e22de 100644 --- a/include/configs/thunderx_88xx.h +++ b/include/configs/thunderx_88xx.h @@ -22,22 +22,8 @@ #define MEM_BASE 0x00500000 -#define CONFIG_SYS_FULL_VA - #define CONFIG_SYS_LOWMEM_BASE MEM_BASE -#define CONFIG_SYS_MEM_MAP_SIZE 3 - -#define CONFIG_SYS_VA_BITS 48 -#define CONFIG_SYS_PTL2_BITS 42 -#define CONFIG_SYS_BLOCK_SHIFT 29 -#define CONFIG_SYS_PTL1_ENTRIES 64 -#define CONFIG_SYS_PTL2_ENTRIES 8192 - -#define CONFIG_SYS_PGTABLE_SIZE \ - ((CONFIG_SYS_PTL1_ENTRIES + \ - CONFIG_SYS_MEM_MAP_SIZE * CONFIG_SYS_PTL2_ENTRIES) * 8) - /* Link Definitions */ #define CONFIG_SYS_TEXT_BASE 0x00500000 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0) diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h index e398bdbd40..4a9b97df18 100644 --- a/include/configs/vexpress_aemv8a.h +++ b/include/configs/vexpress_aemv8a.h @@ -21,7 +21,6 @@ /* MMU Definitions */ #define CONFIG_SYS_CACHELINE_SIZE 64 -#define CONFIG_SYS_FULL_VA #define CONFIG_IDENT_STRING " vexpress_aemv8a" #define CONFIG_BOOTP_VCI_STRING "U-Boot.armv8.vexpress_aemv8a" diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 8aa5436675..9d9ffd00c1 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -29,8 +29,6 @@ #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_MEMTEST_END CONFIG_SYS_SDRAM_SIZE -#define CONFIG_SYS_FULL_VA - /* Have release address at the end of 256MB for now */ #define CPU_RELEASE_ADDR 0xFFFFFF0 |