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| author | Yangbo Lu <yangbo.lu@nxp.com> | 2016-02-16 10:54:41 +0800 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2016-03-21 12:42:14 -0700 |
| commit | e477f4bdd40496a53f7c2c4290ef4ba16ca4d869 (patch) | |
| tree | 64172924faeae79833f56ff6012c3253130cb56d /include/configs/ls1021atwr.h | |
| parent | 0f4b82a555a3b4eab2febf06eedf51ad85ba8ddd (diff) | |
armv8/fsl-lsch2: fix sdhc clock frequency value
The eSDHC could select to use platform clock or peripheral clock to
generate SD clock. The default selection is platform clock. So, fix
the clock frequency value that's calculated for eSDHC.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'include/configs/ls1021atwr.h')
0 files changed, 0 insertions, 0 deletions