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authorMasahiro Yamada <yamada.m@jp.panasonic.com>2014-09-29 01:37:57 +0900
committerTom Rini <trini@ti.com>2014-10-10 09:44:42 -0400
commitdc9617e0cee28808863cbb21f4528f89bc383923 (patch)
tree6a832d0ebd45aec45efc386a2a29f930f7839801 /board/sandburst/karef/init.S
parent717a23b871d1563bc3a063ebceccf13a2ca2d10b (diff)
powerpc: ppc4xx: remove board support for KAREF and METROBOX
These boards have been orphaned for more than 6 months. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Diffstat (limited to 'board/sandburst/karef/init.S')
-rw-r--r--board/sandburst/karef/init.S39
1 files changed, 0 insertions, 39 deletions
diff --git a/board/sandburst/karef/init.S b/board/sandburst/karef/init.S
deleted file mode 100644
index 61c5d07964..0000000000
--- a/board/sandburst/karef/init.S
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
-* Copyright (C) 2005 Sandburst Corporation
- * SPDX-License-Identifier: GPL-2.0+
-*/
-/*
- * Ported from Ebony init.S by Travis B. Sawyer
- */
-
-#include <ppc_asm.tmpl>
-#include <asm/mmu.h>
-#include <config.h>
-#include <asm/ppc4xx.h>
-
-/**************************************************************************
- * TLB TABLE
- *
- * This table is used by the cpu boot code to setup the initial tlb
- * entries. Rather than make broad assumptions in the cpu source tree,
- * this table lets each board set things up however they like.
- *
- * Pointer to the table is returned in r1
- *
- *************************************************************************/
-
- .section .bootpg,"ax"
- .globl tlbtab
-
-tlbtab:
- tlbtab_start
- tlbentry( 0xf0000000, SZ_256M, 0xf0000000, 1, AC_RWX | SA_IG)
- tlbentry( CONFIG_SYS_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_RW | SA_IG)
- tlbentry( CONFIG_SYS_ISRAM_BASE, SZ_256K, 0x80000000, 0, AC_RWX | SA_IG)
- tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_RWX | SA_IG )
- tlbentry( CONFIG_SYS_SDRAM_BASE+0x10000000, SZ_256M, 0x10000000, 0, AC_RWX | SA_IG )
- tlbentry( CONFIG_SYS_SDRAM_BASE+0x20000000, SZ_256M, 0x20000000, 0, AC_RWX | SA_IG )
- tlbentry( CONFIG_SYS_SDRAM_BASE+0x30000000, SZ_256M, 0x30000000, 0, AC_RWX | SA_IG )
- tlbentry( CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 2, AC_RW | SA_IG )
- tlbentry( CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_RW | SA_IG )
- tlbtab_end