diff options
| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2015-09-02 10:40:22 +0900 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-09-02 11:33:11 -0400 |
| commit | 0d2fc81133aa9e8f19d16de48d4f0a8f1bdde025 (patch) | |
| tree | 399b03ad8d8b380bd69817504bcb82788bc2f7e7 /board/prodrive/alpr/init.S | |
| parent | c4620350c4d4496873e2a4ae4f1b3b16b936384a (diff) | |
powerpc: ppc4xx: remove alpr support
This has not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Stefan Roese <sr@denx.de>
Diffstat (limited to 'board/prodrive/alpr/init.S')
| -rw-r--r-- | board/prodrive/alpr/init.S | 53 |
1 files changed, 0 insertions, 53 deletions
diff --git a/board/prodrive/alpr/init.S b/board/prodrive/alpr/init.S deleted file mode 100644 index 7ff7a59170..0000000000 --- a/board/prodrive/alpr/init.S +++ /dev/null @@ -1,53 +0,0 @@ -/* - * (C) Copyright 2006 - * Stefan Roese, DENX Software Engineering, sr@denx.de. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <asm-offsets.h> -#include <ppc_asm.tmpl> -#include <asm/mmu.h> -#include <config.h> -#include <asm/ppc4xx.h> - -/************************************************************************** - * TLB TABLE - * - * This table is used by the cpu boot code to setup the initial tlb - * entries. Rather than make broad assumptions in the cpu source tree, - * this table lets each board set things up however they like. - * - * Pointer to the table is returned in r1 - * - *************************************************************************/ - - .section .bootpg,"ax" - .globl tlbtab - -tlbtab: - tlbtab_start - tlbentry(0xff000000, SZ_16M, 0xff000000, 1, AC_RWX | SA_IG ) - tlbentry(CONFIG_SYS_PERIPHERAL_BASE, SZ_256M, 0x40000000, 1, AC_RW | SA_IG) - tlbentry(CONFIG_SYS_ISRAM_BASE, SZ_4K, 0x80000000, 0, AC_RWX) - tlbentry(CONFIG_SYS_ISRAM_BASE + 0x1000, SZ_4K, 0x80001000, 0, AC_RWX) -#ifdef CONFIG_4xx_DCACHE - tlbentry(CONFIG_SYS_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_RWX | SA_G) -#else - tlbentry(CONFIG_SYS_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_RWX | SA_IG) -#endif - -#ifdef CONFIG_SYS_INIT_RAM_DCACHE - /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */ - tlbentry(CONFIG_SYS_INIT_RAM_ADDR, SZ_64K, CONFIG_SYS_INIT_RAM_ADDR, 0, AC_RWX | SA_G) -#endif - tlbentry(CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 2, AC_RW | SA_IG) - - /* PCI */ - tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, CONFIG_SYS_PCI_MEMBASE, 3, AC_RW | SA_IG) - tlbentry(CONFIG_SYS_PCI_MEMBASE1, SZ_256M, CONFIG_SYS_PCI_MEMBASE1, 3, AC_RW | SA_IG) - tlbentry(CONFIG_SYS_PCI_MEMBASE2, SZ_256M, CONFIG_SYS_PCI_MEMBASE2, 3, AC_RW | SA_IG) - - /* NAND */ - tlbentry(CONFIG_SYS_NAND_BASE, SZ_4K, CONFIG_SYS_NAND_BASE, 1, AC_RWX | SA_IG) - tlbtab_end |