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authorDirk Eibach <dirk.eibach@gdsys.cc>2014-07-03 09:28:21 +0200
committerTom Rini <trini@ti.com>2014-07-07 19:47:19 -0400
commit5568fb4402d5b0e01f61867c281b07633f529fd4 (patch)
tree5a42735b241c7a94dc6c8667201ee4547fa3942a /board/gdsys/common
parentcccd4f407e7c71b18d4acd03ce2cfcbb3a001be9 (diff)
board: gdsys: Configure bridge on DP501 to support DDC only
The I2C bridge on DP501 supports EDID, MCCS and HDCP by default. Allow EDID only to avoid I2C address conflicts. Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc>
Diffstat (limited to 'board/gdsys/common')
-rw-r--r--board/gdsys/common/dp501.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/board/gdsys/common/dp501.c b/board/gdsys/common/dp501.c
index e00e58997b..7958baeaaf 100644
--- a/board/gdsys/common/dp501.c
+++ b/board/gdsys/common/dp501.c
@@ -54,6 +54,7 @@ static void dp501_link_training(u8 addr)
void dp501_powerup(u8 addr)
{
dp501_clrbits(addr, 0x0a, 0x30); /* power on encoder */
+ dp501_setbits(addr, 0x0a, 0x0e); /* block HDCP and MCCS on I2C bride*/
i2c_reg_write(addr, 0x27, 0x30); /* Hardware auto detect DVO timing */
dp501_setbits(addr, 0x72, 0x80); /* DPCD read enable */
dp501_setbits(addr, 0x30, 0x20); /* RS polynomial select */