summaryrefslogtreecommitdiff
path: root/board/funkwerk
diff options
context:
space:
mode:
authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>2008-10-16 15:01:15 +0200
committerWolfgang Denk <wd@denx.de>2008-10-18 21:54:03 +0200
commit6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch)
treeae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /board/funkwerk
parent71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff)
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'board/funkwerk')
-rw-r--r--board/funkwerk/vovpn-gw/flash.c24
-rw-r--r--board/funkwerk/vovpn-gw/vovpn-gw.c40
2 files changed, 32 insertions, 32 deletions
diff --git a/board/funkwerk/vovpn-gw/flash.c b/board/funkwerk/vovpn-gw/flash.c
index 0308611eb6..fd3b16ea50 100644
--- a/board/funkwerk/vovpn-gw/flash.c
+++ b/board/funkwerk/vovpn-gw/flash.c
@@ -27,7 +27,7 @@
#include <common.h>
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
+flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
#define FLASH_CMD_READ_ID 0x90
#define FLASH_CMD_READ_STATUS 0x70
@@ -46,7 +46,7 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
#define FLASH_WRITE_BUFFER_SIZE 32
-#ifdef CFG_FLASH_16BIT
+#ifdef CONFIG_SYS_FLASH_16BIT
#define FLASH_WORD_SIZE unsigned short
#define FLASH_ID_MASK 0xffff
#define FLASH_CMD_ADDR_SHIFT 0
@@ -130,10 +130,10 @@ flash_init(void)
unsigned long size;
int i;
- for (i=0; i<CFG_MAX_FLASH_BANKS; ++i) {
+ for (i=0; i<CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
flash_info[i].flash_id = FLASH_UNKNOWN;
}
- size = flash_get((volatile FLASH_WORD_SIZE *)CFG_FLASH_BASE, &flash_info[0]);
+ size = flash_get((volatile FLASH_WORD_SIZE *)CONFIG_SYS_FLASH_BASE, &flash_info[0]);
if (flash_info[0].flash_id == FLASH_UNKNOWN) {
printf ("## Unknown FLASH Size=0x%08lx\n", size);
return (0);
@@ -145,10 +145,10 @@ flash_init(void)
flash_info[0].start[1] - 1,
&flash_info[0]);
-#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
+#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
flash_protect(FLAG_PROTECT_SET,
- CFG_MONITOR_FLASH,
- CFG_MONITOR_FLASH+CFG_MONITOR_LEN-1,
+ CONFIG_SYS_MONITOR_FLASH,
+ CONFIG_SYS_MONITOR_FLASH+CONFIG_SYS_MONITOR_LEN-1,
&flash_info[0]);
#endif
#ifdef CONFIG_ENV_IS_IN_FLASH
@@ -265,7 +265,7 @@ flash_erase(flash_info_t *info, int s_first, int s_last)
udelay (1000);
while (((status = *addr) & FLASH_STATUS_DONE) != FLASH_STATUS_DONE) {
- if ((now=get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+ if ((now=get_timer(start)) > CONFIG_SYS_FLASH_ERASE_TOUT) {
printf("Flash erase timeout at address %lx\n", info->start[sect]);
*addr = FLASH_CMD_SUSPEND_ERASE;
*addr = FLASH_CMD_RESET;
@@ -307,7 +307,7 @@ write_buff2( volatile FLASH_WORD_SIZE *dst,
enable_interrupts();
}
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+ if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
return (-1);
}
}
@@ -337,7 +337,7 @@ poll_status( volatile FLASH_WORD_SIZE *addr )
break;
}
}
- if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+ if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
*addr = FLASH_CMD_RESET;
return (-1);
}
@@ -367,7 +367,7 @@ write_buff(flash_info_t *info, uchar *src, ulong udst, ulong cnt)
addr = (volatile FLASH_WORD_SIZE *)(info->start[0]);
dst = (volatile FLASH_WORD_SIZE *) udst;
-#ifdef CFG_FLASH_16BIT
+#ifdef CONFIG_SYS_FLASH_16BIT
#error NYI
#else
while (cnt > 0) {
@@ -435,7 +435,7 @@ flash_real_protect(flash_info_t *info, long sector, int prot)
/* wait for error or finish */
start = get_timer (0);
while(!(addr[0] & FLASH_STATUS_DONE)){
- if (get_timer(start) > CFG_FLASH_ERASE_TOUT) {
+ if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
printf("Flash protect timeout at address %lx\n", info->start[sector]);
addr[0] = FLASH_CMD_RESET;
return (1);
diff --git a/board/funkwerk/vovpn-gw/vovpn-gw.c b/board/funkwerk/vovpn-gw/vovpn-gw.c
index 1c3f627a44..8c4abdd370 100644
--- a/board/funkwerk/vovpn-gw/vovpn-gw.c
+++ b/board/funkwerk/vovpn-gw/vovpn-gw.c
@@ -189,7 +189,7 @@ void reset_phy (void)
unsigned short val;
#endif
- iop = ioport_addr((immap_t *)CFG_IMMR, 0);
+ iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, 0);
/* Reset the PHY */
iop->pdat &= 0xfff7ffff; /* PA12 = |SWITCH_RESET */
@@ -198,12 +198,12 @@ void reset_phy (void)
iop->pdat |= 0x00080000;
for (i=0; i<100; i++) {
udelay(20000);
- if (bb_miiphy_read("FCC1 ETHERNET", CFG_PHY_ADDR,2,&val ) == 0) {
+ if (bb_miiphy_read("FCC1 ETHERNET", CONFIG_SYS_PHY_ADDR,2,&val ) == 0) {
break;
}
}
/* initialize switch */
- m88e6060_initialize( CFG_PHY_ADDR );
+ m88e6060_initialize( CONFIG_SYS_PHY_ADDR );
#endif
}
@@ -233,7 +233,7 @@ int board_early_init_f (void)
volatile unsigned char *dummy;
int i;
- immap = (immap_t *) CFG_IMMR;
+ immap = (immap_t *) CONFIG_SYS_IMMR;
memctl = &immap->im_memctl;
#if 0
@@ -272,7 +272,7 @@ int misc_init_r (void)
unsigned char c;
int i;
- immap = (immap_t *) CFG_IMMR;
+ immap = (immap_t *) CONFIG_SYS_IMMR;
memctl = &immap->im_memctl;
@@ -289,7 +289,7 @@ int misc_init_r (void)
memctl->memc_mamr = 0x00044440;
#endif
/* enable buffers (DSP, DPRAM) */
- iop = ioport_addr((immap_t *)CFG_IMMR, 0);
+ iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, 0);
iop->pdat &= 0xfffbffff; /* PA13 = |EN_M_BCTL1 */
/* destroy DPRAM magic */
@@ -310,7 +310,7 @@ do_reset (void *cmdtp, int flag, int argc, char *argv[])
{
volatile ioport_t *iop;
- iop = ioport_addr((immap_t *)CFG_IMMR, 2);
+ iop = ioport_addr((immap_t *)CONFIG_SYS_IMMR, 2);
iop->pdat |= 0x00002000; /* PC18 = HW_RESET */
return 1;
}
@@ -320,16 +320,16 @@ do_reset (void *cmdtp, int flag, int argc, char *argv[])
phys_size_t initdram (int board_type)
{
-#ifndef CFG_RAMBOOT
+#ifndef CONFIG_SYS_RAMBOOT
volatile immap_t *immap;
volatile memctl8260_t *memctl;
volatile uchar *ramaddr;
int i;
uchar c;
- immap = (immap_t *) CFG_IMMR;
+ immap = (immap_t *) CONFIG_SYS_IMMR;
memctl = &immap->im_memctl;
- ramaddr = (uchar *) CFG_SDRAM_BASE;
+ ramaddr = (uchar *) CONFIG_SYS_SDRAM_BASE;
c = 0xff;
immap->im_siu_conf.sc_ppc_acr = 0x02;
@@ -338,30 +338,30 @@ phys_size_t initdram (int board_type)
immap->im_siu_conf.sc_tescr1 = 0x00000000;
immap->im_siu_conf.sc_tescr2 = 0x00000000;
- memctl->memc_mptpr = CFG_MPTPR;
- memctl->memc_psrt = CFG_PSRT;
- memctl->memc_or1 = CFG_OR1_PRELIM;
- memctl->memc_br1 = CFG_SDRAM_BASE | CFG_BR1_PRELIM;
+ memctl->memc_mptpr = CONFIG_SYS_MPTPR;
+ memctl->memc_psrt = CONFIG_SYS_PSRT;
+ memctl->memc_or1 = CONFIG_SYS_OR1_PRELIM;
+ memctl->memc_br1 = CONFIG_SYS_SDRAM_BASE | CONFIG_SYS_BR1_PRELIM;
/* Precharge all banks */
- memctl->memc_psdmr = CFG_PSDMR | 0x28000000;
+ memctl->memc_psdmr = CONFIG_SYS_PSDMR | 0x28000000;
*ramaddr = c;
/* CBR refresh */
- memctl->memc_psdmr = CFG_PSDMR | 0x08000000;
+ memctl->memc_psdmr = CONFIG_SYS_PSDMR | 0x08000000;
for (i = 0; i < 8; i++)
*ramaddr = c;
/* Mode Register write */
- memctl->memc_psdmr = CFG_PSDMR | 0x18000000;
+ memctl->memc_psdmr = CONFIG_SYS_PSDMR | 0x18000000;
*ramaddr = c;
/* Refresh enable */
- memctl->memc_psdmr = CFG_PSDMR | 0x40000000;
+ memctl->memc_psdmr = CONFIG_SYS_PSDMR | 0x40000000;
*ramaddr = c;
-#endif /* CFG_RAMBOOT */
+#endif /* CONFIG_SYS_RAMBOOT */
- return (CFG_SDRAM_SIZE);
+ return (CONFIG_SYS_SDRAM_SIZE);
}
int checkboard (void)