diff options
| author | Tom Warren <twarren@nvidia.com> | 2013-03-06 16:16:22 -0700 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2013-03-14 11:06:43 -0700 |
| commit | 8ca79b2ff467bda3bc1cfe7fe566f0c1189881dc (patch) | |
| tree | 7cc9230b3f5f27c89df60bcb20c41c24bcbbb160 /arch/arm/include/asm/arch-tegra30/gp_padctrl.h | |
| parent | 8b7776b9f95d542d0e81357c4f8aa32f7bf466e5 (diff) | |
Tegra30: Cardhu: Add pad config tables/code based on pinmux code
Pad config registers exist in APB_MISC_GP space, and control slew
rate, drive strengh, schmidt, high-speed, and low-power modes for
all of the pingroups in Tegra30. This builds off of the pinmux
way of constructing init tables to configure select pads (SDIOCFG,
for instance) during pinmux_init().
Currently, only SDIO1CFG is changed as per the TRM to work with
the SD-card slot on Cardhu.
Thanks to StephenW for the suggestion/original idea.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/include/asm/arch-tegra30/gp_padctrl.h')
| -rw-r--r-- | arch/arm/include/asm/arch-tegra30/gp_padctrl.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-tegra30/gp_padctrl.h b/arch/arm/include/asm/arch-tegra30/gp_padctrl.h index 9b383d0e74..23d184f2dd 100644 --- a/arch/arm/include/asm/arch-tegra30/gp_padctrl.h +++ b/arch/arm/include/asm/arch-tegra30/gp_padctrl.h @@ -56,4 +56,10 @@ struct apb_misc_gp_ctlr { u32 sdio1cfg; /* 0xEC: APB_MISC_GP_SDIO1CFGPADCTRL */ }; +/* SDMMC1/3 settings from section 24.6 of T30 TRM */ +#define SDIOCFG_DRVUP_SLWF 1 +#define SDIOCFG_DRVDN_SLWR 1 +#define SDIOCFG_DRVUP 0x2E +#define SDIOCFG_DRVDN 0x2A + #endif /* _TEGRA30_GP_PADCTRL_H_ */ |