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authorPhilipp Tomsich <philipp.tomsich@theobroma-systems.com>2016-04-08 00:27:11 +0200
committerKlaus Goger <klaus.goger@theobroma-systems.com>2016-09-18 13:45:14 +0200
commit2b9c186d3c66addaec852774b7b2e98358feb03c (patch)
tree4f7c2ffb15ccce26deea3d72d9a171b137abcd8d /arch/arm/include/asm/arch-sunxi/cpu_sun9i.h
parent9329adc4c7efa2e56a529960969a5ea47082ed15 (diff)
sunxi: add gtbus-initialisation for sun9i
On sun9i, the GTBUS manages transaction priority and bandwidth for multiple read ports when accessing DRAM. The initialisation mirrors the settings from Allwinner's boot0 for now, even though this may not be optimal for all applications (e.g. headless systems might want to give priority to IO modules). Adding a common callout to gtbus_init() from the SPL clock init with a weakly defined implementation in sunxi/clock.c to fallback to for platforms that don't require this.
Diffstat (limited to 'arch/arm/include/asm/arch-sunxi/cpu_sun9i.h')
-rw-r--r--arch/arm/include/asm/arch-sunxi/cpu_sun9i.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h
index 00ffeca553..8ace4e7cb0 100644
--- a/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h
+++ b/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h
@@ -23,6 +23,8 @@
#define SUNXI_NFC_BASE (REGS_AHB0_BASE + 0x3000)
#define SUNXI_TSC_BASE (REGS_AHB0_BASE + 0x4000)
+#define SUNXI_GTBUS_BASE (REGS_AHB0_BASE + 0x9000)
+
#define SUNXI_MMC0_BASE (REGS_AHB0_BASE + 0x0f000)
#define SUNXI_MMC1_BASE (REGS_AHB0_BASE + 0x10000)
#define SUNXI_MMC2_BASE (REGS_AHB0_BASE + 0x11000)