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authorPeng Fan <Peng.Fan@freescale.com>2015-08-17 16:11:04 +0800
committerStefano Babic <sbabic@denx.de>2015-09-02 15:34:12 +0200
commiteb796cbb69a39eb08b08e1715e21c8034cd349b7 (patch)
tree6e9ca6b153217ecc02fcfa5b7cd2292e8769fd13 /arch/arm/include/asm/arch-mx6
parentf2ff834365296151b24bf8617f1f6dd070bdce9e (diff)
imx: mx6: ddr: add LPDDR2 support
Add LPDDR2 support: 1. Implement a function mx6_lpddr2_cfg to initialize MMDC for LPDDR2. 2. Introduce a structure mx6_lpddr2_cfg, most entrys are same to mx6_ddr3_cfg, but still keep it a single one for easy to choose parameters for LPDDR2. 3. If ddr_type is LPDDR2, use mx6_lpddr2_cfg to init MMDC. 4. Update comments. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com>
Diffstat (limited to 'arch/arm/include/asm/arch-mx6')
-rw-r--r--arch/arm/include/asm/arch-mx6/mx6-ddr.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-mx6/mx6-ddr.h b/arch/arm/include/asm/arch-mx6/mx6-ddr.h
index 36fcb2b6fc..68d9bda2c5 100644
--- a/arch/arm/include/asm/arch-mx6/mx6-ddr.h
+++ b/arch/arm/include/asm/arch-mx6/mx6-ddr.h
@@ -377,6 +377,21 @@ struct mx6_ddr3_cfg {
u8 SRT; /* self-refresh temperature: 0=normal, 1=extended */
};
+/* Device Information: Varies per LPDDR2 part number and speed grade */
+struct mx6_lpddr2_cfg {
+ u16 mem_speed; /* ie 800 for LPDDR2-800 */
+ u8 density; /* chip density (Gb) (1,2,4,8) */
+ u8 width; /* bus width (bits) (4,8,16) */
+ u8 banks; /* number of banks */
+ u8 rowaddr; /* row address bits (11-16)*/
+ u8 coladdr; /* col address bits (9-12) */
+ u16 trcd_lp;
+ u16 trppb_lp;
+ u16 trpab_lp;
+ u16 trcmin; /* tRC min (ns*100) */
+ u16 trasmin; /* tRAS min (ns*100) */
+};
+
/* System Information: Varies per board design, layout, and term choices */
struct mx6_ddr_sysinfo {
u8 dsize; /* size of bus (in dwords: 0=16bit,1=32bit,2=64bit) */