diff options
| author | Inderpal Singh <inderpal.singh@linaro.org> | 2013-04-04 23:09:20 +0000 |
|---|---|---|
| committer | Minkyu Kang <mk7.kang@samsung.com> | 2013-06-04 15:23:17 +0900 |
| commit | b5f9756f7f2449cf1b6c3e64dbc40f159f7dcbe2 (patch) | |
| tree | 41410111266598c7e69a237fe41ae460fc8c6d00 /arch/arm/cpu/armv7/exynos/tzpc.c | |
| parent | 72af2fc8504daccd2f8ae2459e3e225e9c2cc512 (diff) | |
exynos: update tzpc to make it common for exynos4 and exynos5
This requires that cpu_is_exynos4/5 should be made available before tzpc_init.
Hence this patch also makes necessary changes to have cpu_info in spl and
invokes arch_cpu_init before tzpc_init in low_level_init.S for smdk5250.
Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
Acked-by: Chander Kashyap <chander.kashyap@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'arch/arm/cpu/armv7/exynos/tzpc.c')
| -rw-r--r-- | arch/arm/cpu/armv7/exynos/tzpc.c | 23 |
1 files changed, 16 insertions, 7 deletions
diff --git a/arch/arm/cpu/armv7/exynos/tzpc.c b/arch/arm/cpu/armv7/exynos/tzpc.c index 81adb4b57f..f5e8e9c474 100644 --- a/arch/arm/cpu/armv7/exynos/tzpc.c +++ b/arch/arm/cpu/armv7/exynos/tzpc.c @@ -22,6 +22,7 @@ * MA 02111-1307 USA */ +#include <common.h> #include <asm/arch/tzpc.h> #include <asm/io.h> @@ -29,20 +30,28 @@ void tzpc_init(void) { struct exynos_tzpc *tzpc; - unsigned int addr; + unsigned int addr, start = 0, end = 0; - for (addr = TZPC0_BASE; addr <= TZPC9_BASE; addr += TZPC_BASE_OFFSET) { + start = samsung_get_base_tzpc(); + + if (cpu_is_exynos5()) + end = start + ((EXYNOS5_NR_TZPC_BANKS - 1) * TZPC_BASE_OFFSET); + else if (cpu_is_exynos4()) + end = start + ((EXYNOS4_NR_TZPC_BANKS - 1) * TZPC_BASE_OFFSET); + + for (addr = start; addr <= end; addr += TZPC_BASE_OFFSET) { tzpc = (struct exynos_tzpc *)addr; - if (addr == TZPC0_BASE) + if (addr == start) writel(R0SIZE, &tzpc->r0size); writel(DECPROTXSET, &tzpc->decprot0set); writel(DECPROTXSET, &tzpc->decprot1set); - if (addr != TZPC9_BASE) { - writel(DECPROTXSET, &tzpc->decprot2set); - writel(DECPROTXSET, &tzpc->decprot3set); - } + if (cpu_is_exynos5() && (addr == end)) + break; + + writel(DECPROTXSET, &tzpc->decprot2set); + writel(DECPROTXSET, &tzpc->decprot3set); } } |