summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/tegra124-venice2.dts
blob: f765c822bb14b1fd30a0f7a743e05e8ed09c24d8 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
/dts-v1/;

#include "tegra124.dtsi"

/ {
	model = "NVIDIA Tegra124 Venice2";
	compatible = "nvidia,venice2", "nvidia,tegra124";

	memory {
		reg = <0x80000000 0x80000000>;
	};

	serial@70006000 {
		status = "okay";
	};

	pmc@7000e400 {
		nvidia,invert-interrupt;
		nvidia,suspend-mode = <1>;
		nvidia,cpu-pwr-good-time = <500>;
		nvidia,cpu-pwr-off-time = <300>;
		nvidia,core-pwr-good-time = <641 3845>;
		nvidia,core-pwr-off-time = <61036>;
		nvidia,core-power-req-active-high;
		nvidia,sys-clock-req-active-high;
	};

	sdhci@700b0400 {
		cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
		power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
		status = "okay";
		bus-width = <4>;
	};

	sdhci@700b0600 {
		status = "okay";
		bus-width = <8>;
	};

	clocks {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		clk32k_in: clock@0 {
			compatible = "fixed-clock";
			reg=<0>;
			#clock-cells = <0>;
			clock-frequency = <32768>;
		};
	};
};