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authorRoger Quadros <rogerq@ti.com>2014-09-02 16:57:02 +0300
committerTony Lindgren <tony@atomide.com>2014-09-04 12:38:22 -0700
commitdb01e6c7fbe3b87b389f537b52a5d862cea498e1 (patch)
treef3a74ee44b4980ca64137581fa267c81a7bdc3d6 /arch/arm
parent4b143f0f60143a8238262874c1ee22b43fbdc61e (diff)
ARM: dts: am43x-epos-evm: Use BCH16 ECC scheme instead of BCH8
am43x-epos-evm uses a NAND chip with page size 4096 bytes and spare area of 225 bytes per page. For such a setup it is preferrable to use BCH16 ECC scheme over BCH8. This also makes it compatible with ROM code ECC scheme so we can boot with NAND after flashing from kernel. Signed-off-by: Roger Quadros <rogerq@ti.com> Reviewed-by: Pekon Gupta <pekon@pek-sem.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/am43x-epos-evm.dts2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/am43x-epos-evm.dts b/arch/arm/boot/dts/am43x-epos-evm.dts
index ed7dd2395915..f6c98985b5c7 100644
--- a/arch/arm/boot/dts/am43x-epos-evm.dts
+++ b/arch/arm/boot/dts/am43x-epos-evm.dts
@@ -441,7 +441,7 @@
ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
nand@0,0 {
reg = <0 0 0>; /* CS0, offset 0 */
- ti,nand-ecc-opt = "bch8";
+ ti,nand-ecc-opt = "bch16";
ti,elm-id = <&elm>;
nand-bus-width = <8>;
gpmc,device-width = <1>;