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authorStefan Agner <stefan@agner.ch>2016-02-10 16:02:26 -0800
committerShawn Guo <shawnguo@kernel.org>2016-02-29 16:17:34 +0800
commit5c35b778bfe72c12506b1be0b0ace66ca2592fd7 (patch)
treea0e63b10096d26190dd439bebee7cf46802e5b76 /arch/arm/boot/dts/vf-colibri.dtsi
parent6af2f61a293d3032dc5f59bea314355d6b7743e2 (diff)
ARM: dts: vf-colibri: assign Ethernet clock explicitly
Assign Ethernet clock parents explicitly. The Colibri VF61 uses the 50MHz Ethernet clock provided by PLL5. The Vybrid SoC has two ethernet interfaces (fec0 and fec1) which use the same clock source (VF610_CLK_ENET). Therefore this parent configuration affects multiple consumer devices and need to be specified in the clock provider node. Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/vf-colibri.dtsi')
-rw-r--r--arch/arm/boot/dts/vf-colibri.dtsi7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/vf-colibri.dtsi b/arch/arm/boot/dts/vf-colibri.dtsi
index 432dea755220..ff6f58ef35ce 100644
--- a/arch/arm/boot/dts/vf-colibri.dtsi
+++ b/arch/arm/boot/dts/vf-colibri.dtsi
@@ -70,6 +70,13 @@
status = "disabled";
};
+&clks {
+ assigned-clocks = <&clks VF610_CLK_ENET_SEL>,
+ <&clks VF610_CLK_ENET_TS_SEL>;
+ assigned-clock-parents = <&clks VF610_CLK_ENET_50M>,
+ <&clks VF610_CLK_ENET_50M>;
+};
+
&dspi1 {
bus-num = <1>;
pinctrl-names = "default";